阅读说明：本技术 用于无线重传通信系统的位纠错 (Bit error correction for wireless retransmission communication systems ) 是由 罗伯特·措普夫 于 2019-03-12 设计创作，主要内容包括：本申请涉及用于无线重传通信系统的位纠错,其中,系统、方法和装置接收原始数据包的损坏的数据包和原始数据包的至少一个损坏的重传数据包,并基于通过损坏的数据包和至少一个损坏的重传数据包接收的原始数据包的相同位生成对于原始数据包的判定数据包。实施方式基于至少一个损坏的重传数据包中的最后一个和一个或多个循环冗余校验(CRC)操作来验证判定数据包以确定判定数据包是否正确。(The present application relates to bit error correction for wireless retransmission communication systems, wherein systems, methods and apparatus receive a corrupted data packet of an original data packet and at least one corrupted retransmitted data packet of the original data packet and generate a decision data packet for the original data packet based on the same bits of the original data packet received through the corrupted data packet and the at least one corrupted retransmitted data packet. Embodiments validate the decision packet based on a last one of the at least one corrupted retransmitted data packets and one or more Cyclic Redundancy Check (CRC) operations to determine whether the decision packet is correct.)

1. A receiver, comprising:

a processing device;

a memory;

a non-transitory computer readable medium comprising program instructions that, in response to execution by the processing device, cause the processing device to:

receiving a corrupted data packet of an original data packet and storing the corrupted data packet in the memory; and

receiving at least one corrupted retransmitted data packet of the original data packets and storing the at least one corrupted retransmitted data packet in the memory;

generating a decision packet for the original packet based on an accumulation of like bits of the original packet received by the corrupted packet and the at least one corrupted retransmitted packet; and

the decision packet is validated based on one or more cyclic redundancy check, CRC, operations to determine whether the decision packet is correct.

2. The receiver of claim 1, wherein the processing device is further configured to generate the accumulated cumulative packet comprising the identical bits, wherein to generate the accumulated packet, the processing device is further configured to:

performing a bit-wise decimal addition on the corrupted data packet and the at least one corrupted retransmitted data packet to generate soft bits in the accumulated data packet,

wherein each soft bit in the accumulated packet indicates a confidence level of a corresponding bit in the decision packet.

3. The receiver of claim 1, wherein the processing device is further configured to correct the decision packet in response to determining that the decision packet is incorrect.

4. The receiver of claim 3, wherein to correct the decision packet, the processing device is further configured to identify a location of at least one erroneous bit in the decision packet based on the accumulated packet.

5. The receiver of claim 1, wherein, to validate the decision packet based on the one or more CRC operations, the processing device is configured to validate the decision packet based on a last of the at least one corrupted retransmitted packet and a CRC syndrome table.

6. The receiver of claim 5, wherein the at least one corrupted retransmitted data packet comprises a plurality of corrupted retransmitted data packets, and wherein to validate the decision packet, the processing device is further configured to:

validating the decision packet using the CRC syndromes of the last of the plurality of corrupted retransmitted data packets and the last of the plurality of corrupted retransmitted data packets.

7. The receiver of claim 1, wherein to validate the decision packet based on the one or more CRC operations, the processing device is configured to calculate a CRC for the decision packet.

8. A method, comprising:

receiving a corrupted data packet of an original data packet and at least one corrupted retransmitted data packet of the original data packet;

generating a decision packet for the original data packet based on the same bits of the original data packet received through the corrupted data packet and the at least one corrupted retransmission data packet; and

validating the decision packet based on a last of the at least one corrupted retransmitted packet and one or more cyclic redundancy check, CRC, operations to determine whether the decision packet is correct.

9. The method of claim 8, further comprising generating an accumulated packet that accumulates identical bits of the original packet received by the corrupted packet and the at least one corrupted retransmitted packet, wherein generating the accumulated packet comprises:

performing a bitwise decimal addition on the corrupted data packet and the at least one corrupted retransmitted data packet to generate soft bits in the accumulated data packet.

10. The method of claim 9, wherein each soft bit in the accumulated packet indicates a confidence level of a corresponding bit in the decision packet.

11. The method of claim 10, further comprising correcting the decision packet in response to determining that the decision packet is incorrect, wherein correcting the decision packet comprises identifying a location of at least one erroneous bit in the decision packet based on the accumulated packet.

12. The method of claim 8, wherein the validating of the decision packet comprises calculating a CRC of the decision packet.

13. The method of claim 8, wherein the validating of the decision packet comprises validating the decision packet based on a last of the at least one corrupted retransmitted packet and a CRC syndrome table.

14. The method of claim 13, wherein the at least one corrupted retransmission packet comprises a plurality of corrupted retransmission packets, and wherein validating the decision packet comprises:

validating the decision packet using the CRC syndromes of the last of the plurality of corrupted retransmitted data packets and the last of the plurality of corrupted retransmitted data packets.

15. A wireless communication system, comprising:

a transmitter configured to transmit an original data packet; and

a receiver, the receiver comprising:

a processing device configured to:

receiving a corrupted data packet of the original data packet and at least one corrupted retransmitted data packet of the original data packet;

generating a decision packet for the original packet based on an accumulation of like bits of the original packet received by the corrupted packet and the at least one corrupted retransmitted packet; and

validating the decision packet based on the last of the at least one corrupted retransmitted packet and a cyclic redundancy check, CRC, operation to determine whether the decision packet is correct.

16. The system of claim 15, wherein the processing device is further configured to generate the accumulated packets comprising identical bits, wherein to generate the accumulated packets, the processing device is further configured to:

performing a bitwise decimal addition on the corrupted data packet and the at least one corrupted retransmitted data packet to generate soft bits in the accumulated data packet.

17. The system of claim 16, wherein each soft bit in the accumulated packet indicates a confidence level of a corresponding bit in the decision packet.

18. The system of claim 15, wherein the at least one corrupted retransmitted data packet comprises a plurality of corrupted retransmitted data packets, and wherein to validate the decision packet, the processing device is further configured to validate the decision packet based on the CRC operation by using a CRC syndrome of a last of the plurality of corrupted retransmitted data packets and a last of the plurality of corrupted retransmitted data packets.

19. The system of claim 15, wherein the processing device is further configured to correct the decision packet in response to determining that the decision packet is incorrect.

20. The system of claim 19, wherein to correct the decision packet, the processing device is further configured to identify a location of at least one erroneous bit in the decision packet based on the accumulated packet.

Technical Field

Aspects of the present disclosure relate generally to wireless communication systems and, more particularly, to bit error correction for wireless retransmission communication systems.

Background

Many wireless communication systems use retransmissions to achieve a reliable communication link between a transmitter and a receiver of the wireless communication system. The number of retransmissions may have a negative impact on the delay and power requirements of the wireless communication between the transmitter and the receiver. For example, real-time or bi-directional audio or video wireless links are sensitive to delay and may limit the number of retransmissions. In another example, wireless streaming applications are less sensitive to delay and may incorporate a large play-out buffer to enable a larger number of retransmissions.

Disclosure of Invention

The present application provides the following:

1) a receiver, comprising: a processing device; a memory; and a non-transitory computer readable medium comprising program instructions that, in response to execution by the processing device, cause the processing device to: receiving corruption of original data packetsData packets, and converting said corrupted dataThe data packet is stored in the memory; receiving at least one corrupted retransmitted data packet of the original data packets and storing the at least one corrupted retransmitted data packet in the memory; generating an accumulated data packet based on the corrupted data packet and the at least one corrupted retransmitted data packet; generating a decision packet for the original packet based on the accumulated packets; and validating the decision packet to determine whether the decision packet is correct.

2) The receiver of item 1), wherein to generate the accumulated data packet, the processing device is further configured to: performing a bitwise decimal addition on the corrupted data packet and the at least one corrupted retransmitted data packet to generate soft bits in the accumulated data packet.

3) The receiver of item 2), wherein each soft bit in the accumulated packet indicates a confidence level of a corresponding bit in the decision packet.

4) The receiver of item 1), wherein the at least one corrupted retransmitted data packet comprises a plurality of corrupted retransmitted data packets, and wherein to validate the decision packet, the processing device is further configured to: validating the decision packet using a Cyclic Redundancy Check (CRC) syndrome of a last of the plurality of corrupted retransmitted data packets and a last of the plurality of corrupted retransmitted data packets.

5) The receiver of item 1), wherein the processing device is further configured to:

in response to determining that the decision packet is incorrect, correcting the decision packet.

6) The receiver of item 5), wherein to correct the decision packet, the processing device is further configured to: based on the accumulated packet, a location of at least one erroneous bit in the decision packet is identified.

7) The receiver of item 6), wherein to correct the decision packet, the processing device is further configured to: the decision packet is corrected using CRC error correction.

8) A method, comprising: receiving corruption of original data packetsA data packet and at least one corrupted retransmitted data packet of said original data packet; generating an accumulated data packet based on the corrupted data packet and the at least one corrupted retransmitted data packet; generating a decision packet for the original packet based on the accumulated packets; and validating the decision packet to determine whether the decision packet is correct.

9) The method of item 8), wherein generating the accumulated packet comprises: performing a bitwise decimal addition on the corrupted data packet and the at least one corrupted retransmitted data packet to generate soft bits in the accumulated data packet.

10) The method of item 9), wherein each soft bit in the accumulated packet indicates a confidence level of a corresponding bit in the decision packet.

11) The method of item 8), wherein the at least one corrupted retransmitted data packet comprises a plurality of corrupted retransmitted data packets, and wherein validating the decision packet comprises: validating the decision packet using a Cyclic Redundancy Check (CRC) syndrome of a last of the plurality of corrupted retransmitted data packets and a last of the plurality of corrupted retransmitted data packets.

12) The method of item 8), further comprising: in response to determining that the decision packet is incorrect, correcting the decision packet.

13) The method of item 12), wherein correcting the decision packet comprises: based on the accumulated packet, a location of at least one erroneous bit in the decision packet is identified.

14) The method of item 13), wherein correcting the decision packet comprises: the decision packet is corrected using CRC error correction.

15) A kind ofA system, comprising: a transmitter configured to transmit an original data packet; and a receiver, the receiver comprising: a processing device configured to: receiving corruption of said original data packetA data packet and at least one corrupted retransmitted data packet of said original data packet; generating an accumulated data packet based on the corrupted data packet and the at least one corrupted retransmitted data packet; generating a decision packet for the original packet based on the accumulated packets; and validating the decision packet to determine whether the decision packet is correct.

16) The system of item 15), wherein to generate the accumulated data packet, the processing device is further configured to: performing a bitwise decimal addition on the corrupted data packet and the at least one corrupted retransmitted data packet to generate soft bits in the accumulated data packet.

17) The system of item 16), wherein each soft bit in the accumulated packet indicates a confidence level of a corresponding bit in the decision packet.

18) The system of item 15), wherein the at least one corrupted retransmitted data packet comprises a plurality of corrupted retransmitted data packets, and wherein to validate the decision packet, the processing device is further configured to: validating the decision packet using a Cyclic Redundancy Check (CRC) syndrome of a last of the plurality of corrupted retransmitted data packets and a last of the plurality of corrupted retransmitted data packets.

19) The system of item 15), wherein the processing device is further configured to: in response to determining that the decision packet is incorrect, correcting the decision packet.

20) The system of item 19), wherein to correct the decision packet, the processing device is further configured to: based on the accumulated packet, a location of at least one erroneous bit in the decision packet is identified.

Brief Description of Drawings

The described embodiments and their advantages are best understood by referring to the following description taken in conjunction with the accompanying drawings. These drawings in no way limit any changes in form and detail that may be made to the described embodiments by one skilled in the art without departing from the spirit and scope of the described embodiments.

Fig. 1 illustrates an example wireless network architecture in accordance with some embodiments of the present disclosure.

Fig. 2 illustrates example generation of an accumulation packet and a decision packet according to some embodiments of the present disclosure.

Fig. 3 illustrates an example CRC syndrome table (syndrome table) in accordance with some embodiments of the present disclosure.

Fig. 4A illustrates a flow diagram of a method of bit error correction according to some embodiments of the present disclosure.

Fig. 4B illustrates a flow diagram of another method of bit error correction according to some embodiments of the present disclosure.

Fig. 5 is a block diagram of an example receiver that may perform one or more operations described herein, in accordance with some embodiments of the present disclosure.

Detailed Description

A bit error (bit error) may indicate the communication quality of a wireless communication link between a transmitter and a receiver in a wireless network. One type of bit error is a random bit error. Random bit errors may be caused by some persistent channel impairments (e.g., weak signals due to physical obstructions or distances) and may include bit errors that are approximately evenly distributed among the transmitted packets. One solution to prevent random bit errors is to retransmit the originally transmitted data packet one or more times until an error-free data packet is received. That is, after the transmitter retransmits the originally transmitted data packet multiple times, an error-free data packet can be received at the receiver.

Some retransmission solutions simply drop corrupted received packets and rely only on error-free reception of subsequent retransmissions. For example, even a single bit error in a received data packet may result in a failure of a Cyclic Redundancy Check (CRC) at the receiver and retransmission of the data packet. Thus, these solutions may require a large number of retransmissions to overcome random bit errors. For example, for a 610 byte data packet, a large number (e.g., more than 10) of retransmissions may be required to achieve a required or desired Bit Error Rate (BER), such as 0.01%, for the wireless communication link. A large number of retransmissions may reduce the transmission rate and consume more power at the transmitter and receiver. Therefore, it may be desirable to use a small number (e.g., less than 5) of retransmissions to achieve a required or desired BER.

Examples, implementations, and embodiments described herein may use a small number (e.g., less than 5) of retransmissions to achieve a required or desired BER and provide power and delay savings and low complexity.

Fig. 1 illustrates an example network architecture 100 in accordance with some embodiments of the present disclosure. As shown in fig. 1, the network architecture 100 may include a transmitter 101 and a receiver 102. As indicated by arrow 103, the transmitter 101 may transmit a wireless radio frequency signal carrying data packets (or data messages, frames, etc.) to the receiver 102. The receiver 102 may receive the transmitted signal to extract the data packets. If the receiver 102 detects that the transmitted data packet was received correctly without bit errors, the receiver 102 may send a notification, such as an Acknowledgement (ACK), to the transmitter 101. The transmitter 101 will not retransmit the correctly received data packet. On the other hand, if the receiver 102 detects that the received data packet is a corrupted data packet including one or more bit errors, the receiver 102 may send a notification, such as a Negative Acknowledgement (NACK), to the transmitter 101. The transmitter 101 will retransmit the data packet to the receiver 102. The circle 110 shown in fig. 1 may represent the range of radio frequency signals transmitted by the transmitter 101. Receivers, such as receiver 102, located within circle 110 may be capable of receiving radio frequency signals transmitted by transmitter 101.

In one embodiment, network architecture 100 may beA network.Network canTo be a wireless network including network devices that communicate using radio frequencies, protocols, standards, data formats, etcSpecial interest group (SIG). In this embodiment, the transmitter 101 may beThe transmitter, and the receiver 102 may beAnd a receiver. The data packets transmitted from the transmitter 101 to the receiver 102 may beAnd (6) data packet. In some embodiments of the present invention, the, the network (e.g.,devices within a network) may useLow energy standard.

In other embodiments, the network architecture 100 may be other wireless networks including, but not limited to, cellular networks (e.g., Long Term Evolution (LTE) networks), Wireless Local Area Networks (WLANs), wireless sensor networks, and satellite communication networks. Network architecture 100 may also include other nodes, components, and/or devices not shown in fig. 1.

To achieve a required or desired BER using a small number (e.g., less than 5) of retransmissions and provide significant power and delay savings and low complexity, in some examples, implementations, and embodiments described herein, the receiver 102 may not discard corrupted received packets because multiple corrupted received packets of the same transmitted packet may provide useful information to determine the location of bit errors in the corrupted received packets. The receiver 102 may combine multiple corrupted received packets of the same transmitted packet to generate one or more accumulated packets that include soft bits (soft bits). The receiver 102 may use one or more accumulated packets to generate a decision packet that may be used as a guess for the original transmitted packet. The receiver 102 may verify that the determination is that the data packet is a correctly received data packet without bit errors. If it is determined that the data packet includes one or more bit errors, the receiver 102 may correct the bit errors using CRC error correction.

The examples, embodiments and examples described herein are primarily set forth inDescribed in the context of a network. That is, the network architecture 100 is comprised ofA transmitter 101 andof systems of receivers 102A network. However, it should be understood that the network architecture 100 may be other wireless networks including, but not limited to, cellular networks (e.g., Long Term Evolution (LTE) networks), Wireless Local Area Networks (WLANs), wireless sensor networks, and satellite communication networks, as mentioned above.

Fig. 2 illustrates an exemplary accumulated packet and a decision packet according to some embodiments of the present disclosure. The transmitter 101 may transmit the carrier original to the receiver 102The radio frequency signal of data packet 201. The receiver 102 can receivePacket 211 and performs a CRC to determine whether packet 211 is a correctly received packet of original packet 201 without bit errors. In one embodiment, data packet 211 may be a corrupted data packet that includes one or more bit errors (such as bit error 2111). Thus, the CRC at the receiver 102 will fail. The receiver 102 may generate an accumulated packet 212 and a Majority Decision Packet (MDP) 213 based on the packet 211. When the receiver 102 receives only the data packet 211, the accumulated data packet 212 and the MDP 213 may be the same as the received data packet 211.

In one embodiment, because packet 211 is corrupt from original packet 201The data packet, so the receiver 102 can request the transmitter 101 to retransmit the data packet of the original data packet 201. The receiver 102 may receive the retransmitted data packet 221 of the original data packet 201. Similarly, as described above, the receiver 102 may perform a CRC to determine whether the received retransmitted data packet 221 is correct. The received retransmission data packet 221 may be a corrupted data packet that includes one or more bit errors, such as bit error 2211. The receiver 102 may generate an accumulated data packet 222 including soft bits based on the data packet 211 and the retransmission data packet 221.

In one embodiment, the receiver 102 may generate the accumulated packets 222 by performing a bitwise decimal addition of the corrupted packets 211 and the received retransmitted packets 221 to generate soft bits in the accumulated packets 222. For example, as shown in fig. 2, the data packet 211 may include a bit stream "011010001011011", and the retransmission data packet 221 may include a bit stream "011000001011001" at the position of the corresponding bit. The receiver 102 may add bits from the data packet 211 and corresponding bits from the retransmitted data packet 221 to generate the accumulated data packet 222 to include the soft bit stream "022010002022012", as shown in fig. 2. In this example, bit 2112 in packet 221 is 1 and bit 2212 at the position of the corresponding bit in retransmission packet 221 is also 1, so soft bit 2221 at the position of the corresponding bit in accumulation packet 222 has a value of 2 (i.e., 1+ 1). In other embodiments, the receiver 102 may compare the corrupted data packet 211 with the received retransmitted data packet 221 to identify bit positions having different bit values. The identified bit positions may indicate possible bit errors.

In one embodiment, the receiver 102 may generate the MDP 223 based on the accumulated data packets 222. MDP 223 may be used as the originalGuesswork of packet 201. Each soft bit in the accumulated packet 222 may indicate a confidence level of the corresponding bit in the MDP 223. For example, in the first transmission, bit 2112 is 1, and in the second transmission (first retransmission), bit 2212 at that bit position is also 1. Thus, the probability that the correct bit for that bit position is a 1 instead of a 0 is higher because the bit value at that bit position is the same in both transmissions (one original transmission and one retransmission). Thus, a soft bit 2221 having a value of 2 may indicate that it has a higher confidence level, i.e., that the correct bit at that bit position is 1. Thus, the receiver 102 may determine that bit 2231 (the guess of the correct bit) at this bit position is a 1 in the MDP 223.

On the other hand, in the first transmission, bit 2113 is 1, and in the second transmission (first retransmission), bit 2211 at that bit position is 0. Thus, at that bit position, it is not certain whether the correct bit at that position is a 1 or a 0, because the bit value at that bit position is different in the two transmissions. Thus, a soft bit 2222 having a value of 1 may indicate that the receiver 102 may not be able to determine whether the correct bit at that location is a 1 or a 0. Thus, the receiver 102 may determine that in the MDP 223, the bit 2232 (a guess of the correct bit) at that bit position may be a 1 or a 0, such as "? "is shown. The receiver 102 may set bit 2232 in the MDP 223 to either a 1 or a 0 as a guess for this bit.

In one embodiment, the receiver 102 may request more than one retransmission of the original data packet 201 to gather more useful information to determine the location of bit errors in the received corrupted data packet. For example, receiver 102 may request a second retransmission of original data packet 201 and receive retransmitted data packet 231, which may include one or more bit errors. The receiver 102 may generate an accumulated packet 232 based on the packet 211, the received retransmission packets 221 and 231. Similarly to the above, the receiver 102 may generate the accumulated packet 232 by performing a bit-by-bit decimal addition on the packet 211 and the received retransmission packets 221 and 231. For example, bit 2311 in packet 231 is a 1, and thus, the soft bit 2321 at the corresponding bit position in the accumulated packet 232 has a value of 2 (i.e., 1+0+ 1).

Likewise, the receiver 102 may generate the MDP 233 based on the accumulated packets 232, similar to that described above. MDP 233 may be used as the originalGuesswork of packet 201. For example, a soft bit 2321 with a value of 2 may indicate that it has a higher confidence level that the correct bit at that bit position is 1. This is because in three transmissions (one original transmission and two retransmissions), two of the three bit values at that bit position (i.e., bits 2113 and 2311) are 1. Thus, the receiver 102 can determine that bit 2331 (the guess of the correct bit) at that bit position is a 1 in MDP 233.

Similarly as described above, the receiver 102 may request a third retransmission and receive a retransmitted data packet 241, which may include one or more bit errors. The receiver 102 may generate an accumulated packet 242 based on the four received corrupted packets (211, 221, 231, and 241). Further, the receiver 102 may generate an MDP 243 based on the accumulated packets 242. MDP 243 may be used as the origin Guesswork of packet 201.

In one embodiment, for a total of N transmissions (1 original transmission + (N-1) retransmissions), when N is an even number, if the value of the soft bits in the accumulated packet is higher thanThe corresponding bit in the generated MDP is 1; if the value of the soft bit is equal toThe corresponding bit in the generated MDP may be 1 or 0; if the value of the soft bit is less thanThe corresponding bit in the generated MDP is 0. For example, as shown in fig. 2, when the original data packet 201 has a total of 4 transmissions, if the value of the soft bit in the accumulated data packet 242 is 3 or 4, the corresponding bit in the generated MDP is 1; if the soft bits in the accumulated packet 242 have a value of 2, the corresponding bits in the generated MDP may be 1 or 0, as represented by "? "is shown; if the soft bits in the accumulated packet 242 have a value of 0 or 1, then the corresponding bits in the generated MDP are 0. In another example, when N is an odd number, if the value of the soft bit in the accumulated packet is equal to or higher thanThe corresponding bit in the generated MDP is 1; otherwise, the corresponding bit in the generated MDP is 0.

In one embodiment, the confidence level in each bit position as indicated by the soft bits in the accumulated data packet may increase as the number of retransmissions increases. In one embodiment, the receiver 102 may determine whether to request another retransmission based on a confidence level in each bit position as indicated by the soft bits in the accumulated data packet. For example, if a predetermined number (e.g., 10) of soft bits in the accumulated data packet indicates that the correct bit may be 1 or 0 (i.e., indeterminate), the receiver 102 may request more retransmissions. Otherwise, the receiver 102 may request a small number (e.g., 2-3) of retransmissions.

In one embodiment, for multiple retransmissions, the receiver 102 may use the MDP generated in the last retransmission as the best guess for the original data packet. For example, the receiver 102 may use the MDP 243 in the last retransmission as the best guess for the original packet 201, because the accumulated packet 242 generated in the last retransmission includes the most useful information to determine the location of bit errors in the received corrupted packets 211, 221, 231, and 241. In one embodiment, after receiving the retransmitted data packet, the receiver 102 may store the generated accumulated data packet in a memory of the receiver 102 and use the MDP generated based on the last accumulated data packet as a best guess for the original data packet.

In one embodiment, if the received packet passes the CRC, the receiver 102 may determine that the received packet is correct and no retransmission is required. For example, if the received data packet 221 is correct in the first retransmission, the receiver 102 will not request the transmitter 101 to perform a second or third retransmission. That is, if the received packet 221 is correct, the receiver 102 will not receive the retransmission packet 231 or 241.

After generating the MDP as the best guess for the original packet, the receiver 102 needs to verify the MDP to determine if the MDP is the correct original packet. For example, the receiver 102 may use the MDP 243 as a best guess for the original data packet 201 and determine whether the MDP 243 is the same as the original data packet 201. Direct CRC calculation of MDPs in CRC hardware or firmware of the receiver 102 may be too complex and impractical. In one embodiment, receiver 102 may use the Last Received Corrupted Packet (LRCP), such as packet 241 in fig. 2, and a stored CRC syndrome table to determine whether MDP 243 is correct.

Fig. 3 illustrates an example CRC syndrome table 300 in accordance with some embodiments of the present disclosure. Table 300 lists CRC syndromes for a bit stream that includes 480 bits (464 data bits and 16 CRC bits). For a 480-bit stream, there may be 480 single bit error patterns, each pattern including a single bit error at a corresponding bit position of the 480 bit positions. Each bit error pattern may be represented as a bit stream including 479 0 s and bit 1 at a bit error position, as shown in fig. 3. Each of the 480 bit error patterns is input to CRC generator 301, and CRC generator 301 may generate a syndrome, e.g., syndrome 1-syndrome 480, for each of the 480 bit error patterns. CRC syndrome table 300 may be pre-computed and stored in a memory, such as a Read Only Memory (ROM) or a slow access memory of receiver 102. Alternatively, CRC syndrome table 300 may be calculated during a setup or initialization phase of the wireless link between transmitter 101 and receiver 102. CRC syndrome table 300 may be pre-computed in the firmware or CRC hardware of receiver 102. In other embodiments, the CRC syndrome table may include syndromes for bit streams that include different numbers of bits.

As described above, for multiple retransmissions, the receiver 102 may use the Last Received Corrupted Packet (LRCP), such as packet 242, and a CRC syndrome table, such as table 300, among multiple received corrupted packets to determine whether the MDP 243 is correct. In one embodiment, the receiver 102 may compute a bitwise exclusive-or between the LRCP241 and the MDP 243. The resulting bit stream may include 0 s and one or more 1 s. The receiver 102 may extract one or more pre-computed syndromes corresponding to the locations of one or more 1's. For example, if the position of 1 in the resulting bit stream is the first bit in the resulting bit stream, receiver 102 may extract syndrome 480, as shown in fig. 3. In another example, if there are multiple 1's in the resulting bit stream, the receiver 102 may extract multiple syndromes corresponding to the multiple 1's.

In one embodiment, after receiving LRCP241, receiver 102 may perform a CRC to determine whether LRCP241 is correct. Because LRCP241 is incorrect, the CRC check generates a non-zero CRC syndrome or remainder of LRCP241, which may be stored in memory of receiver 102. Receiver 102 may compute a bitwise xor between the one or more extracted pre-computed syndromes and the non-zero CRC syndrome of LRCP 241. If there are multiple extracted pre-computed syndromes, receiver 102 may first compute a bitwise XOR between the multiple syndromes to generate a permuted syndrome and then compute a bitwise XOR between the permuted syndrome and a non-zero CRC syndrome of LRCP 241. If the resulting bit stream includes all 0 s, the receiver 102 may determine that the MDP 243 is correct. If the resulting bit stream includes one or more 1 s, then the receiver 102 may determine that the MDP 243 is incorrect, with one or more bit errors. In one example, the MDP 243 is incorrect only if a bit error occurs multiple times at the same bit position, and more times than the number of times the bit at that bit position is correctly received. This may be less and less the case as the number of retransmissions increases.

In one embodiment, if the receiver 102 determines that the MDP 243 is incorrect, the receiver 102 may perform CRC error correction to correct one or more bit errors in the MDP. The receiver 102 may identify bit positions in the MDP 243 with a low confidence level based on the soft bits in the accumulated data packet 242. In one example, if a soft bit at a bit position in the accumulated packet 242 indicates that the correct bit may be a 1 or a 0, that bit position may be identified as a bit position with a low confidence level. For example, in the accumulated packet 242, the soft bit 2421 has a value of 2, which indicates that bit 2431 in the MDP 243 may be a 1 or a 0. Thus, the bit position of bit 2431 in MDP 243 is a bit position with a low confidence level.

In one embodiment, for a total of N transmissions (1 original transmission + (N-1) retransmissions), when N is an even number, the bit positions with low confidence levels may be soft-valued toThose bit positions of (a). When N is an odd number, the bit positions with low confidence levels may be soft-valuedAnd/orThose bit positions of (a).

After one or more bit positions having a low confidence level in an MDP (such as MDP 243) are identified, the receiver 102 may extract one or more pre-computed syndromes corresponding to the one or more bit positions having a low confidence level from a CRC syndrome table, such as table 300. For example, if the bit position with a low confidence level is the last bit in the MDP 243, the receiver 102 may extract syndrome 1 as shown in fig. 3.

In one embodiment, receiver 102 may compute a bitwise xor between one or more pre-computed syndromes and the non-zero CRC syndrome of LRCP 241. If multiple pre-computed syndromes are extracted, receiver 102 may first compute a bitwise XOR between the multiple pre-computed syndromes to generate a permuted syndrome and then compute a bitwise XOR between the permuted syndrome and the non-zero CRC syndrome of LRCP 241. If the resulting bit stream includes all zeros, the receiver 102 may determine that one or more of the bits in the MDP 243 at the one or more bit positions having a low confidence level are incorrect. The receiver 102 may flip one or more bits at one or more bit positions having a low confidence level in the MDP 243 to correct one or more bit errors. On the other hand, if the resulting bit stream is a non-zero bit stream including one or more 1 s, the receiver 102 may determine, based on the soft bits in the accumulated packets 242, that there are one or more bit positions in the MDP 243 where there are bit errors that are not recognized by the receiver 102. In this case, the CRC error correction may not be able to correct bit errors for the unidentified bit positions in the MDP 243. Thus, the receiver 102 may request additional retransmissions of the original data packet 201 and perform a CRC to determine whether the additional retransmissions are correct. If not, the receiver 102 may generate a new accumulated data packet based on the additional retransmission and the previous retransmission to generate a new MDP as a best guess for the original data packet 201, similar to that described above.

Fig. 4A is a flow diagram of a method 400 of bit error correction according to some embodiments of the present disclosure. The method 400 may be performed by processing logic that may comprise hardware (e.g., circuitry, dedicated logic, programmable logic, a processor, a processing device, a Central Processing Unit (CPU), a multi-core processor, a system on a chip (SoC), etc.), software (e.g., instructions run/executed on a processing device), firmware (e.g., microcode), or a combination thereof. In some embodiments, the method 400 may be performed by the receiver 102 or a processing device included in the receiver 102 (e.g., the processing device 502 shown in fig. 5).

The method 400 begins at block 401, where the method 400 determines whether an initialization procedure is to be performed for a wireless link between the transmitter 101 and the receiver 102. If the answer at block 401 is yes, the method 400 proceeds to block 402, at block 402, the method 400 calculates and generates a CRC syndrome table (e.g., table 300). If the answer at block 401 is no, the method 400 proceeds to block 403 where the method 400 performs decoding on the originally transmitted data packet (e.g., data packet 201) at block 403. The method 400 proceeds to block 404 to determine if the original data packet was lost, e.g., if the receiver 102 did not receive the data packet 211 over the wireless link. If the answer at block 404 is yes, the method 400 proceeds to block 405, where the transmitter 101 is requested to retransmit the original data packet. If the answer at block 404 is "no," the method 400 proceeds to block 406.

At block 406, the method 400 calculates a CRC of the received packet (e.g., packet 211) to determine whether the received packet is the correct original packet. At block 407, the method 400 determines whether the CRC passed. If the answer at block 407 is yes, indicating that the received data packet is correct, the method 400 proceeds to block 414, where the received data packet is inserted into the play-out buffer. If the answer at block 407 is "no," indicating that the received data packet is incorrect, the method 400 proceeds to block 408. At block 408, the method 400 may generate an accumulated data packet including soft bits, as described above. The method 400 proceeds to block 409 where an MDP is constructed based on the accumulated packets and a CRC is calculated and verified as correct for the MDP, e.g., using the LRCP and stored CRC syndrome table, as described above. The method 400 proceeds to block 410 to determine if the MDP is correct.

If the answer at block 410 is yes, indicating that the MDP is correct, the method 400 proceeds to block 414. If the answer at block 410 is "no," indicating that the MDP is not correct, the method 400 proceeds to block 411 to identify bits or bit positions having a low confidence level based on soft bits in the accumulated data packets, as described above. The method 400 then proceeds to block 412 to perform CRC error correction on the MDP, as described above. The method 400 proceeds to block 413 to determine if the MDP is correct by CRC error correction. If the answer at block 413 is YES, indicating that the MDP was corrected, the method 400 proceeds to block 414. If the answer at block 413 is no, indicating that the MDP was not corrected, which may be due to an unrecognized bit position with a bit error, the method 400 proceeds to 405 to request the transmitter 101 to retransmit the original data packet.

Fig. 4B illustrates a flow diagram of another method 420 of bit error correction according to some embodiments of the present disclosure. Method 420 may be performed by processing logic that may include hardware (e.g., circuitry, dedicated logic, programmable logic, a processor, a processing device, a Central Processing Unit (CPU), a multi-core processor, a system on a chip (SoC), etc.), software (e.g., instructions run/executed on a processing device), firmware (e.g., microcode), or a combination thereof. In some embodiments, method 420 may be performed by receiver 102 or a processing device included in receiver 102 (e.g., processing device 502 shown in fig. 5).

The method 420 begins at block 421, where the method 420 includes receiving a corruption of an original data packetThe data packet and at least one of the original data packets are retransmitted data packets. At block 422, the method 420 includes generating an accumulated data packet based on the corrupted data packet and the at least one retransmitted data packet. At block 423, the method 420 includes generating a decision packet for the original packet based on the accumulated packets. At block 424, the method 420 includes validating the decision packet to determine whether the decision packet is correct.

Fig. 5 is a block diagram of an example receiver 102 that may perform one or more operations described herein, in accordance with some embodiments. In one embodiment, receiver 102 includes a memory 501 and a processing device 502. As described above, the memory 501 may be a synchronous Dynamic Random Access Memory (DRAM), a Read Only Memory (ROM), or other type of memory that may be configured to store the generated accumulated packets and the CRC syndrome table. The processing device 502 may be provided by one or more general-purpose processing devices, such as a microprocessor, central processing unit, or the like. In an illustrative example, the processing device 502 may include a Complex Instruction Set Computing (CISC) microprocessor, Reduced Instruction Set Computing (RISC) microprocessor, Very Long Instruction Word (VLIW) microprocessor, or a processor implementing other instruction sets or processors implementing a combination of instruction sets. The processing device 502 may also include one or more special-purpose processing devices such as an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a Digital Signal Processor (DSP), network processor, or the like. In accordance with one or more aspects of the present disclosure, the processing device 502 may be configured to perform the operations described herein for performing the operations and steps discussed herein.

In other embodiments, receiver 102 may also include other components and/or devices not shown in fig. 5. For example, receiver 102 may also include one or more antennas, analog-to-digital converters, demodulators/decoders, and/or other components.

Unless specifically stated otherwise, terms such as "receiving," "generating," "verifying," "performing," "correcting," "identifying," or the like, refer to the actions and processes performed or carried out by a computing device that manipulates and transforms data represented as physical (electronic) quantities within the computing device's registers and memories into other data similarly represented as physical quantities within the computing device memories or registers or such information storage, transmission or display devices.

Examples described herein also relate to an apparatus for performing the operations described herein. The apparatus may be specially constructed for the desired purposes, and/or it may comprise a general purpose computing device selectively programmed by a computer program stored in the computing device. Such a computer program may be stored in a computer readable non-transitory storage medium.

Certain embodiments may be implemented as a computer program product that may include instructions stored on a machine-readable medium. These instructions may be used to program a general-purpose or special-purpose processor to perform the operations described. A machine-readable medium includes any mechanism for storing or transmitting information (e.g., software, processing applications) in a form readable by a machine (e.g., a computer). The machine-readable medium may include, but is not limited to, magnetic storage medium (e.g., a floppy disk), optical storage medium (e.g., a CD-ROM), magneto-optical storage medium, Read Only Memory (ROM), Random Access Memory (RAM), erasable programmable memory (e.g., EPROM and EEPROM), flash memory, or another type of medium suitable for storing electronic instructions. The machine-readable medium may be referred to as a non-transitory machine-readable medium.

The methods and illustrative examples described herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may be used with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method steps. The required structure for a variety of these systems will appear as set forth in the description above.

The above description is intended to be illustrative, and not restrictive. While the present disclosure has been described with reference to particular illustrative examples, it will be appreciated that the present disclosure is not limited to the described examples. The scope of the disclosure should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes" and/or "including," when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Furthermore, the terms "first," "second," "third," "fourth," and the like as used herein are intended as labels to distinguish between different elements and may not necessarily have the sequential meaning specified in terms of their numerical designation. Thus, the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting.

It should also be noted that, in some alternative implementations, the functions/acts noted may occur out of the order noted in the figures. For example, two figures shown in succession may, in fact, be executed substantially concurrently, or the figures may sometimes be executed in the reverse order, depending upon the functionality/acts involved.

Although the method operations are described in a particular order, it should be understood that other operations may be performed between the described operations, the described operations may be adjusted so that they occur at slightly different times, or the described operations may be distributed in systems that allow the processing operations to occur at various time intervals associated with the processing.

Various units, circuits, or other components may be described or claimed as being "configured to" or "configurable to" perform one or more tasks. In such a context, the phrase "configured to" or "configurable to" is used to connote structure by indicating that the units/circuits/components include structure (e.g., circuitry) that performs one or more tasks during operation. Thus, a unit/circuit/component may be considered to be configured to perform a task or may be configured to perform a task even when the specified unit/circuit/component is not currently operating (e.g., not operating). The units/circuits/components used with the "configured to" or "configurable to" language include hardware, e.g., circuitry that stores program instructions executable to perform operations, memory, etc. Recitation of a unit/circuit/component being "configured to" perform or being "configurable to" perform one or more tasks is expressly not intended to imply that the unit/circuit/component is cited in U.S. code 35, clause 112, paragraph 6. Additionally, "configured to" or "configurable to" may include class structures (e.g., class circuits) (e.g., FPGAs or general purpose processors executing software) manipulated by software and/or firmware to operate in a manner that enables performance of the tasks at issue. "configured to" may also include adapting a manufacturing process (e.g., a semiconductor manufacturing facility) to manufacture a device (e.g., an integrated circuit) suitable for accomplishing or performing one or more tasks. "configurable" is expressly not intended to apply to a blank medium, an unprogrammed processor, or an unprogrammed computer-like or unprogrammed programmable logic device, programmable gate array, or other unprogrammed device, except in the absence of a programming medium that would accompany the ability of an unprogrammed device to be configured to perform the disclosed functions.

The foregoing description, for purpose of explanation, has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the embodiments and its practical application, to thereby enable others skilled in the art to best utilize the embodiments and various modifications as may be suited to the particular use contemplated. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the invention is not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.