阅读说明：本技术 一种防止误触发的防拆电路结构及方法 (Anti-dismantling circuit structure and method for preventing false triggering ) 是由 刘静静 何宁宁 刘戬 于 2021-07-15 设计创作，主要内容包括：本发明公开了一种防止误触发的防拆电路结构及方法,包括供电电路模块、防拆检测电路模块、互补型防拆检测电路模块、防拆信号稳定电路模块、冗余判断电路模块、安全芯片。防拆检测电路输出信号和互补型防拆检测电路的输出信号同时进入防拆信号稳定电路,防拆信号稳定电路的输出信号到安全芯片相应的检测端口,同时,冗余判断电路输出的信号输出到安全芯片另一个端口。本发明设置了互补型防拆检测电路和防拆信号稳定电路,可以有效地防止防拆电路本身故障引起的误触发；结合冗余判断电路,在安全芯片端对接收到的触发信号进行冗余判断,可以有效地保障电路通路上触发信号的正确性和稳定性。(The invention discloses a false triggering prevention anti-disassembly circuit structure and a false triggering prevention anti-disassembly circuit method. The output signal of the anti-dismantling detection circuit and the output signal of the complementary anti-dismantling detection circuit simultaneously enter the anti-dismantling signal stabilizing circuit, the output signal of the anti-dismantling signal stabilizing circuit is transmitted to the corresponding detection port of the safety chip, and meanwhile, the signal output by the redundancy judgment circuit is transmitted to the other port of the safety chip. The complementary anti-disassembly detection circuit and the anti-disassembly signal stabilizing circuit are arranged, so that false triggering caused by the fault of the anti-disassembly circuit can be effectively prevented; and the redundancy judgment circuit is combined to perform redundancy judgment on the received trigger signal at the safety chip end, so that the correctness and stability of the trigger signal on a circuit path can be effectively guaranteed.)

1. A tamper-evident circuit method for preventing false triggering, the method comprising: the first measure is as follows: the anti-dismounting detection circuit module (101) generates a signal A by detecting whether violent anti-dismounting action exists in the environment, and meanwhile, the complementary anti-dismounting detection circuit module (102) generates a signal B; and step two: the anti-dismantling signal stabilizing circuit module (103) performs logic processing on the received signal A and the signal B, filters out false trigger signals and generates a signal C; taking the third step: according to the signal generated by the anti-disassembly detection circuit module (101), the redundancy judgment circuit module (104) generates a signal D; and step four: the safety chip (105) is combined with the received signal C and the signal D, judges whether false triggering exists or not by judging whether the signal C and the signal D are simultaneously trigger signals or not, and carries out corresponding safety operation.

2. A tamper-proof circuit structure for preventing false triggering, for implementing the tamper-proof circuit method of claim 1, comprising: the device comprises a power supply circuit module (100), a tamper detection circuit module (101), a complementary tamper detection circuit module (102), a tamper signal stabilizing circuit module (103), a redundancy judgment circuit module (104) and a safety chip (105); the power supply circuit module (100) provides power, the anti-dismantling detection circuit module (101) generates a signal A according to whether illegal dismantling operation exists outside, and the signal A enters the anti-dismantling signal stabilizing circuit module (103); the complementary type anti-dismantling detection circuit module (102) and the anti-dismantling detection circuit module (101) detect the same illegal dismantling operation, the generated signal and the signal generated by the anti-dismantling detection circuit module (101) are complementary type signals, the complementary type anti-dismantling detection circuit module (102) generates a signal B according to whether the illegal dismantling operation exists outside, and the signal B enters the anti-dismantling signal stabilizing circuit module (103); the anti-dismantling signal stabilizing circuit module (103) judges the received signal A and the signal B, and finally generates a signal C after error filtering, wherein the signal C is connected to a port 1 of the safety chip (105); the redundancy judgment circuit module (104) directly judges the signal generated by the tamper detection circuit module (101) again to generate a signal D, and the signal D is connected to the port 2 of the security chip (105).

3. The tamper circuit arrangement for preventing false triggering according to claim 1, wherein the complementary tamper detection circuit module (102) has a complementary confirmation of the signal a generated by the tamper detection circuit module (101), and the generated signal B is a complementary signal of the signal a. The signal A and the signal B are two complementary signals generated for the same tamper-proof action, and the two signals have opposite phases.

4. The anti-tamper circuit structure for preventing false triggering according to claim 1, wherein the anti-tamper signal stabilizing circuit module (103) has a function of filtering out false triggering for a received signal, so as to ensure that when the anti-tamper detection circuit module (101) or the complementary anti-tamper detection circuit module (102) generates false triggering, the correctness of the signal C output to the security chip (105) is not affected.

5. The anti-tamper circuit structure for preventing false triggering according to claim 1, wherein the redundancy judgment circuit module (104) performs redundancy judgment on the signal C output by the anti-tamper signal stabilization circuit module (103), the signal D generated by the redundancy judgment circuit module (104) is connected to the port 2 of the security chip (105), and the signal D generated by the redundancy judgment circuit module (104) may be a level signal, a character signal, or a character string signal.

6. A tamper-evident circuit arrangement for preventing false triggering according to claim 1, wherein said security chip (105) has two ports for receiving a trigger signal: the port 1 receives a signal C sent by the tamper-proof signal stabilizing circuit module (103), the port 2 receives a signal D sent by the redundancy judging circuit module (104), the signal D forms primary redundancy judgment on the signal C, the safety chip (105) receives the signal C and the signal D simultaneously, the signal D is used as supplementary judgment of the signal C, and different judging logics are designed according to the signal D.

Technical Field

The invention belongs to the field of board-level design, and particularly relates to a tamper circuit structure and a tamper circuit method for preventing false triggering.

Background

With the wide application of mobile payment, the use of the point-of-sale terminal is more and more, and once the anti-dismantling circuit is triggered, the point-of-sale terminal cannot be used, so that the anti-dismantling circuit design for effectively preventing false triggering is particularly urgent.

The anti-tamper circuit structure is crucial to the safety of the point-of-sale terminal, and a lot of researches are currently explored for the design of the anti-tamper circuit, wherein the low-power-consumption design of the anti-tamper circuit, the signal processing of a multi-path anti-tamper circuit and the power supply of the anti-tamper circuit are greatly progressed, but the research on the false touch detection of the anti-tamper circuit is not available. The invention discloses an anti-disassembly circuit structure for preventing false triggering, which has the characteristics of simple structure, wide applicability and multiple judgment and verification and is suitable for point-of-sale terminals with the requirement of preventing false triggering and other board-level anti-disassembly structures.

Disclosure of Invention

The invention provides a false triggering prevention circuit structure which is suitable for a board-level false triggering prevention circuit design, can effectively prevent false triggering caused by environment or unstable factors of a circuit, is additionally provided with a redundancy judgment circuit to perform redundancy judgment on a false triggering signal, and can effectively ensure that a triggering signal received by a final safety chip is a real and effective triggering signal.

According to the invention, the anti-tamper detection circuit module (101) is one of the main components of the anti-tamper circuit, the output signal of the anti-tamper detection circuit module is directly connected to the safety chip in the design of the general anti-tamper circuit, and in the design, on the basis of the anti-tamper detection circuit module (101), the complementary anti-tamper detection circuit module (102), the anti-tamper signal stabilizing circuit module (103) and the redundancy judgment circuit module (104) are added, so that the influence of false triggering on the anti-tamper circuit is filtered while the effective triggering signal received by the safety chip is ensured, and the accuracy of the signal received by the safety chip is realized.

In the anti-tamper detection circuit module (101), the anti-tamper circuit can have one or more anti-tamper circuits, the anti-tamper detection circuit module (101) and the complementary anti-tamper detection circuit module (102) have correlation, the correlation coefficient is 1, namely, under the condition that no fault occurs, a signal A generated by the anti-tamper detection circuit module (101) and a signal B generated by the complementary anti-tamper detection circuit module (102) have the characteristic of completely opposite phases.

In the anti-tamper detection circuit module (101), a generated signal A enters the anti-tamper signal stabilization circuit module (103), the anti-tamper signal stabilization circuit module (103) simultaneously receives the signal A generated by the anti-tamper detection circuit module (101) and a signal B generated by the complementary anti-tamper detection circuit module (102), and the anti-tamper signal stabilization circuit module (103) performs anti-false triggering screening processing on the signal A and the signal B through judgment logic to generate a final signal C to a port 1 of a security chip (105).

In the redundancy judgment circuit module (104), the redundancy judgment circuit module (104) judges on the basis of the circuit of the anti-disassembly detection circuit module (101) to generate a signal D for filtering misoperation, and the signal D generated by the redundancy judgment circuit module (104) is connected to a port 2 of a safety chip (105).

In the safety chip (105), a chip port 1 receives a signal C from the tamper-proof signal stabilizing circuit (103), a chip port 2 receives a signal D from the redundancy judging circuit module (104), and the safety chip (105) can have multiple processing modes: the signal C received by the port 1 can be used as a trigger signal of the whole anti-disassembly structure, and the signal D received by the port 2 can be used as a redundancy supplement judgment signal; the signal C and the signal D may be both used as trigger input signals, for example, in the third design of the specific embodiment, the signal C and the signal D are the same level signals, or the signal C received at the port 1 and the signal D received at the port 2 may be directly subjected to exclusive or logic to determine whether the signals are the same, so as to generate a final trigger result. The signal D of the redundancy judgment circuit module (104) comprises signals such as but not limited to level, character or character string and the like.

Compared with the prior art, the invention has the beneficial effects that: on one hand, the effect of simultaneously detecting the trigger signal can be achieved through the complementary anti-disassembly detection circuit module (102), a signal A generated by the anti-disassembly detection circuit module (101) and a signal B generated by the complementary anti-disassembly detection circuit module (102) simultaneously enter the anti-disassembly stable circuit module (103), and the signals are identified through the anti-disassembly stable circuit module (103), so that the situation that the anti-disassembly detection circuit module (101) is influenced to generate the false trigger signal can be effectively avoided; on the other hand, the anti-disassembly circuit can be subjected to supplementary judgment through the redundancy judgment circuit module (104), so that the trigger signal error caused on the trigger signal transmission route is prevented.

Drawings

Fig. 1 is a schematic diagram of a tamper-proof circuit for preventing false triggering according to the present invention.

Fig. 2 is a schematic diagram of a complementary tamper-proof circuit module in a tamper-proof circuit structure for preventing false triggering according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of a tamper signal stabilizing circuit module in a tamper-proof circuit structure for preventing false triggering according to a second embodiment of the present invention.

Fig. 4 is a schematic diagram of a redundancy judgment circuit module in a tamper-proof circuit structure for preventing false triggering according to a third embodiment of the present invention.

Detailed Description

In order to more clearly describe the technical scheme of the invention, the invention is described in detail with reference to the accompanying drawings and specific embodiments. It should be noted that, without conflict, any combination between the embodiments or technical features described below may form a new embodiment.

Fig. 1 shows a tamper-proof circuit structure for preventing false triggering, which is characterized in that: on the basis of the anti-disassembly detection circuit module (101), a complementary anti-disassembly detection circuit module (102) is added, a signal B generated by the complementary anti-disassembly detection circuit module (102) has an opposite phase relation with a signal A generated by the anti-disassembly detection circuit module (101), and the signal A and the signal B are processed by the anti-disassembly signal stabilizing circuit module (103) to generate a final signal C to the safety chip (105), so that a false triggering signal generated by the self fault or disturbance of the anti-disassembly detection circuit module (101) is avoided; meanwhile, a redundancy judgment circuit module (104) is designed to perform primary redundancy judgment on the anti-disassembly signal to generate a signal D, the signal D and the signal C are sent to different ports of the safety chip (105), and then the safety chip (105) is compared and judged to generate a final trigger signal and process the trigger signal.

Example one

Fig. 2 is an example of a complementary tamper-proof circuit module in a tamper-proof circuit structure for preventing false triggering, wherein: the switch is provided with three ports Ki, K1 and K2, the switch is a shrapnel, the shrapnel is connected to K1 under the normal condition without triggering, at the moment, the current passes through the end K1, and the end K2 is not connected to the circuit and is in an open circuit state; when violent dismantling action occurs, the elastic sheet is bounced off from the K1 and then is connected with the K2, at the moment, the K2 end passes through current, and the K1 end is not connected into a circuit and is in an open circuit state.

One connection relationship that may be implemented: ki is connected to a power supply circuit module (100), a Kt1 end is connected to a tamper detection circuit module (101), and a Kt2 end is connected to a complementary tamper detection circuit module (102).

In this embodiment, when there is no tamper action normally, the level of the switch Kt1 is high level, and at this time, the output signal a of the tamper detection circuit module (101) is a high level signal; the level of the switch Kt2 is low, and the output signal B of the complementary tamper detection circuit module (102) is a low level signal. When violent dismantling action occurs, the level of the switch Kt1 end is low level, and at the moment, the signal A output by the anti-dismantling detection circuit module (101) is a low level signal; the level of the switch Kt2 end is high level, and the signal B output by the complementary anti-tamper detection circuit module (102) is a high level signal.

In this embodiment, in the case where the signal a and the signal B have no fault, the phases of the levels should be opposite, and the correlation is 1, which is a signal generated for the same trigger event.

Example two

As shown in fig. 3, the tamper-proof signal stabilizing circuit module in the tamper-proof circuit structure for preventing false triggering is a circuit structure in a black dashed box.

In the embodiment, one end of the anti-disassembly detection circuit module (101) is connected with a power supply Vcc, the other end is connected with a trigger switch K1, and a generated signal A is connected to the anti-disassembly signal stabilizing circuit module (103); one end of the complementary anti-disassembly detection circuit module (102) is connected to a GND end, the other end of the complementary anti-disassembly detection circuit module is connected with a trigger switch K2, and a generated signal B is connected to the anti-disassembly signal stabilization circuit module (103) through a resistor R2; the anti-disassembly signal stabilizing circuit module (103) comprises a resistance-capacitance circuit (106) and a resistor R2, one end of the resistance-capacitance circuit (106) is connected to a GND terminal, and a signal C at the other end is connected to a port 1 of the security chip (105).

In a preferred embodiment, when the dismounting operation is not normally performed, the signal K1 is in a closed state, the signal a is in a high level, the signal K2 is in an open state, the signal B is in a low level, the resistance-capacitance circuit (106) is charged, and the resistance-capacitance circuit has a potential difference with respect to GND and is in a high level; the signal received at port 1 of the security chip (105) is signal a, i.e. high. When violent dismantling action occurs, K1 is in an open state, a signal A is in a low level, K2 is in a closed state, the resistance-capacitance circuit (106) discharges electricity through the resistor R2, the switch K2 and the complementary anti-dismantling detection circuit module (102), a signal B is in a low level, and a signal C at the end of the resistance-capacitance circuit (106) is in a low level; the signals a, B and C received by port 1 of the security chip (105) are all low, i.e. low.

In a preferred embodiment, the port 1 of the secure chip (105) receives a high-level normal no-trigger signal, and the port 1 of the secure chip (105) receives a low-level trigger signal.

In a preferred embodiment, the RC circuit (106) can stabilize the tamper-proof signal when a disturbance or a transient false trigger signal occurs in an element or circuit of the tamper-proof circuit. When the K1 and K2 are in two states other than those described above, the RC circuit (106) can stabilize the tamper signal. When K1 and K2 exhibit state 1 other than that described above, K1 is closed and signal a is high; k2 is also closed, a resistor R2 on the circuit where K2 is located will form a path, and when the signal B is also high level, the level signal received by port 1 of the security chip (105) is high level. The high level is a normal signal, and no false triggering is caused at the moment. When K1 and K2 exhibit state 2 out of the above description, K1 is off and signal a is low; k2 is also disconnected, and the circuit where K2 is located is open; the resistance-capacitance circuit (106) is charged before the fault occurs, has a potential difference relative to GND, is in a high level, and is in an open state in both K1 and K2 without a discharge path, and the level signal received by the port 1 of the safety chip (105) is in a high level. The high level is a normal signal, and no false triggering is caused at the moment.

In conclusion, the embodiment can effectively avoid other fault states except the trigger state without generating a trigger signal, thereby effectively preventing false triggering.

EXAMPLE III

Fig. 4 is a circuit structure of a circuit structure for preventing false triggering, specifically, a circuit structure in a black dashed box.

In the embodiment, one end of the anti-disassembly detection circuit module (101) is connected with a power supply Vcc, the other end is connected with a trigger switch K1, and a generated signal A is connected to the anti-disassembly signal stabilizing circuit module (103); one end of the complementary anti-disassembly detection circuit module (102) is connected to a GND end, the other end of the complementary anti-disassembly detection circuit module is connected with a trigger switch K2, and a generated signal B is connected to the anti-disassembly signal stabilization circuit module (103) through a resistor R2; the output signal C of the anti-disassembly signal stabilizing circuit module (103) is connected to the port 1 of the security chip (105); the redundancy judgment circuit module (104) is composed of an NMOS tube, wherein the grid electrode of the NMOS tube is connected to a signal A, the source electrode of the NMOS tube is connected to a power supply Vcc end, and the drain electrode of the NMOS tube is a signal D and is connected to a port 2 of the safety chip (105).

In a preferred embodiment, under normal conditions, K1 is in a closed state, and signal a is at a high level; the grid and the source of the NMOS tube are high level, the NMOS tube is in a conducting state, and a signal D of the drain is high level; the signal received by port 2 of the secure chip (105) is high, which is the same as the signal received by port 1 of the secure chip (105). When violent dismantling action occurs, K1 is in an off state, and the signal A is in a low level; the grid electrode of the NMOS tube is at a low level, the NMOS tube is in a cut-off state, and a signal D of the drain electrode is at a low level; the signal received by port 2 of the secure chip (105) is low level, which is the same as the signal received by port 1 of the secure chip (105).

As a preferred embodiment, the security chip (105) may compare signals received by the port 1 and the port 2, determine the trigger signal received by the port 1 as a final trigger signal when the signals are the same, and perform corresponding processing on the trigger signal; when the signals are different, which indicates that there is a possibility of false triggering, the chip may choose to perform corresponding security operations, including but not limited to shutting down the communication function or erasing the root key.

The above embodiments are preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereto, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are intended to be covered by the claims of the present invention.