阅读说明：本技术 一种嵌入式异构多核处理器架构并行调试系统及方法 (Embedded heterogeneous multi-core processor architecture parallel debugging system and method ) 是由 王颖 冯帆 张杨 王仁 陈树峰 于 2021-08-20 设计创作，主要内容包括：本发明涉及一种嵌入式异构多核处理器架构并行调试系统及方法,属于嵌入式调试领域。本发明用户通过交互界面输入调试命令,当调试命令被发出,界面软件同步生成调试器可识别的协议命令,并发送给ARM调试器或DSP调试器；调试命令经调试器转换后发送给调试代理,并通过USB口发送给仿真器；仿真器软件根据协议信息将命令转换成目标机可识别的JTAG命令发送到目标机；同时,以移位方式按原路返回调试结果。本发明针对异构多核处理器平台并行调试的情况,即针对DPS+ARM双核异构硬件环境下,实现基于应用程序的并行调试。为异构多核环境下的运行调试提供了技术支撑。(The invention relates to a parallel debugging system and method for an embedded heterogeneous multi-core processor architecture, and belongs to the field of embedded debugging. The invention user inputs debugging command through the interactive interface, when the debugging command is sent out, the interface software synchronously generates protocol command which can be identified by the debugger and sends the protocol command to the ARM debugger or the DSP debugger; the debugging command is transmitted to a debugging agent after being converted by the debugger and is transmitted to the simulator through the USB port; the emulator software converts the command into a JTAG command which can be identified by the target machine according to the protocol information and sends the JTAG command to the target machine; and meanwhile, returning the debugging result in the original way in a shifting mode. The parallel debugging method and the parallel debugging device aim at the parallel debugging condition of the heterogeneous multi-core processor platform, namely aim at the DPS + ARM dual-core heterogeneous hardware environment and achieve the parallel debugging based on the application program. And technical support is provided for operation debugging in heterogeneous multi-core environment.)

1. An embedded parallel debugging system for heterogeneous multi-core processor architecture, the system comprising: a development machine, a simulator and a target machine;

the development machine also comprises a development environment, a debugger and a debugging agent; communication and data interaction are carried out between the development environment and the debugger according to an MI (micro-electromechanical system) protocol; communication and data interaction are carried out between the debugger and the debugging agent through Socket; after the debugging agent finishes processing, data is sent to the simulator through the USB interface; the development environment is used for configuring GDB debugger parameters and debugging agent parameters, and the debugger comprises a DSP debugger and an ARM debugger;

the simulator comprises simulator resident software, the simulator resident software is in butt joint with the development machine through a USB interface and is in butt joint with the target machine through a GPIO interface, and after external data is received through the GPIO interface or the USB interface, the resident software transmits the data to the development machine or the target machine through the USB interface or the GPIO interface after finishing data processing;

the target machine comprises a JTAG interface which is used for being in butt joint with a GPIO interface of the simulator and is responsible for finishing data analysis processing and returning results.

2. The embedded heterogeneous multi-core processor architecture parallel debugging system of claim 1, wherein the development environment is configured to provide command input functionality using a debugging interface, accepting user debugging commands; configuring GDB debugger parameters and debugging agent parameters; transmitting a debugging command to a debugger; and displaying the debugging result and the debugging state.

3. The embedded heterogeneous multi-core processor architecture parallel debugging system of claim 2, wherein the debugging results and the debugging states comprise: whether the debugging state is available, and the register content, the memory content, the stack content and the breakpoint content of the target machine.

4. The embedded parallel debugging system of heterogeneous multi-core processor architecture of claim 2, wherein a user sends a debugging command to the debugger through an MI protocol under a debugging interface; after the debugger receives the debugging command, the debugger determines a specific operation command through analysis; the debugger converts the debug command into an ASCII code protocol packet through a remote serial communication protocol (RSP); the debugging agent software establishes two threads which respectively support the connection of a debugger facing two heterogeneous processor cores of the DSP and the ARM, simultaneously, the debugging agent serves as a server, and uplink and downlink data communication with the debugger is realized through a set data communication channel by using a SCOKET socket mode.

5. The embedded parallel debugging system of heterogeneous multi-core processor architecture of claim 1, wherein the debugging agent is configured to start two threads, establish connections with the ARM debugger and the DSP debugger, respectively, and after receiving a complete debugging command from the ARM debugger or the DSP debugger, complete command parsing and attempt to obtain a permission to send a command; if so, sending the GDB command to the emulator through the USB interface.

6. The embedded parallel debugging system of heterogeneous multi-core processor architecture of claim 1, wherein the emulator sends the GDB command obtained and sent by the debugging agent to the target machine through protocol conversion by resident software, and the execution command return result is returned to the development machine according to the original path.

7. The embedded parallel debugging system of heterogeneous multi-core processor architecture of claim 6, wherein the emulator resident software converts the debugging command into a JTAG protocol packet according to the timing requirement of the JTAG state machine to communicate with the target machine, and implements the debugging functions of internal registers of the target machine, downloading debugging codes, inserting and deleting breakpoints through write operation (doWrite) and read operation (doRead) interfaces, and if the execution of the debugging command is abnormal, the abnormal state is transmitted back to the user interface for display.

8. A parallel debugging method for embedded heterogeneous multi-core processor architecture is characterized in that,

in a development environment, a debugging interface is used for providing a command input function and receiving a user debugging command; configuring GDB debugger parameters and debugging agent parameters; transmitting a debugging command to a debugger; displaying a debugging result and a debugging state;

a user sends a debugging command to a DSP (digital signal processor) debugger or an ARM (advanced RISC machines) debugger under a debugging interface, and after the debugger receives the debugging command, the debugger determines a specific operating command through analysis and sends the specific operating command to a debugging agent;

the debugging agent starts two threads, establishes connection with an ARM debugger and a DSP debugger respectively, finishes command analysis after receiving a complete debugging command from the ARM debugger or the DSP debugger through any connection, and sends a GDB command to the simulator through a USB interface;

after the development machine is connected with the target machine through the simulator, the simulator transmits the acquired GDB command transmitted by the debugging agent to the target machine through protocol conversion through resident software, and the execution command return result is returned to the development machine according to the original path.

9. The embedded heterogeneous multi-core processor architecture parallel debugging system of claim 8, wherein the debugging results and debugging states comprise: whether the debugging state is available, and the register content, the memory content, the stack content and the breakpoint content of the target machine.

10. The embedded parallel debugging system of heterogeneous multi-core processor architecture of claim 8, wherein resident software in the emulator converts the acquired debugging information into a JTAG protocol packet to communicate with the target machine, and realizes debugging functions of internal registers, downloading debugging codes, and inserting and deleting breakpoints of the target machine through write operation (doWrite) and read operation (doRead) interfaces.

Technical Field

The invention belongs to the field of embedded debugging, and particularly relates to a parallel debugging system and method for an embedded heterogeneous multi-core processor architecture.

Background

With the continuous development of computer technology, semiconductor manufacturing processes and integrated circuit design technologies are continuously improved, and in the face of the development trend of miniaturization, integration and integration of embedded systems, the traditional single-core SoC architecture cannot meet the increasing performance requirements, so that the multi-core SoC technology comes along.

Compared with a homogeneous multi-core system, the heterogeneous multi-core system can more flexibly and efficiently realize the optimal configuration of resources. However, due to the complexity of the heterogeneous multi-core system, higher requirements are put on the correctness of system logic and the rationality of resource scheduling in the application design process, and the difficulty of evaluation and verification of the system is also improved. Therefore, the method capable of supporting parallel debugging of the domestic heterogeneous multi-core processor architecture is designed, the application design problem of the embedded system can be dynamically analyzed and solved, and the method is vital to improving the overall performance of the system.

Disclosure of Invention

Technical problem to be solved

The technical problem to be solved by the invention is how to provide a parallel debugging system and method for an embedded heterogeneous multi-core processor architecture, so as to solve the problem of difficult debugging of the heterogeneous multi-core system.

(II) technical scheme

In order to solve the technical problem, the invention provides an embedded parallel debugging system for a heterogeneous multi-core processor architecture, which comprises: a development machine, a simulator and a target machine;

the development machine also comprises a development environment, a debugger and a debugging agent; communication and data interaction are carried out between the development environment and the debugger according to an MI (micro-electromechanical system) protocol; communication and data interaction are carried out between the debugger and the debugging agent through Socket; after the debugging agent finishes processing, data is sent to the simulator through the USB interface; the development environment is used for configuring GDB debugger parameters and debugging agent parameters, and the debugger comprises a DSP debugger and an ARM debugger;

the simulator comprises simulator resident software, the simulator resident software is in butt joint with the development machine through a USB interface and is in butt joint with the target machine through a GPIO interface, and after external data is received through the GPIO interface or the USB interface, the resident software transmits the data to the development machine or the target machine through the USB interface or the GPIO interface after finishing data processing;

the target machine comprises a JTAG interface which is used for being in butt joint with a GPIO interface of the simulator and is responsible for finishing data analysis processing and returning results.

Furthermore, the development environment is used for providing a command input function by using a debugging interface and receiving a user debugging command; configuring GDB debugger parameters and debugging agent parameters; transmitting a debugging command to a debugger; and displaying the debugging result and the debugging state.

Further, the debug result and the debug status include: whether the debugging state is available, and the register content, the memory content, the stack content and the breakpoint content of the target machine.

Further, the user sends a debugging command to the debugger through an MI protocol under a debugging interface; after the debugger receives the debugging command, the debugger determines a specific operation command through analysis; the debugger converts the debug command into an ASCII code protocol packet through a remote serial communication protocol (RSP); the debugging agent software establishes two threads which respectively support the connection of a debugger facing two heterogeneous processor cores of the DSP and the ARM, simultaneously, the debugging agent serves as a server, and uplink and downlink data communication with the debugger is realized through a set data communication channel by using a SCOKET socket mode.

Furthermore, the debugging agent is used for starting two threads, respectively establishing connection with the ARM debugger and the DSP debugger, completing command analysis after receiving a complete debugging command from the ARM debugger or the DSP debugger through any connection, and trying to acquire permission of sending the command; if so, sending the GDB command to the emulator through the USB interface.

Further, the simulator sends the acquired GDB command sent by the debugging agent to the target machine through protocol conversion through resident software, and the return result of the executed command is returned to the development machine according to the original path.

Furthermore, the emulator resident software converts the debugging command into a JTAG protocol packet according to the time sequence requirement of the JTAG state machine to communicate with the target machine, and realizes the debugging functions of internal registers of the target machine, downloading debugging codes and inserting and deleting breakpoints through a write operation (doWrite) interface and a read operation (doRead) interface, and if the execution of the debugging command is abnormal, the abnormal state is transmitted back to the user interface to be displayed.

The invention provides a parallel debugging method of an embedded heterogeneous multi-core processor architecture,

in a development environment, a debugging interface is used for providing a command input function and receiving a user debugging command; configuring GDB debugger parameters and debugging agent parameters; transmitting a debugging command to a debugger; displaying a debugging result and a debugging state;

a user sends a debugging command to a DSP (digital signal processor) debugger or an ARM (advanced RISC machines) debugger under a debugging interface, and after the debugger receives the debugging command, the debugger determines a specific operating command through analysis and sends the specific operating command to a debugging agent;

the debugging agent starts two threads, establishes connection with an ARM debugger and a DSP debugger respectively, finishes command analysis after receiving a complete debugging command from the ARM debugger or the DSP debugger through any connection, and sends a GDB command to the simulator through a USB interface;

after the development machine is connected with the target machine through the simulator, the simulator transmits the acquired GDB command transmitted by the debugging agent to the target machine through protocol conversion through resident software, and the execution command return result is returned to the development machine according to the original path.

Further, the debug result and the debug status include: whether the debugging state is available, and the register content, the memory content, the stack content and the breakpoint content of the target machine.

Furthermore, resident software in the emulator converts the acquired debugging information into a JTAG protocol packet to communicate with the target machine, and realizes debugging functions of internal registers, debugging code downloading and breakpoint insertion and deletion of the target machine through a write operation (doWrite) interface and a read operation (doRead) interface.

(III) advantageous effects

The invention provides a parallel debugging system and method for an embedded heterogeneous multi-core processor architecture, which aim at the parallel debugging condition of a heterogeneous multi-core processor platform, namely aiming at the DPS + ARM dual-core heterogeneous hardware environment and realizing the parallel debugging based on an application program. And technical support is provided for operation debugging in heterogeneous multi-core environment.

Drawings

FIG. 1 is an overall structure diagram of an embedded heterogeneous multi-core processor architecture parallel debugging system of the present invention;

FIG. 2 is a debugging flow diagram of the embedded heterogeneous multi-core processor architecture parallel debugging method of the present invention.

Detailed Description

In order to make the objects, contents and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.

The invention aims to provide a parallel debugging method for an embedded multi-core processor architecture, which is used for solving the problems in the prior art.

The invention discloses a parallel debugging method of an embedded multi-core processor architecture, which comprises the following steps: a user inputs a debugging command through an interactive interface, and when the debugging command is sent out, the interface software synchronously generates a protocol command which can be identified by a debugger and sends the protocol command to the corresponding debugger; the debugging command is transmitted to a debugging agent after being converted by the debugger and is transmitted to the simulator through the USB port; the simulator software converts the command into a JTAG command which can be identified by the target machine according to the protocol information and sends the JTAG command to the target machine; and meanwhile, returning the debugging result in the original way in a shifting mode.

According to one embodiment of the embedded heterogeneous multi-core processor architecture parallel debugging system and method, a debugging command needs to be issued through a debugging interface, a protocol command which can be recognized by a debugger is generated, and the protocol command is sent to different debuggers.

According to one embodiment of the embedded heterogeneous multi-core processor architecture parallel debugging system and method, after the debugging command is converted by different debuggers, the command is sent to the corresponding debugging agent and is sent to the simulator through the USB port.

According to one embodiment of the embedded heterogeneous multi-core processor architecture parallel debugging system and method, the simulator issues a debugging command to a target machine through a JTAG, and debugging data and information are returned back through the loop in a shifting mode according to an original path.

The invention relates to a parallel debugging system and a parallel debugging method for an embedded heterogeneous multi-core processor architecture, which aim at the parallel debugging condition of a heterogeneous multi-core processor platform, namely aiming at the DPS + ARM dual-core heterogeneous hardware environment and realize the parallel debugging based on an application program. And technical support is provided for operation debugging in heterogeneous multi-core environment.

Fig. 1 is an overall structure diagram of an embedded heterogeneous multi-core processor architecture parallel debugging system according to the present invention, and to implement the debugging method, the system includes: a development machine, a simulator and a target machine.

The development machine, in turn, includes a development environment, a debugger, and a debug agent. Communication and data interaction are carried out between the development environment and the debugger according to an MI (micro-electromechanical system) protocol; communication and data interaction are carried out between the debugger and the debugging agent through Socket; after the debugging agent finishes the processing, the debugging agent sends data to the simulator through the USB interface.

The simulator comprises simulator resident software, the simulator resident software is in butt joint with the development machine through a USB interface, the simulator resident software is in butt joint with the target machine through a GPIO interface, and after external data are received through the GPIO interface or the USB interface, the resident software transmits the data to the development machine or the target machine through the USB interface or the GPIO interface after finishing data processing.

The target machine comprises a JTAG interface which is used for being in butt joint with a GPIO interface of the simulator and is responsible for finishing data analysis processing and returning results.

The embedded heterogeneous multi-core processor architecture parallel debugging method mainly comprises the following steps: setting debugging parameters, issuing a debugging command, establishing debugging connection, performing debugging simulation, performing JTAG analysis and returning data.

The parallel debugging method of the embedded heterogeneous multi-core processor architecture specifically comprises the following steps:

setting debugging parameters and issuing debugging commands, including:

in a development environment, a debugging interface is used for providing a command input function and receiving a user debugging command; configuring GDB debugger parameters and debugging agent parameters; transmitting a debugging command to a debugger; and displaying the debugging result and the debugging state, if the debugging state is available, and information such as the register content, the memory content, the stack content, the breakpoint content and the like of the target machine.

Issuing a debugging command, comprising:

a user sends a debugging command to a debugger under a debugging interface, and after the debugger receives the debugging command, the debugger determines a specific operation command through analysis and sends the specific operation command to a debugging agent; the debugger comprises a DSP debugger and an ARM debugger;

establishing a debug connection, comprising:

according to the architecture of the target machine, the debugging agent starts two threads and establishes connection with an ARM debugger and a DSP debugger respectively. After receiving a complete debugging command from an ARM debugger or a DSP debugger, any connection completes command analysis and tries to acquire command sending permission; if so, sending the GDB command to the emulator through the USB interface.

Performing debugging simulation, including:

after the development machine is connected with the target machine through the simulator, the simulator transmits the acquired GDB command transmitted by the debugging agent to the target machine through protocol conversion through resident software, and the execution command return result is returned to the development machine according to the original path.

Performing JTAG analysis and data return, including:

and the simulator resident software sends the debugging command to the target machine according to the time sequence requirement of the JTAG state machine, and simultaneously obtains a return result in a background monitoring mode.

Another embodiment of the embedded heterogeneous multi-core processor architecture parallel debugging method of the invention comprises the following steps:

1. setting debugging parameters and issuing debugging commands

In a development environment, a user sets parameters of two GDB debuggers of a DSP and an ARM matched with a target machine and parameters of a debugging agent.

And issuing a debugging command, and checking whether the ARM debugger and the DSP debugger are ready. If ready, a debug connection may be established; otherwise the debugger state is rechecked.

2. Establishing a debug connection

A user sends a debugging command to a debugger through an MI protocol under a debugging interface; after the debugger receives the debugging command, the debugger determines a specific operation command through analysis; the debugger converts the debug command into an ASCII code protocol packet through a remote serial communication protocol (RSP);

the debugging agent software establishes two threads and respectively supports the connection of a debugger facing two heterogeneous processor cores of the DSP and the ARM. Meanwhile, the debugging agent serves as a server, and uplink and downlink data communication with the debugger is realized by using a SCOKET socket mode through a set data communication channel.

If the debugging connection is not successfully established, the system detects information such as the state of the target machine, the configuration of the debugger and the like, and displays an abnormal state on a user interface.

3. Parsing debug commands

The debugging agent converts the acquired debugging command into specific debugging parameters by calling the encapsulated USB driver interface and sends the specific debugging parameters to the simulator.

The simulator captures a debugging command sent by the debugging agent, judges the validity of the command, processes the command and sends the command to the target machine if the command is valid, and continues to capture the next command after the processing is finished; if the command is abnormal, the simulator abandons the debugging command and waits for obtaining the next debugging command.

4. Executing debug commands

After capturing the corresponding debugging command, resident software in the emulator converts the acquired debugging information into an agreed data packet format (JTAG protocol packet) to communicate with the target machine, and realizes the debugging functions required by the target machine internal register, the downloading of debugging codes, the insertion and deletion of breakpoints and the like through a write operation (doWrite) interface and a read operation (doRead) interface.

And if the execution of the debugging command is abnormal, returning the abnormal state to the user interface for displaying.

5. Performing JTAG analysis and data return

And the resident software in the simulator outputs the received debugging command through the GPIO interface, receives debugging information through the JTAG interface at the target machine, analyzes the operation and carries out debugging action.

And after execution, returning the data information to the development environment through a link loop, and displaying a debugging result in an interface.

The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.