阅读说明：本技术 一种GaN兼容驱动电路 (GaN compatible drive circuit ) 是由 林家飞 薄文钊 尹位扬 于 2021-09-30 设计创作，主要内容包括：本申请公开了一种GaN兼容驱动电路,属于半导体器件技术领域,包括驱动芯片IC、MOS驱动模块和GaN驱动兼容模块,驱动芯片IC的驱动端与MOS驱动模块的输入端相连,GaN驱动兼容模块包括限压单元,加速单元和分压单元,所述限压单元的输入端和MOS驱动模块的输出端连接,限压单元的输出端和分压单元的输入端、N型场效应管的栅极连接,所述分压单元的输出端和N型场效应管的源极、驱动芯片IC连接,所述加速单元和限压单元并联。本申请具有可兼容驱动GaN和硅基MOSFET的效果。(The application discloses compatible drive circuit of gaN belongs to semiconductor device technical field, including driver chip IC, MOS drive module and the compatible module of gaN drive, driver chip IC's drive end links to each other with MOS drive module's input, and the compatible module of gaN drive includes the voltage limiting unit, accelerating unit and bleeder unit, the input of voltage limiting unit and MOS drive module's output are connected, and the output of voltage limiting unit and the input of bleeder unit, the grid connection of N type field effect transistor, the output of bleeder unit and N type field effect transistor's source electrode, driver chip IC connect, accelerating unit and voltage limiting unit are parallelly connected. The method has the effect of compatibly driving the GaN MOSFET and the silicon-based MOSFET.)

1. A GaN compatible driver circuit, comprising: including driver chip IC, MOS driver module (1) and GaN drive compatible module (2), driver chip IC's drive end links to each other with the input of MOS driver module (1), and GaN drive compatible module (2) is including voltage limiting unit (21), accelerating cell (22) and bleeder unit (23), the input of voltage limiting unit (21) and the output of MOS driver module (1) are connected, and the output of voltage limiting unit (21) and the input of bleeder unit (23), the grid connection of N type field effect transistor, the output of bleeder unit (23) and the source electrode of N type field effect transistor, driver chip IC are connected, accelerating cell (22) and voltage limiting unit (21) are parallelly connected.

2. The GaN compatible driver circuit of claim 1, wherein: the voltage limiting unit (21) adopts a voltage limiting resistor, the voltage dividing unit (23) adopts a voltage dividing resistor, wherein the voltage when the driving end of the driving chip IC outputs a high level is Vg, then:

Vg=（1+Rc/Rg）×（6~7）

in the formula: rc is the total resistance of the voltage limiting unit (21), and Rg is the total resistance of the voltage dividing unit (23).

3. The GaN compatible driver circuit of claim 2, wherein: the resistance value of Rc is 5.1k omega-7.5 k omega, and the resistance value of Rg is 10k omega.

4. The GaN compatible driver circuit of claim 1, wherein: the acceleration unit (22) employs an acceleration capacitance Cb.

5. The GaN compatible driver circuit of claim 4, wherein: the capacitance capacity of the accelerating unit (22) adopts 330pF-1 nF.

6. The GaN compatible driver circuit of claim 1, wherein: the GaN driving compatible module (2) further comprises a voltage stabilizing tube ZD, the cathode of the voltage stabilizing tube ZD is connected with the output end of the voltage limiting unit (21), the input end of the voltage dividing unit (23) and the grid electrode of the N-type field effect tube, and the anode of the voltage stabilizing tube ZD is connected with the output end of the voltage dividing unit (23) and the source electrode of the N-type field effect tube.

7. The GaN compatible driver circuit of claim 6, wherein: and the voltage stabilizing value of the voltage stabilizing tube ZD is 6.2V.

8. The GaN compatible driver circuit of claim 1, wherein: the MOS driving module (1) comprises a first resistor Ra, a diode D1 and a second resistor Rb, one end of the first resistor Ra is connected with a driving end of a driving chip IC, the other end of the first resistor Ra is connected with a cathode of a diode D1, an anode of the diode D1 is connected with an input end of a voltage limiting unit (21) and an accelerating unit (22), one end of the second resistor Rb is connected with the first resistor Ra and the driving end of the driving chip IC, and the other end of the second resistor Rb is connected with an anode of a diode D1, an input end of the voltage limiting unit (21) and the accelerating unit (22).

9. The GaN compatible driver circuit of claim 8, wherein: the resistance value of the first resistor Ra is 200-510 omega, and the resistance value of the second resistor Rb is 5-33 omega.

Technical Field

The application relates to the technical field of semiconductor devices, in particular to a GaN compatible driving circuit.

Background

Gallium nitride (GaN) power devices have been rapidly developed in high switching speed and high power density applications, GaN has lower on-resistance and gate charge than conventional silicon-based MOSFETs, and particularly works at high switching frequency, and is applied to GaN devices of a series structure, which makes the driving performance requirements more demanding, and the conventional lines driving MOSFETs cannot drive GaN devices without integrated driving.

Disclosure of Invention

In order to compatibly drive gallium nitride and silicon-based MOSFETs, the application provides a GaN compatible drive circuit.

The application provides a compatible drive circuit of GaN adopts following technical scheme:

the utility model provides a compatible drive circuit of GaN, includes driver chip IC, MOS drive module and the compatible module of GaN drive, and driver chip IC's drive end links to each other with MOS drive module's input, and the compatible module of GaN drive includes voltage limiting unit, accelerating unit and voltage division unit, the input of voltage limiting unit and MOS drive module's output are connected, and voltage limiting unit's output and voltage division unit's input, N type field effect transistor's grid are connected, voltage division unit's output and N type field effect transistor's source electrode, driver chip IC are connected, accelerating unit and voltage limiting unit connect in parallel.

By adopting the technical scheme, when the driving end of the driving chip IC outputs high level, namely driving voltage, the driving voltage is reduced to the driving voltage suitable for GaN through the MOS driving module, the voltage limiting unit and the voltage dividing unit, the range of the driving voltage of the silicon-based MOSFET is larger, the reduced driving voltage can still drive the silicon-based MOSFET, and further the traditional chip can compatibly drive the GaN and the silicon-based MOSFET. Meanwhile, the accelerating unit can accelerate the starting of the GaN or silicon-based MOSFET.

Preferably, the voltage limiting unit adopts a voltage limiting resistor, and the voltage dividing unit adopts a voltage dividing resistor, wherein the voltage when the driving end of the driving chip IC outputs a high level is Vg, then:

Vg=（1+Rc/Rg）×（6~7）

in the formula: rc is the total resistance of the voltage limiting unit, and Rg is the total resistance of the voltage dividing unit.

By adopting the technical scheme, a reasonable Rc/Rg ratio range is obtained, so that the driving level can drive GaN more stably and more appropriately.

Preferably, the resistance value of Rc is 5.1k omega-7.5 k omega, and the resistance value of Rg is 10k omega.

By adopting the technical scheme, the resistance value of Rc is 5.1-7.5 k omega, the resistance value of Rg is 10k omega, the driving chip IC outputs proper voltage and current to drive the GaN, and meanwhile, the GaN has higher switching speed and less loss and can reduce electromagnetic radiation.

Preferably, the acceleration unit employs an acceleration capacitor Cb.

By adopting the technical scheme, when the driving end of the driving chip IC outputs a high level, the accelerating capacitor Cb is charged, the circuit where the accelerating capacitor Cb is located has current, the current for charging at the beginning is large, the obstruction is small, and the GaN can be conducted in an accelerating way; when the driving end of the driving chip IC outputs low level, the acceleration capacitor Cb discharges to form negative pressure on the grid electrode of the GaN, so that the GaN can be cut off in an acceleration mode, and the condition of mistaken opening after the GaN is cut off is reduced.

Preferably, the capacitance capacity of the accelerating unit is 330pF-1 nF.

By adopting the technical scheme, the capacitance of the accelerating unit is 330pF-1nF, so that the accelerating unit has good response speed, the GaN switching speed is higher, reliable negative pressure can be provided, and the driving reliability is improved.

Preferably, the GaN driving compatible module further comprises a voltage stabilizing tube ZD, a cathode of the voltage stabilizing tube ZD is connected with an output end of the voltage limiting unit, an input end of the voltage dividing unit and a grid electrode of the N-type field effect tube, and an anode of the voltage stabilizing tube ZD is connected with an output end of the voltage dividing unit and a source electrode of the N-type field effect tube.

By adopting the technical scheme, the voltage stabilizing tube ZD can clamp voltage, so that the voltage of the GaN grid electrode is stable, and when the voltage dividing unit is damaged, the GaN can still be driven, the stability of the voltage is further improved, and a double-insurance effect is achieved.

Preferably, the voltage stabilizing value of the voltage stabilizing tube ZD is 6.2V.

By adopting the technical scheme, the driving level can drive the GaN more stably and more appropriately.

Preferably, the MOS driving module includes a first resistor Ra, a diode D1, and a second resistor Rb, one end of the first resistor Ra is connected to the driving terminal of the driver chip IC, the other end of the first resistor Ra is connected to the cathode of the diode D1, the anode of the diode D1 is connected to the input terminal of the voltage limiting unit and the acceleration unit, one end of the second resistor Rb is connected to the first resistor Ra and the driving terminal of the driver chip IC, and the other end of the second resistor Rb is connected to the anode of the diode D1, the input terminal of the voltage limiting unit, and the acceleration unit.

Through adopting above-mentioned technical scheme, second resistance Rb is drive resistance, and first resistance Ra, diode D1 play and prevent static effect, reduce the influence of static to the field effect transistor.

Preferably, the first resistor Ra has a resistance of 200 Ω to 510 Ω, and the second resistor Rb has a resistance of 5 Ω to 33 Ω.

By adopting the technical scheme, the resistance value of the first resistor Ra is 200-510 omega, and the resistance value of the second resistor Rb is 5-33 omega, so that the GaN switching speed is higher, the loss is less, and the electromagnetic radiation can be reduced.

In summary, the present application includes at least one of the following beneficial technical effects:

1. the GaN-based MOSFET chip realizes the combined compatibility of the GaN and the silicon-based MOSFET drive, realizes the practical application that the traditional chip can drive the GaN by adopting elements with conventional bases, and is convenient for the compatible alternative use between the silicon-based MOSFET and the GaN;

2. the method has the advantages of no need of a special GaN driving chip, avoidance of the limitation of the GaN driving chip, more flexibility, convenient product iteration, strong competitiveness, high reliability, simple device type selection and low cost.

Drawings

FIG. 1 is a circuit diagram of a GaN-compatible driver circuit according to embodiment 1 of the present application;

FIG. 2 is a circuit diagram of a GaN compatible driver circuit in embodiment 2 of the present application;

fig. 3 is a circuit diagram of a GaN-compatible driving circuit in embodiment 3 of the present application.

Description of reference numerals:

1. a MOS drive module; 2. a GaN drive compatible module; 21. a voltage limiting unit; 22. an acceleration unit; 23. a voltage dividing unit.

Detailed Description

The present application is described in further detail below with reference to figures 1-3.

The grid driving voltage range of the GaN device is very narrow, the voltage amplitude range of the general sustainable operation is-4V/+ 7V, the recommended driving voltage amplitude is about 5.5V-6.5V, and the operating voltage of the silicon-based MOSFET is far more than 20V. The chip is a gate circuit with a MOS transistor, the gate circuit is also limited to the driving voltage amplitude of about 10V, so the driving level of the traditional chip is generally about 10V, which causes the GaN line to be driven by giving priority to the working voltage range and the switching speed. Wherein, the driving level difference between the GaN MOSFET and the silicon-based MOSFET is as follows:

device type	Type of drive	Vth turn-on voltage	Amplitude of driving voltage
				Si mosfet	Voltage type	2V-4V	5V-20V
GaN	Voltage type	1V-2V	6V

The embodiment of the application discloses a GaN compatible drive circuit.

Example 1

Referring to fig. 1, the GaN compatible driving circuit includes a driving chip IC, an MOS driving module 1 and a GaN driving compatible module 2, a driving end of the driving chip IC is connected with an input end of the MOS driving module 1, the GaN driving compatible module 2 includes a voltage limiting unit 21, an accelerating unit 22 and a voltage dividing unit 23, an input end of the voltage limiting unit 21 is connected with an output end of the MOS driving module 1, an output end of the voltage limiting unit 21 is connected with an input end of the voltage dividing unit 23 and a gate of an N-type field effect transistor, an output end of the voltage dividing unit 23 is connected with a source of the N-type field effect transistor and the driving chip IC, and the accelerating unit 22 is connected in parallel with the voltage limiting unit 21.

In this embodiment, the MOS driving module 1 includes a first resistor Ra, a diode D1, and a second resistor Rb, one end of the first resistor Ra is connected to the driving terminal of the driving chip IC, the other end of the first resistor Ra is connected to the cathode of the diode D1, the anode of the diode D1 is connected to the input terminal of the voltage limiting unit 21 and the accelerating unit 22, one end of the second resistor Rb is connected to the first resistor Ra and the driving terminal of the driving chip IC, and the other end of the second resistor Rb is connected to the anode of the diode D1, the input terminal of the voltage limiting unit 21 and the accelerating unit 22.

In order to increase the switching speed of the fet and reduce the loss, in this embodiment, the resistance of the first resistor Ra is 200 Ω, and the resistance of the second resistor Rb is 5 Ω. In other embodiments, the first resistor Ra may have a resistance of 510 Ω, and the second resistor Rb may have a resistance of 33 Ω.

In this embodiment, the voltage limiting unit 21 adopts a voltage limiting resistor, and the voltage dividing unit 23 adopts a voltage dividing resistor, where the voltage when the driving terminal of the driving chip IC outputs the high level is Vg, then:

Vg=（1+Rc/Rg）×（6~7）

in the formula: rc is the total resistance of the voltage limiting unit 21, and Rg is the total resistance of the voltage dividing unit 23.

In this embodiment, the number of the voltage limiting resistors is one, one end of each voltage limiting resistor is connected to the second resistor Rb and the anode of the diode D1, the other end of each voltage limiting resistor is connected to the gate of the N-type fet, and the resistance of each voltage limiting resistor is 5.1k Ω. One end of the divider resistor is connected with the voltage limiting resistor and the grid electrode of the N-type field effect transistor, the other end of the divider resistor is connected with the voltage limiting resistor, the source electrode of the N-type field effect transistor and the driving chip IC, and the resistance value of the divider resistor is 10k omega. In other embodiments, the resistance of the voltage limiting resistor may adopt 7.5k Ω, and the resistance of the voltage dividing resistor adopts 10k Ω; the resistance value of the voltage limiting resistor can also adopt 10k omega, and the resistance value of the voltage dividing resistor can also adopt 19.6k omega.

In order to increase the switching speed of the fet and provide a reliable negative voltage, in this embodiment, the accelerating unit 22 employs an accelerating capacitor Cb, the number of the accelerating capacitor Cb is one, the accelerating capacitor Cb is connected in parallel with the voltage limiting resistor, and the capacity of the accelerating capacitor Cb is 330 pF. In other embodiments, the capacitance of the accelerating capacitor Cb may be 1 nF.

When the driving end of the driving chip IC outputs a high level, the acceleration capacitor Cb is charged, a circuit where the acceleration capacitor Cb is located has current, the current which is just started to be charged is large, the obstruction is small, and GaN can be conducted in an accelerated mode; when the driving end of the driving chip IC outputs low level, the acceleration capacitor Cb discharges to form negative pressure on the grid electrode of the GaN, so that the GaN can be cut off in an acceleration mode.

In order to improve the stability of the voltage, in this embodiment, the GaN driving compatible module 2 may further include a voltage regulator ZD, a cathode of the voltage regulator ZD is connected to the output terminal of the voltage limiting unit 21, the input terminal of the voltage dividing unit 23, and the gate of the N-type field effect transistor, and an anode of the voltage regulator ZD is connected to the output terminal of the voltage dividing unit 23 and the source of the N-type field effect transistor. Wherein the voltage stabilizing value of the voltage stabilizing tube ZD is 6.2V.

The voltage regulator tube ZD can clamp the voltage to stabilize the voltage of the gate of the field effect tube, and when the voltage dividing unit 23 is damaged, the driving chip IC can still drive GaN.

The implementation principle of the embodiment 1 is as follows: taking GaN as an example: when the driving terminal of the driving chip IC (i.e. the Driver terminal of the chip IC in the figure) outputs a high level, GaN is driven to be turned on, wherein a path of a driving current is from Rb → Cb// Rc → Rg// ZD → R0 → GND, the charging of the accelerating capacitor Cb is accelerated, and the gate of GaN obtains a voltage of 6.2V and is turned on.

When the driving terminal of the Driver chip IC is at a low level, the flying capacitor Cb discharges, and a path of the driving current Cb → D1 → Ra → Driver → GND → R0 → ZD continues to generate a negative voltage at the gate of GaN, so that GaN is turned off.

The grid driving voltage range of the silicon-based MOSFET is large and is generally about 5V-20V, so that the silicon-based MOSFET can be driven by the driving voltage of 6.2V, and a driving chip IC can be compatible with the silicon-based MOSFET and the GaN.

Example 2

Referring to fig. 2, the present embodiment is different from embodiment 1 in that the number of the voltage limiting resistors is plural, and the plural voltage limiting resistors are connected in series or in parallel.

Example 3

Referring to fig. 3, the present embodiment is different from embodiment 1 in that the number of the acceleration capacitors Cb is plural, and the plural acceleration capacitors Cb are connected in parallel.

The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.