System and method for detecting violation behaviors of examinees in real time based on ARM architecture

文档序号:1893498 发布日期:2021-11-26 浏览:18次 中文

阅读说明:本技术 一种基于arm架构的考生违规行为实时检测系统及方法 (System and method for detecting violation behaviors of examinees in real time based on ARM architecture ) 是由 刘栓 于 2021-07-29 设计创作,主要内容包括:本发明公开了一种基于ARM架构的考生违规行为实时检测系统及方法,其中,考生违规行为实时检测系统包括:摄像头、主控芯片、NPU设备和共享磁盘,所述摄像头输出端连接主控芯片第一输入端,所述主控芯片第一输出端连接共享磁盘输入端,所述主控芯片第二输出端连接NPU设备输入端,所述NPU设备输出端连接主控芯片第二输入端。本发明采用RK3399芯片做RTSP数据的接入做视频抽帧和NPU推理结果上传等应用逻辑处理,集成了更多的带宽压缩技术,并支持更多的图形和计算接口,总体性能比上一代提高45%,解决人工观看考试监控视频回放所需人力成本高昂并且通过网络传输监控视频安全性、保密性低的问题。(The invention discloses a real-time detection system and a real-time detection method for violation behaviors of examinees based on an ARM framework, wherein the real-time detection system for violation behaviors of examinees comprises: the device comprises a camera, a main control chip, NPU equipment and a shared disk, wherein the output end of the camera is connected with the first input end of the main control chip, the first output end of the main control chip is connected with the input end of the shared disk, the second output end of the main control chip is connected with the input end of the NPU equipment, and the output end of the NPU equipment is connected with the second input end of the main control chip. The invention adopts the RK3399 chip to access RTSP data and perform application logic processing such as video framing, NPU reasoning result uploading and the like, integrates more bandwidth compression technologies, supports more graphics and computing interfaces, improves the overall performance by 45 percent compared with the previous generation, and solves the problems of high labor cost required by manually watching examination monitoring video playback and low security and confidentiality of monitoring video transmission through a network.)

1. The utility model provides an examinee's violation real-time detection system based on ARM architecture which characterized in that includes: the device comprises a camera, a main control chip, NPU equipment and a shared disk, wherein the output end of the camera is connected with the first input end of the main control chip, the first output end of the main control chip is connected with the input end of the shared disk, the second output end of the main control chip is connected with the input end of the NPU equipment, and the output end of the NPU equipment is connected with the second input end of the main control chip.

2. The system of claim 1, wherein the camera adopts a camera supporting the national standard RTSP protocol for collecting the examination room data.

3. The system of claim 1, wherein the main control chip employs a RK3399 chip, and the CPU employs a big-letter core architecture.

4. The system of claim 3, wherein the GPU of the main control chip is a new-generation high-end image processor Mali-T860 of a quad-core ARM.

5. The system of claim 1, wherein the NPU device is composed of an onboard RK1808AI chip, and the onboard RK1808AI chip is internally provided with a high performance NPU.

6. The ARM architecture-based real-time detection system for violation of examinees according to claim 5, wherein a CPU of on-board RK1808AI chip adopts a dual-core Cortex-A35 architecture.

7. A real-time detection method for violation behaviors of examinees based on an ARM architecture is characterized by comprising the following steps:

s1: recording a monitoring video of an examination site through a camera;

s2: the camera sends the monitoring video to a video frame-extracting service module of a main control chip RK 3399;

s3: the video frame extracting service module extracts frames of the monitoring video to obtain image data;

s4: sending the image data to a shared disk;

s5: the NPU equipment acquires corresponding image data from the shared disk, and performs algorithm analysis on the corresponding image data to obtain an analysis result;

s6: and sending the analysis result to an algorithm post-processing module, and sending the analysis result to a result storage hard disk by the algorithm post-processing module.

8. The method of claim 7, wherein the S2 comprises the following sub-steps:

s21: the camera distributes the video through an RTSP protocol and waits for the video frame-extracting service module of the main control chip RK3399 to be accessed;

s22: configuring an RTSP address needing to be accessed;

s23: the main control chip RK3399 accesses the corresponding video according to the configured RTSP address;

s24: the main control chip RK3399 uses the VPU to carry out hard decoding on the accessed video and converts the decoded data into image data.

9. The method of claim 7, wherein the step S5 comprises the following steps:

s51: the NPU cluster service module acquires image data from a shared disk;

s52: distributing image data with different sizes to corresponding NPU equipment according to the idle degree of each NPU equipment, wherein the higher the idle degree of the NPU equipment is, the larger the distributed image data is; the lower the idle degree of the NPU equipment is, the smaller the distributed image data is;

s53: the NPU device performs an algorithmic analysis on the corresponding object data.

Technical Field

The invention relates to the technical field of behavior recognition, in particular to a system and a method for detecting violation behaviors of examinees in real time based on an ARM framework.

Background

The examination is an important mode for checking the learning achievement, but various forms of illegal behaviors exist all the time in the process of the examination, and the behaviors disturb the order of an examination room, so that the examination cannot be performed fairly and fairly. Therefore, the examination needs to be monitored, the violation behaviors existing in the examination process are found out, and punishment is given. At present, the method for detecting the violation mainly comprises the steps of installing a camera for monitoring, recording an examination process into a video, and manually observing the video to find out the violation. This inevitably takes up a lot of human resources and the time consumption is also enormous. Therefore, it is necessary to research intelligent recognition technology, and it is a hot spot of research in the education world, and it is widely concerned by experts and scholars.

The invention patent application document with the application number of CN201810995056.3 provides a human behavior analysis method and a system for an educational examination monitoring video, wherein the method comprises the following steps: the intelligent video analysis technology is an application field of computer vision technology. The method can establish a mapping relation between the image or the image sequence and the event description, so that a computer can distinguish and identify the behavior of a key target from a complicated video image, and filter information which is not concerned by a user, and the essence is to automatically analyze, extract and identify key information in a video source. The existing video analysis technology is widely applied to the fields of security protection and the like, but the video analysis technology is rarely applied to monitoring videos in education examinations. The reason is that the situation of the educational examination monitoring video is too complex, and the prior behavior video intelligent analysis technology capable of coping with dynamic scene analysis has a plurality of defects of simple trial scene and the like.

Disclosure of Invention

The invention mainly aims to provide a system and a method for detecting violation behaviors of examinees in real time based on an ARM (advanced RISC machine) framework, and aims to solve the technical problems that time and labor are consumed in finding out the violation behaviors through manually observing videos of an examination room in the prior art.

In order to achieve the above object, the present invention provides an ARM architecture based real-time detection system for violation behaviors of examinees, comprising: the device comprises a camera, a main control chip, NPU equipment and a shared disk, wherein the output end of the camera is connected with the first input end of the main control chip, the first output end of the main control chip is connected with the input end of the shared disk, the second output end of the main control chip is connected with the input end of the NPU equipment, and the output end of the NPU equipment is connected with the second input end of the main control chip.

Preferably, the camera adopts a camera supporting a national standard RTSP protocol and is used for collecting examination room data.

Preferably, the main control chip adopts a RK3399 chip, and a CPU thereof adopts big.

Preferably, the GPU of the main control chip adopts a new generation high-end image processor Mali-T860 of a quad-core ARM.

Preferably, the NPU equipment is composed of an onboard RK1808AI chip, and the onboard RK1808AI chip is internally provided with a high-performance NPU.

Preferably, the CPU of the onboard RK1808AI chip adopts a dual-core Cortex-A35 framework.

A real-time detection method for violation behaviors of examinees based on an ARM architecture comprises the following steps:

s1: recording a monitoring video of an examination site through a camera;

s2: the camera sends the monitoring video to a video frame-extracting service module of a main control chip RK 3399;

s3: the video frame extracting service module extracts frames of the monitoring video to obtain image data;

s4: sending the image data to a shared disk;

s5: the NPU equipment acquires corresponding image data from the shared disk, and performs algorithm analysis on the corresponding image data to obtain an analysis result;

s6: and sending the analysis result to an algorithm post-processing module, and sending the analysis result to a result storage hard disk by the algorithm post-processing module.

Preferably, the S2 includes the following sub-steps:

s21: the camera distributes the video through an RTSP protocol and waits for the video frame-extracting service module of the main control chip RK3399 to be accessed;

s22: configuring an RTSP address needing to be accessed;

s23: the main control chip RK3399 accesses the corresponding video according to the configured RTSP address;

s24: the main control chip RK3399 uses the VPU to carry out hard decoding on the accessed video and converts the decoded data into image data.

Preferably, the S5 includes the following steps:

s51: the NPU cluster service module acquires image data from a shared disk;

s52: distributing image data with different sizes to corresponding NPU equipment according to the idle degree of each NPU equipment, wherein the higher the idle degree of the NPU equipment is, the larger the distributed image data is; the lower the idle degree of the NPU equipment is, the smaller the distributed image data is;

s53: the NPU device performs an algorithmic analysis on the corresponding object data.

The invention has the beneficial effects that:

(1) compared with the traditional manual examination cheating screening, the system has higher efficiency and lower error rate and can effectively save the labor cost for examination violation detection;

(2) the invention can accurately position cheating examinees through a computer algorithm, so that the examination is more fair; compared with manual screening, the method has the advantages that the problem of machine fatigue cannot occur when cheating behaviors are detected through an algorithm, so that the error rate can be reduced;

(3) according to the invention, each frame of data of the examination behaviors of the students is analyzed, so that the conditions of misjudgment or missed judgment are reduced, and meanwhile, short videos are extracted according to the abnormal time points of the examinees for artificial verification, so that the cheating examinees can be effectively caught.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

FIG. 1 is a block diagram of the system of the present invention;

FIG. 2 is a flow chart of an implementation of the present invention;

the implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.

Detailed Description

It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

As shown in fig. 1, in this embodiment, the present invention provides an ARM-based real-time detection system for violation of examinees, including: the device comprises a camera, a main control chip, NPU equipment and a shared disk, wherein the output end of the camera is connected with the first input end of the main control chip, the first output end of the main control chip is connected with the input end of the shared disk, the second output end of the main control chip is connected with the input end of the NPU equipment, and the output end of the NPU equipment is connected with the second input end of the main control chip.

In this embodiment, the camera adopts a camera supporting a national standard RTSP protocol, and is used for collecting examination room data.

In this embodiment, the main control chip adopts a RK3399 chip, and its CPU adopts big.

In this embodiment, the GPU of the main control chip adopts a new generation high-end image processor Mali-T860 of a quad-core ARM.

In this embodiment, the NPU device is composed of an on-board RK1808AI chip, and the on-board RK1808AI chip is internally provided with a high performance NPU.

In the embodiment, a dual-core Cortex-A35 framework is adopted by the CPU of the onboard RK1808AI chip.

Specifically, the system mainly comprises the following devices:

a camera:

the camera is mainly used for collecting examination room data, and can be selected from cameras supporting national standard RTSP protocols of Haikang, Dahua and the like. The resolution of the camera is preferably 1080P, so that the acquired data is sufficiently clear.

RK3399:

RK3399 is the highest-performance chip in a Rockchip product line, and has high performance and expandability in application. The hardware specification of the chip is leading in the industry. The CPU of RK3399 adopts big-core and quarter-core Cortex-A72 and 53 corelet structures. Significant improvements have been made in integers, floating point numbers, memory, overall performance, power consumption and core area. The GPU of RK3399 adopts a new generation of high-end image processor Mali-T860 of quad-core ARM, integrates more bandwidth compression technologies (such as intelligent overlay, ASTC and local pixel storage), and supports more graphics and computing interfaces. The overall performance is improved by 45% compared with the previous generation.

At present, RK3399 is mainly used for RTSP data access and application logic processing such as video frame extraction and NPU reasoning result uploading.

Sharing the disk:

the shared disk is mainly used for storing RK3399 decoded and framed picture data, the picture data are used by NPUs, and different NPUs share the shared disk.

RK1808 NPU device:

the onboard RK1808AI chip is internally provided with a high-energy-efficiency NPU, has strong computing power, supports various AI frameworks and AI application development SDKs, is easy to develop, has rich interfaces facing AI applications, is convenient to expand, and is suitable for functional application scenes such as voice awakening, voice recognition, face recognition and the like. An RK1808AI chip CPU adopts a dual-core Cortex-A35 architecture, the highest frequency is 1.6GHz, a VPU supports encoding and decoding of a 1080P conventional video format, supports video signal input of a camera and is internally provided with an ISP.

The NPU equipment is mainly used for running a model of a cheating behavior recognition algorithm, image data in a jpg format are obtained through a shared disk to carry out model reasoning, and then a model reasoning result is returned to the RK 3399.

As shown in fig. 2, in this embodiment, a method for detecting violation of examinee based on ARM architecture in real time includes the following steps:

s1: recording a monitoring video of an examination site through a camera;

s2: the camera sends the monitoring video to a video frame-extracting service module of a main control chip RK 3399;

s3: the video frame extracting service module extracts frames of the monitoring video to obtain image data;

s4: sending the image data to a shared disk;

s5: the NPU equipment acquires corresponding image data from the shared disk, and performs algorithm analysis on the corresponding image data to obtain an analysis result;

s6: and sending the analysis result to an algorithm post-processing module, and sending the analysis result to a result storage hard disk by the algorithm post-processing module.

In this embodiment, the S2 includes the following sub-steps:

s21: the camera distributes the video through an RTSP protocol and waits for the video frame-extracting service module of the main control chip RK3399 to be accessed;

s22: configuring an RTSP address needing to be accessed;

s23: the main control chip RK3399 accesses the corresponding video according to the configured RTSP address;

s24: the main control chip RK3399 uses the VPU to carry out hard decoding on the accessed video and converts the decoded data into image data.

In this embodiment, the S5 includes the following steps:

s51: the NPU cluster service module acquires image data from a shared disk;

s52: distributing image data with different sizes to corresponding NPU equipment according to the idle degree of each NPU equipment, wherein the higher the idle degree of the NPU equipment is, the larger the distributed image data is; the lower the idle degree of the NPU equipment is, the smaller the distributed image data is;

s53: the NPU device performs an algorithmic analysis on the corresponding object data.

Specifically, firstly, data of an examination site is recorded through a camera, and the all-in-one machine device can support MP4 analysis of a historical video and can also support real-time video analysis. Currently, real-time RTSP video analysis is commonly used. The camera equipment firstly obtains the real-time scene content of the examination room, and then the camera distributes the video out through an RTSP protocol to wait for the frame-drawing service module of RK3399 to access.

And then, an RTSP address which needs to be accessed by the decoding service module is configured on a configuration interface, and at present, 50 RTSP real-time data streams can be simultaneously accessed by one all-in-one machine, so that all video accesses of one examination point can be met. The RK3399 uses the VPU to hard decode the incoming RTSP and converts the decoded data into image data for storage in the shared disk space.

The NPU cluster service module firstly acquires image data from a shared disk, then distributes the image data to the NPU equipment one by one, and the distribution module distributes data with different sizes according to the idle degree of each NPU, so that load balance of different NPUs is achieved. The NPU carries out algorithm analysis on the picture, the inference result is sent to an algorithm post-processing module, and the algorithm post-processing module finishes writing and storing the result.

In the invention, a RK3399 chip is adopted for RTSP data access and for video frame extraction and NPU reasoning result uploading and other application logic processing, a CPU adopts a big core and a small core structure of dual-core Cortex-A72 big core and quad-core Cortex-A53, great improvement is carried out on the aspects of integers, floating point numbers, memory, overall performance, power consumption and core area, a GPU adopts a new generation high-end image processor Mali-T860 of quad-core ARM, more bandwidth compression technologies (such as intelligent superposition, ASTC and local pixel storage) are integrated, more images and computing interfaces are supported, and the overall performance is improved by 45% compared with the previous generation;

the invention adopts an onboard RK1808AI chip, is internally provided with a high-energy-efficiency NPU, has strong calculation power, supports various AI frameworks and AI application development SDKs, is easy to develop, has rich interfaces facing AI applications, is convenient to expand, is suitable for functional application scenes such as voice awakening, voice recognition, face recognition and the like, adopts a dual-core Cortex-A35 architecture by a RK1808AI chip CPU, has the highest frequency of 1.6GHz, supports 1080P conventional video format coding and decoding by a VPU, supports camera video signal input and is internally provided with an ISP.

The foregoing is illustrative of the preferred embodiments of this invention, and it is to be understood that the invention is not limited to the precise form disclosed herein and that various other combinations, modifications, and environments may be resorted to, falling within the scope of the concept as disclosed herein, either as described above or as apparent to those skilled in the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

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