Digital voltage stabilizing device based on current loop control and control method thereof

文档序号：1941093 发布日期：2021-12-07 浏览：16次中文

阅读说明：本技术 基于电流环控制的数字稳压装置及其控制方法 (Digital voltage stabilizing device based on current loop control and control method thereof ) 是由张前胜马高育陈其尧李媛媛常超王莉汪庆于 2021-08-31 设计创作，主要内容包括：本发明涉及开关电源技术领域,具体涉及一种基于电流环控制的数字稳压装置及其控制方法。包括电压采样电路、PWM数字控制电路、BOOST功率管驱动电路和BOOST升压电路；PWM数字控制电路用于对输入电压、BOOST升压电路预置电压进行频率和占空比运算输出FPWMIA信号,同时对BOOST输出电压和BOOST升压电路预置电压进行PID运算输出固定频率的ISS-PWM信号；BOOST功率管驱动电路根据FPWMIA信号频率和占空比、ISS-PWM信号占空比和CSA信号对输出的PWM波信号的占空比和频率进行控制；BOOST升压电路包括用于控制BOOST升压电路储能或释能的主功率MOS管V9,主功率MOS管V9可根据BOOST功率管驱动电路输出的PWM波信号的占空比和频率关断或开启。本装置基于BOOST功率管驱动电路和PWM数字控制电路形成BOOST驱动装置,稳定BOOST输出电压。(The invention relates to the technical field of switching power supplies, in particular to a digital voltage stabilizing device based on current loop control and a control method thereof. The BOOST power tube driving circuit comprises a voltage sampling circuit, a PWM digital control circuit, a BOOST power tube driving circuit and a BOOST boosting circuit; the PWM digital control circuit is used for carrying out frequency and duty ratio operation on the input voltage and the BOOST booster circuit preset voltage to output an FPWMIA signal, and carrying out PID operation on the BOOST output voltage and the BOOST booster circuit preset voltage to output an ISS-PWM signal with fixed frequency; the BOOST power tube driving circuit controls the duty ratio and frequency of an output PWM wave signal according to the FPWMIA signal frequency and duty ratio, the ISS-PWM signal duty ratio and the CSA signal; the BOOST circuit comprises a main power MOS tube V9 for controlling the BOOST circuit to store or release energy, and the main power MOS tube V9 can be switched on or off according to the duty ratio and the frequency of a PWM wave signal output by the BOOST power tube driving circuit. The BOOST driving device is formed on the basis of the BOOST power tube driving circuit and the PWM digital control circuit, and the BOOST output voltage is stabilized.)

1. The utility model provides a digital voltage regulator device based on current loop control which characterized in that: the BOOST power tube driving circuit comprises a voltage sampling circuit, a PWM digital control circuit, a BOOST power tube driving circuit and a BOOST boosting circuit;

the voltage sampling circuit is used for sampling the input voltage and the BOOST output voltage and outputting the sampled input voltage and the BOOST output voltage to the PWM digital control circuit;

the PWM digital control circuit is used for carrying out frequency and duty ratio operation on input voltage and BOOST booster circuit preset voltage to output an FPWMIA signal, carrying out PID operation on the BOOST output voltage and the BOOST booster circuit preset voltage to output an ISS-PWM signal with fixed frequency, and outputting the FPWMIA signal and the ISS-PWM signal to the BOOST power tube driving circuit;

the BOOST power tube driving circuit collects a CSA signal for reflecting the output current of the BOOST booster circuit and controls the duty ratio and frequency of an output PWM wave signal according to the FPWMIA signal, the ISS-PWM signal and the CSA signal;

the BOOST circuit comprises a main power MOS tube V9 for controlling the BOOST circuit to store or release energy, and the main power MOS tube V9 is used for switching off or switching on according to the duty ratio and the frequency of a PWM wave signal output by the BOOST power tube driving circuit.

2. The current loop control based digital voltage stabilizing device according to claim 1, wherein the PWM digital control circuit performs frequency and duty cycle operations on the input voltage and a BOOST circuit preset voltage, and outputs the FPWMIA signal comprises:

when the preset voltage of the BOOST circuit is unchanged and the input voltage is reduced, or the preset voltage of the BOOST circuit is unchanged and the input voltage is increased, the frequency and the duty ratio of the FPWMIA signal are increased;

when the preset voltage of the BOOST circuit is unchanged and the input voltage is increased, or when the preset voltage of the BOOST circuit is unchanged and the input voltage is reduced, the frequency and the duty ratio of the FPWMIA signal are reduced.

3. The current loop control-based digital voltage stabilizing device according to claim 1, wherein the PWM digital control circuit performs PID operations on the input voltage, the BOOST output voltage, and the BOOST circuit preset voltage, and outputs an ISS-PWM signal comprising:

when the BOOST output voltage is greater than the preset voltage of the BOOST circuit, reducing the duty ratio of the ISS-PWM signal;

and when the BOOST output voltage is less than the preset voltage of the BOOST circuit, increasing the duty ratio of the ISS-PWM signal.

4. The current loop control based digital voltage stabilizing apparatus according to claim 1, wherein the BOOST power transistor driving circuit controlling the duty ratio of the PWM wave signal according to the FPWMIA signal, the ISS-PWM signal and the CSA signal comprises:

the BOOST power tube driving circuit takes the ISS-PWM signal and the CSA signal as a positive phase input end and a negative phase input end of a current comparator respectively;

when the FPWMIA signal is unchanged and is at a high level, if the triangular wave peak voltage value of the CSA signal is greater than the voltage value of the ISS-PWM signal, the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit is reduced;

when the FPWMIA signal is unchanged and is at a high level, if the triangular wave peak voltage value of the CSA signal is smaller than the voltage value of the ISS-PWM signal, the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit is increased;

when the FPWMIA signal is unchanged and is at a low level, the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit is zero.

5. The current loop control based digital voltage regulation device according to claim 1, wherein the frequency of the PWM wave signal is consistent with the frequency of the FPWMIA signal.

6. The digital voltage stabilizing device based on current loop control as claimed in claim 1, wherein the BOOST power tube driving circuit comprises a control chip N3, an FPWMIA signal input circuit and an ISS-PWM signal input circuit;

the FPWMIA signal input circuit comprises resistors R39-R41, a capacitor C24, a triode V33 and a triode V34, the FPWMIA signal is connected with the base electrode of the triode V33 through a capacitor C24 and a resistor R41 which are arranged in parallel, the emitter electrode of the triode V33 is grounded, the collector electrode of the triode V34 is connected with the base electrode of the triode V34, the collector electrode of the triode V34 is connected with a reference voltage input end, the emitter electrode of the triode V is connected with an RT/CT signal input pin of a control chip N3, and the base electrode and the collector electrode of the triode V33 are respectively connected with the reference voltage input end through resistors R40 and R39;

the ISS-PWM signal input circuit comprises a primary filter circuit, a secondary filter circuit and a triode V35, the ISS-PWM signal is connected with the base electrode of the triode V35 through the primary filter circuit and the secondary filter circuit which are connected in series, the collector electrode of the triode V35 is grounded, and the emitter electrode of the triode V35 is connected with a COMP signal input pin of a control chip N3;

the CSA signal is connected to the CS signal input pin of the control chip N3 through a resistor R38.

7. The digital voltage stabilizing device based on current loop control according to claim 6, further comprising a BOOST overvoltage protection circuit connected to the output end of the BOOST circuit, wherein the BOOST overvoltage protection circuit comprises voltage-sharing capacitors C2, C3, voltage-sharing resistors R1-R4 and an optical coupler N1, the voltage-sharing capacitors C2 and C3 are arranged between the input end of the BOOST overvoltage protection circuit and the ground in series, and the voltage-sharing resistors R1-R4 are connected to the primary side of the optical coupler N1;

the BOOST power tube driving circuit also comprises a grid driving chip N2, resistors R35-R37, R42-R45, a capacitor C25 and a triode V32, the PWM wave signal output end of the control chip N3 is respectively connected with the INA pin of the gate driving chip N2 and the collector of the triode V32 through a resistor R37, the resistor R37 is connected with the GND pin of the gate driving chip N2 through a resistor R36, the resistor R45 and the capacitor C25 are arranged in parallel between the INB pin of the gate driving chip N2 and the emitter of the triode V32, the primary side output end of the optocoupler N1 is connected with an INB pin of a gate drive chip N2 through a resistor R42, the resistor R43 and the resistor R44 are connected in series between the OUTB pin of the gate driver chip N2 and ground, the base electrode of the triode V32 is connected between the resistor R43 and the resistor R44, and the OUTA pin of the gate driving chip N2 is connected with the control end of the main power MOS transistor V9 through the resistor R35.

8. The digital voltage stabilizing device based on current loop control according to claim 1, wherein: the power supply circuit comprises an input filter circuit, an auxiliary power supply circuit and an auxiliary power supply feedback circuit, wherein the output end of the input filter circuit is connected with the input end of the auxiliary power supply circuit, the first voltage output end of the auxiliary power supply circuit is connected with the voltage input end of a BOOST power tube driving circuit and the feedback signal input end of the auxiliary power supply feedback circuit, the second voltage output end of the auxiliary power supply circuit is connected with the voltage input end of a PWM digital control circuit, and the feedback signal output end of the auxiliary power supply feedback circuit is connected with the BOOST power tube driving circuit.

9. A method for controlling a digital voltage regulator apparatus based on current loop control according to claim 1, comprising:

when the input voltage and the preset voltage of the BOOST booster circuit are not changed and the output load of the BOOST booster circuit is increased, the PWM digital control circuit controls the frequency and the duty ratio of an FPWMIA signal input to the BOOST power tube driving circuit to be unchanged and the duty ratio of an ISS-PWM signal to be increased, and controls the frequency and the duty ratio of a PWM wave signal output by the BOOST power tube driving circuit to be unchanged and the duty ratio to be increased;

when the input voltage and the preset voltage of the BOOST circuit are not changed and the output load of the BOOST circuit is reduced, the PWM digital control circuit controls the frequency and the duty ratio of the FPWMIA signal input to the BOOST power tube driving circuit to be unchanged and the duty ratio of the ISS-PWM signal to be reduced, and the frequency of the PWM wave signal output by the BOOST power tube driving circuit to be unchanged and the duty ratio to be reduced.

10. The method for controlling a digital voltage regulator based on current loop control according to claim 9, further comprising:

when the preset voltage of the BOOST circuit and the output load of the BOOST circuit are not changed and the input voltage is increased, the PWM digital control circuit controls the frequency and the duty ratio of an FPWMIA signal input to the BOOST power tube driving circuit to be reduced and the duty ratio of an ISS-PWM signal to be reduced, and the frequency and the duty ratio of a PWM wave signal output by the BOOST power tube driving circuit to be reduced;

when the preset voltage of the BOOST circuit and the output load of the BOOST circuit are not changed and the input voltage is reduced, the PWM digital control circuit controls the frequency and the duty ratio of the FPWMIA signal input to the BOOST power tube driving circuit to be increased, the duty ratio of the ISS-PWM signal to be increased, and the frequency and the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit to be increased.

Technical Field

The invention relates to the technical field of switching power supplies, in particular to a digital voltage stabilizing device based on current loop control and a control method thereof.

Background

The high frequency of the switching power supply is a development trend of the power supply technology, the advantages and benefits brought by the high frequency promote the miniaturization and the lightness of products, the digital control has close relation with the traditional/conventional control, the conventional control is often included in the digital control, and the digital control tries to expand the conventional control method and establish a series of new theories and methods to solve the complex control problem with more challenges. With the continuous development of chip technology, digital control will be rapidly developed in the switching power supply. The microcontroller enters the DC-DC converter as a necessary route for the technical development. Compared with analog control, the digital control switch power supply has the following characteristics in structure and performance:

(1) the digital signal processor is used as a PWM wave driving core, the flexibility of the system is improved by using the switching power supply driver and the PWM controller as control objects, and the control strategy can be changed on the same hardware platform by adopting a digital control technology only by changing software, so that the control of different converter systems is realized.

(2) The technology of integrating digital power supplies is adopted, and the optimal combination of the switching power supply in an analog component and a digital component is realized.

(3) High integration level. The monolithic integration of the switching power supply is realized, and a large number of discrete devices are integrated into one chip or a group of chips.

(4) The digital control system has strong anti-interference capability. The analog components are susceptible to environmental and temperature changes, so the analog controller has poor stability. The digital control is less affected by device aging and environment or parameter change, is more stable and reliable than an analog controller, and has strong anti-interference capability.

(5) The advantages of a digital signal processor and a microprocessor can be fully exerted, various complex control strategies can be realized by digital control, the performance of a control system is improved, and the designed switching power supply can reach high-technology high-performance indexes.

In view of the advantages of the digitally controlled switching power supply, how to provide a voltage stabilizer with high reliability and high stability and capable of satisfying a wide range of input voltages becomes a difficult problem to be solved urgently.

Disclosure of Invention

The invention aims to provide a digital voltage stabilizing device based on current loop control and a control method thereof, aiming at the defects of the prior art, and the digital voltage stabilizing device has high reliability and high stability and can meet the requirement of wide-range input voltage.

The invention relates to a digital voltage stabilizing device based on current loop control, which adopts the technical scheme that: the BOOST power tube driving circuit comprises a voltage sampling circuit, a PWM digital control circuit, a BOOST power tube driving circuit and a BOOST boosting circuit;

Preferably, the PWM digital control circuit performs frequency and duty ratio operation on the input voltage and the BOOST circuit preset voltage, and outputting the FPWMIA signal includes:

Preferably, the PWM digital control circuit performs PID operation on the input voltage, the BOOST output voltage, and the BOOST circuit preset voltage, and outputting the ISS-PWM signal includes:

when the BOOST output voltage is greater than the preset voltage of the BOOST circuit, reducing the duty ratio of the ISS-PWM signal;

and when the BOOST output voltage is less than the preset voltage of the BOOST circuit, increasing the duty ratio of the ISS-PWM signal.

Preferably, the controlling the duty ratio of the PWM wave signal by the BOOST power tube driving circuit according to the FPWMIA signal, the ISS-PWM signal, and the CSA signal includes:

the BOOST power tube driving circuit takes the ISS-PWM signal and the CSA signal as a positive phase input end and a negative phase input end of a current comparator respectively;

when the FPWMIA signal is unchanged and is at a low level, the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit is zero.

Preferably, the frequency of the PWM wave signal is identical to the frequency of the FPWMIA signal.

Preferably, the BOOST power tube driving circuit comprises a control chip N3, an FPWMIA signal input circuit and an ISS-PWM signal input circuit;

the CSA signal is connected to the CS signal input pin of the control chip N3 through a resistor R38.

Preferably, the BOOST protection circuit further comprises a BOOST overvoltage protection circuit connected to the output end of the BOOST circuit, the BOOST overvoltage protection circuit comprises voltage-sharing capacitors C2 and C3, voltage-sharing resistors R1-R4 and an optocoupler N1, the voltage-sharing capacitors C2 and C3 are arranged between the input end of the BOOST overvoltage protection circuit and the ground in series, and the voltage-sharing resistors R1-R4 are connected to the primary side of the optocoupler N1;

Preferably, the power supply circuit further comprises an input filter circuit, an auxiliary power supply circuit and an auxiliary power supply feedback circuit, wherein the output end of the input filter circuit is connected with the input end of the auxiliary power supply circuit, the first voltage output end of the auxiliary power supply circuit is connected with the voltage input end of the BOOST power tube driving circuit and the feedback signal input end of the auxiliary power supply feedback circuit, the second voltage output end of the auxiliary power supply circuit is connected with the voltage input end of the PWM digital control circuit, and the feedback signal output end of the auxiliary power supply feedback circuit is connected with the BOOST power tube driving circuit.

The invention relates to a control method of a digital voltage stabilizing device based on current loop control, which has the technical scheme that:

Preferably, the method further comprises the following steps:

The invention has the beneficial effects that:

1. the input voltage and the BOOST output voltage are sampled by using the voltage sampling circuit, the FPWMIA signal and the ISS-PWM signal are adjusted in the PWM digital control circuit by carrying out frequency and duty ratio operation and PID operation on the input voltage, the BOOST output voltage and the BOOST booster circuit preset voltage, so that the output of a rear-stage BOOST power tube driving circuit is adjusted, the switching-on speed and time of a switching tube of the BOOST booster circuit can be correspondingly controlled according to the input voltage, the BOOST output voltage and the BOOST booster circuit preset voltage, the high reliability and the high stability are ensured, and meanwhile, the wide-range input voltage can be met.

2. The PWM digital control circuit controls the frequency and the duty ratio of the FPWMIA signal according to the input voltage and the preset voltage of the BOOST booster circuit, controls the duty ratio of the ISS-PWM signal according to the output voltage of the BOOST and the preset voltage of the BOOST booster circuit, and effectively adjusts the frequency and the duty ratio of the output PWM wave signal by inputting the FPWMIA signal, the ISS-PWM signal and the CSA signal into the BOOST power tube driving circuit, so that the closed-loop control of the BOOST booster circuit is realized.

Drawings

FIG. 1 is a schematic view of the connection principle of the present invention;

FIG. 2 is a schematic diagram showing the connection of the input filter circuit, the BOOST circuit, and the BOOST overvoltage protection circuit according to the present invention;

FIG. 3 is a schematic diagram of a voltage sampling circuit according to the present invention;

FIG. 4 is a schematic diagram of a PWM digital control circuit according to the present invention;

fig. 5 is a schematic diagram of a BOOST power transistor driving circuit according to the present invention.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.

It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

Fig. 1 shows a schematic diagram of a connection principle of a digital voltage stabilizer based on current loop control, the digital voltage stabilizer comprises an auxiliary power supply circuit 1, an auxiliary power supply feedback circuit 2, a voltage sampling circuit 3, an input filter circuit 4, a PWM digital control circuit 5, a BOOST voltage BOOST circuit 6, a BOOST overvoltage protection circuit 7, and a BOOST power tube driving circuit 8, wherein the BOOST voltage BOOST circuit 6 is connected with the input filter circuit 4, the BOOST overvoltage protection circuit 7, and the BOOST power tube driving circuit 8; the auxiliary power supply circuit 1 is connected with the auxiliary power supply feedback circuit 2; the voltage sampling circuit 3 is connected with the input filter circuit 4 and the BOOST circuit 6; the output end of the voltage sampling circuit 3 is used as the connecting end of the control end of the PWM digital control circuit 5; the output end of the auxiliary power supply circuit 1 is used as the connecting end of the control end of the PWM digital control circuit 5, and the output end of the PWM digital control circuit 5 is used as the connecting end of the control end of the BOOST power tube driving circuit 8; the output end of the input filter circuit 4 is used as the connecting end of the power supply end of the auxiliary power supply circuit 1.

Example one

The UC1842 chip is taken as an example for explanation in this embodiment, and for convenience of explanation, only the part related to this embodiment is shown, and the details are as follows:

as shown in fig. 2, the output end of the input filter circuit 4 is used as the connection end of the power supply end of the auxiliary power supply circuit 1, the auxiliary power supply circuit performs current loop control on the single-tube flyback power supply 1 by using a UC1842 chip, two sets of secondary sides of the flyback transformer output 14V and 5V dc voltages respectively, the 14V voltage supplies power to the UC1842 and a gate driver chip HRD4424M of the BOOST power tube driver circuit 8, the 5V voltage is converted into a 3.3V voltage after being input into the voltage regulators HRW1117-3.3 by the low-voltage-difference positive input, and supplies power to the PWM digital control circuit 5 chip STM32F103, and the 14V point is also used as the input voltage of the auxiliary power supply feedback circuit 2.

The BOOST circuit 6 is connected with the input filter circuit 4, the BOOST overvoltage protection circuit 7 and the BOOST power tube driving circuit 8, when high-voltage direct current is input, the EMI rectification input filter circuit 4 is formed by the differential mode inductor, the common mode inductor, the X capacitor and the Y capacitor to form stable direct current, an R12 power type thermistor is connected in series between the input filter circuit 4 and the BOOST circuit 6, the R12 can effectively suppress surge current during power-on, and after the function of suppressing the surge current is completed, the resistance value of the power type thermistor is reduced to a very small degree due to the continuous action of the current, and the power consumed by the power type thermistor can be ignored. This patent BOOST circuit 6 mode is continuous state, and when BOOST circuit 6's main power MOS pipe was opened, power inductance L2 current rose, and power inductance L2 carries out the energy storage, and power inductance L2 released energy and made BOOST output voltage rise for BOOST overvoltage protection circuit 7's equalizer capacitor C2, C3 charge when the main power MOS pipe turn-offs. The BOOST circuit 6 is different from the conventional BOOST converter in that the main power MOS transistor V9 is turned on by a digital control method, and can satisfy a wide range of input voltage.

The output end of the BOOST overvoltage protection circuit is used as the connecting end of the control end of the BOOST power tube driving circuit 8, the BOOST overvoltage protection circuit 7 mainly comprises voltage-sharing capacitors C2 and C3, voltage-sharing resistors R1, R2, R3, R4 and an optical coupler N1, when the BOOST circuit outputs overvoltage, the voltage of a primary side light emitting diode of the optical coupler N1 is increased, a secondary side triode is conducted, and BUS-OVP is high level and is transmitted to the input end B of a grid driving chip HRD 4424.

As shown in fig. 3, the voltage sampling circuit 3 is connected to the input filter circuit 4 and the BOOST voltage BOOST circuit 6, meanwhile, the output end of the voltage sampling circuit is used as the connecting end of the control end of the PWM digital control circuit, after the input voltage and the BOOST output voltage respectively pass through the divider resistor and the sampling resistor, the voltage value obtained by sampling is converted into a level signal which can be received by a single chip machine STM32F103 after filtering compensation of a sampling circuit, the software control strategy of the patent adopts an incremental PID control algorithm, two groups of PWM signals are formed by the acquired input voltage, the actual output voltage of a BOOST circuit and the preset output voltage of software after PID calculation and are provided for a UC1842 chip of a BOOST power tube driving circuit 8, two groups of digital PWM waves are formed by the single chip microcomputer STM32F103 to control the frequency and the duty ratio of the output PWM waves of the UC1842, the switching-on of the main power MOS transistor V9 is controlled by the output of UC1842 to adjust the BOOST output voltage.

As shown in fig. 4, the output terminal of the PWM digital control circuit 5 serves as the connection terminal of the control terminal of the BOOST power transistor driving circuit 8, and the STM32F103 of the PWM digital control circuit 5 provides two PWM waves for the BOOST power transistor driving circuit 8. One PWM signal FPWMIA provides an operating frequency for pin 4 of UC1842 chip of BOOST power transistor driving circuit 8, and the other signal ISS-PWM is used to adjust the duty cycle of the UC1842 output PWM wave. The FPWMIA signal, ISS-PWM and CSA signal jointly determine the frequency and duty cycle of the PWM wave output from pin 6 of the UC1842 chip to control the on and off time of the main power MOS transistor V9, thereby adjusting the output voltage of the BOOST circuit.

The PWM digital control circuit 5 performs specific frequency and duty ratio operation on the input voltage and the BOOST circuit preset voltage, and outputs the FPWMIA signal, including:

when the preset voltage of the BOOST circuit is unchanged and the input voltage is reduced, or when the preset voltage of the BOOST circuit is unchanged and the input voltage is increased, the frequency and the duty ratio of the FPWMIA signal are increased (the frequency of the PWM wave output by the control chip N3 is increased);

The PWM digital control circuit performs PID operation on the input voltage, the BOOST output voltage and the BOOST booster circuit preset voltage, and the output ISS-PWM signal comprises:

when the BOOST output voltage is greater than the preset voltage of the BOOST circuit, reducing the duty ratio of the ISS-PWM signal;

and when the BOOST output voltage is less than the preset voltage of the BOOST circuit, increasing the duty ratio of the ISS-PWM signal.

The BOOST power tube driving circuit controls the duty ratio of the PWM wave signal according to the FPWMIA signal, the ISS-PWM signal and the CSA signal, and the control process comprises the following steps:

the BOOST power tube driving circuit respectively uses the signal obtained by filtering, triode amplifying and voltage dividing the ISS-PWM signal and the CSA signal as a positive phase input end and a negative phase input end of a current comparator in a control chip N3;

when the FPWMIA signal is unchanged and the FPWMIA signal is at a high level, if the triangular wave peak voltage value of the CSA signal is greater than the voltage value of the positive phase input end of the current comparator in the control chip N3, the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit is reduced;

when the FPWMIA signal is unchanged, and the FPWMIA signal is at a high level, if the triangular wave peak voltage value of the CSA signal is smaller than the voltage value of the positive phase input end of the current comparator in the control chip N3, the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit is increased;

when the FPWMIA signal is unchanged and the FPWMIA signal is at a low level, the duty ratio of the PWM wave signal output by the BOOST power tube driving circuit is zero.

As shown in fig. 5, the BOOST power transistor driving circuit includes a control chip N3, an FPWMIA signal input circuit, and an ISS-PWM signal input circuit. The FPWMIA signal input circuit comprises resistors R39-R41, a capacitor C24, a triode V33 and a triode V34, the FPWMIA signal is connected with the base electrode of the triode V33 through a capacitor C24 and a resistor R41 which are arranged in parallel, the emitter electrode of the triode V33 is grounded, the collector electrode of the triode V34 is connected with the base electrode of the triode V34, the collector electrode of the triode V34 is connected with a reference voltage input end, the emitter electrode of the triode V is connected with an RT/CT signal input pin of a control chip N3, and the base electrode and the collector electrode of the triode V33 are respectively connected with the reference voltage input end through resistors R40 and R39. The ISS-PWM signal input circuit comprises a primary filter circuit, a secondary filter circuit and a triode V35, the ISS-PWM signal is connected with the base electrode of the triode V35 through the primary filter circuit and the secondary filter circuit which are connected in series, the collector electrode of the triode V35 is grounded, and the emitter electrode of the triode V35 is connected with a COMP signal input pin of a control chip N3. The CSA signal is connected to the CS signal input pin of the control chip N3 through a resistor R38.

The BOOST power tube driving circuit also comprises a grid driving chip N2, resistors R35-R37, R42-R45, a capacitor C25 and a triode V32, the PWM wave signal output end of the control chip N3 is respectively connected with the INA pin of the gate driving chip N2 and the collector of the triode V32 through a resistor R37, the resistor R37 is connected with the GND pin of the gate driving chip N2 through a resistor R36, the resistor R45 and the capacitor C25 are arranged in parallel between the INB pin of the gate driving chip N2 and the emitter of the triode V32, the primary side output end of the optocoupler N1 is connected with an INB pin of a gate drive chip N2 through a resistor R42, the resistor R43 and the resistor R44 are connected in series between the OUTB pin of the gate driver chip N2 and ground, the base electrode of the triode V32 is connected between the resistor R43 and the resistor R44, and the OUTA pin of the gate driving chip N2 is connected with the control end of the main power MOS transistor V9 through the resistor R35.

When the FPWMIA signal is at high level, the transistor V33 is turned on, the reference voltage of 5V forms a loop through R39 and V33, when the FPWMIA signal is at low level, the transistor V33 is turned off, the reference voltage of 5V provides an on voltage for V34 through R39, there is a high level of about 4.5V at the UC1842 frequency pin 4, the high level signal passes through the UC1842 internal oscillator and then is used as the input terminal of the internal pwm latch and or gate, the output terminal of the or gate must be low after being not gate processed, and finally the signal outputs low level through the totem column circuit, and it can be seen that when the FPWMIA signal is at low level, the output of the UC1842 chip 6 pin is also at low level compared with the fpia signal.

Another fixed-frequency PWM signal ISS-PWM provided by the singlechip STM32F103 forms a stable voltage value at the base level of the triode V35 after two-stage filtering, the stable voltage value is transmitted to the pin 1 of the BOOST power tube driving circuit 8UC1842 through the following action of the triode, and the signal is divided by the inner part of the UC1842 and then is used as the input voltage value of the positive phase end of the inner current comparator UC 1842; when the FPWMIA signal is at high level, the output of UC1842 chip 6 is determined by the ISS-PWM signal and the 4-leg PWM signal of UC1842, the 3-leg voltage signal of UC1842 is the voltage collected by R38 after the BOOST output current flows through current transformer T3, the 3-leg voltage signal of UC1842 is an intermittent triangular wave signal due to the switching of main power MOS V9, which is compared with the 1-leg voltage value of UC1842 as the input value of the positive phase terminal and the negative phase terminal of the UC1842 internal current detection, the UC1842 current sampling 3-leg, the compensation feedback 1-leg and the internal current detection comparator are used to control the output of UC1842 chip 6, when the 3-leg triangular wave peak voltage value of UC1842 is greater than the input value of the positive phase terminal of the UC1842 internal current comparator, the UC1842 chip 6-leg output is at low level, the main power MOS V9 is turned off, the output voltage of ost is reduced, and when the triangular wave peak voltage value of UC1842 is less than the input value of the positive phase terminal of the UC1842 internal current comparator, the pin 6 of the UC1842 chip is at high level, the main power MOS transistor V9 is turned on, and the BOOST output voltage rises.

A control method of a digital voltage stabilizing device based on current loop control comprises the following steps:

When the preset voltage of the BOOST circuit and the output load of the BOOST circuit are not changed and the input voltage is increased, the PWM digital control circuit controls the frequency and the duty ratio of an FPWMIA signal input to the BOOST power tube driving circuit to be reduced and the duty ratio of an ISS-PWM signal to be reduced, and the frequency and the duty ratio of a PWM wave signal output by the BOOST power tube driving circuit to be reduced;

Wherein the frequency of the PWM wave signal is consistent with the frequency of the FPWMIA signal. That is, when the frequency of the FPWMIA signal increases, the frequency of the PWM wave signal also increases; when the frequency of the FPWMIA signal decreases, the frequency of the PWM wave signal also decreases; when the frequency of the FPWMIA signal is constant, the frequency of the PWM wave signal is also constant.

Example two

This embodiment explains the control method based on the chip UC 1842:

when the input voltage and the output load of the BOOST circuit are fixed, the triangular wave signal collected by the pin 3 of the UC1842 is fixed, and the difference value of the BOOST output voltage and the preset output voltage is subjected to PID operation of software to enable the PWM signal ISS-PWM output by the single chip microcomputer STM32F103 to be adjusted, so that the BOOST output voltage is stabilized.

When the input voltage is fixed and the output load of the BOOST circuit is increased, the BOOST output current is increased, the triangular wave voltage signal obtained by sampling 3 pins of the UC1842 is increased, the BOOST output voltage is reduced, the difference value between the sampling value of the BOOST output voltage and the BOOST output preset voltage is increased, the ISS-PWM signal is timely increased through the PID operation of software, and after the ISS-PWM signal is compared with the voltage value of 1 pin of the UC1842, the duty ratio of the PWM wave output by 6 pins of the UC1842 is increased, the opening time of the main power MOS transistor V9 is increased, so that the output voltage of the BOOST circuit is timely increased, and the difference value between the output voltage value and the BOOST preset output voltage value is reduced to achieve the voltage stabilizing effect.

On the contrary, when the input voltage is constant and the output load of the BOOST circuit is reduced, the BOOST output current is reduced, the triangular wave voltage signal obtained by sampling the 3 pins of the UC1842 is reduced, the BOOST output voltage is increased, the difference value between the sampling value of the BOOST output voltage and the preset output voltage of the BOOST is increased, the ISS-PWM signal is timely reduced through the PID operation of software, the duty ratio of the PWM wave output by the 6 pins of the UC1842 is reduced, the opening time of the main power MOS tube V9 is reduced, the output voltage of the BOOST circuit is timely reduced, and the difference value between the reduced output voltage and the preset output voltage value of the BOOST achieves the voltage stabilizing effect.

When the BOOST outputs a preset voltage for a certain time, under the same load condition, if the input voltage rises, the output voltage will rise, and at this time, the output voltage needs to be reduced to maintain the stability of the output voltage. In the device, when the phenomenon occurs, the output voltage is larger than the BOOST output preset voltage, and at the moment, the FPWMIA signal and the ISS-PWM signal are simultaneously adjusted, so that the frequency and the duty ratio of the FPWMIA signal are reduced, the duty ratio of the ISS-PWM signal is reduced, the frequency and the duty ratio of the PWM wave signal output by the pin 6 of the UC1842 are reduced, the turn-on time of the main power MOS transistor V9 is shortened, the output voltage is reduced, and the purpose of stabilizing the voltage is achieved.

When the BOOST outputs a preset voltage for a certain time, under the same load condition, if the input voltage is reduced, the output voltage is reduced, and at this time, the output voltage needs to be raised to maintain the stability of the output voltage. In the device, when the phenomenon occurs, the output voltage is smaller than the BOOST output preset voltage, and at the moment, the FPWMIA signal and the ISS-PWM signal are adjusted simultaneously, so that the frequency and the duty ratio of the FPWMIA signal are increased, the duty ratio of the ISS-PWM signal is increased, the frequency and the duty ratio of a PWM wave signal output by a pin 6 of the UC1842 are increased, the side length of the opening time of the main power MOS transistor V9 is increased, the output voltage is increased, and the purpose of voltage stabilization is achieved.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

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Digital voltage stabilizing device based on current loop control and control method thereof

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