阅读说明：本技术 一种交换机及其cpld的升级系统和方法 (Switch and CPLD upgrading system and method thereof ) 是由 韩威 薛广营 于 2021-08-13 设计创作，主要内容包括：本申请公开了一种CPLD的升级系统,包括：第一升级触发装置；第二升级触发装置；通道控制电路,用于实现切换电路的第一通道和第二通道的互锁导通；切换电路,用于在切换电路的第一通道导通时,利用切换电路的第一通道实现第一升级触发装置和CPLD的通信连接,以使第一升级触发装置对CPLD进行升级；在切换电路的第二通道导通时,利用切换电路的第二通道实现第二升级触发装置和CPLD的通信连接,以使第二升级触发装置对CPLD进行升级。应用本申请的方案,可以实现CPLD的升级并且有效地避免出现CPLD的版本错乱,系统崩溃的问题。本申请还公开了一种交换机以及一种CPLD的升级方法,具有相应技术效果。(The application discloses upgrading system of CPLD includes: a first upgrade trigger device; a second upgrade trigger device; the channel control circuit is used for realizing the interlocking conduction of a first channel and a second channel of the switching circuit; the switching circuit is used for realizing the communication connection between the first upgrading trigger device and the CPLD by utilizing the first channel of the switching circuit when the first channel of the switching circuit is conducted, so that the first upgrading trigger device upgrades the CPLD; and when the second channel of the switching circuit is conducted, the second channel of the switching circuit is utilized to realize the communication connection between the second upgrading trigger device and the CPLD, so that the second upgrading trigger device upgrades the CPLD. By applying the scheme of the application, the upgrading of the CPLD can be realized, and the problems of disordered version and system crash of the CPLD can be effectively avoided. The application also discloses a switch and an upgrading method of the CPLD, and the switch and the upgrading method have corresponding technical effects.)

1. An upgrade system for a CPLD, comprising:

a first upgrade trigger device;

a second upgrade trigger device;

the channel control circuit is respectively connected with the first upgrading trigger device, the second upgrading trigger device and the switching circuit and is used for controlling the conduction of a first channel of the switching circuit and forbidding the conduction of a second channel of the switching circuit when detecting a first control signal output by the first upgrading trigger device in a standby state until the first control signal is not detected; when a second control signal output by the second upgrading trigger device is detected in a standby state, controlling the conduction of a second channel of the switching circuit and prohibiting the conduction of a first channel of the switching circuit until the second control signal is not detected; wherein the standby state indicates that the channel control circuit does not detect the first control signal and does not detect the second control signal either;

the switching circuit is connected with the first upgrading trigger device and the second upgrading trigger device and is used for realizing the communication connection between the first upgrading trigger device and the CPLD by utilizing the first channel of the switching circuit when the first channel of the switching circuit is conducted so as to upgrade the CPLD by the first upgrading trigger device; and when the second channel of the switching circuit is conducted, the second channel of the switching circuit is utilized to realize the communication connection between the second upgrading trigger device and the CPLD, so that the second upgrading trigger device upgrades the CPLD.

2. The upgrading system for CPLDs according to claim 1, wherein the first upgrade triggering device is a CPU and the second upgrade triggering device is a BMC.

3. The upgrading system for CPLDs according to claim 1, wherein the first control signal and the second control signal are both PWM signals.

4. The upgrading system for a CPLD according to claim 3, wherein the channel control circuit includes a first controller, a second controller, a first not gate, a second not gate, a first resistor, and a second resistor:

the input end and the output end of a first channel of the first controller are respectively connected with the first upgrading trigger device and the input end of a first channel of the second controller, and the output end of the first channel of the second controller is respectively connected with a first control end of the switching circuit and the input end of the first NOT gate; the input end and the output end of a second channel of the first controller are respectively connected with the second upgrade trigger device and the input end of the second channel of the second controller, and the output end of the second channel of the second controller is respectively connected with a second control end of the switching circuit and the input end of the second NOT gate; the output end of the first NOT gate is respectively connected with the first end of the first resistor and the second control end of the first controller; an output end of the second not gate is respectively connected with a first end of the second resistor and a first control end of the first controller, and a second end of the first resistor and a second end of the second resistor are both grounded;

when the first control end of the first controller is in a default first level state, a first channel of the first controller is switched on, and when the first control end of the first controller is in a second level state, the first channel of the first controller is switched off; when the second control end of the first controller is in a default first level state, the second channel of the first controller is switched on, and when the second control end of the first controller is in a second level state, the second channel of the first controller is switched off;

when the input end of the first channel of the second controller receives a PWM signal, the output end of the first channel of the second controller is in a first level state, and when the input end of the first channel of the second controller does not receive the PWM signal, the output end of the first channel of the second controller is in a default second level state; when the input end of the second channel of the second controller receives the PWM signal, the output end of the second channel of the second controller is in a first level state, and when the input end of the second channel of the second controller does not receive the PWM signal, the output end of the second channel of the second controller is in a default second level state.

5. The upgrading system for CPLD according to claim 4, characterized in that, the first level state is a low level state, and the second level state is a high level state.

6. The upgrade system for a CPLD according to claim 1, wherein the switching circuit is connected to a JTAG interface of the first upgrade trigger device and to a JTAG interface of the second upgrade trigger device.

7. The upgrading system of CPLDs according to claim 1, wherein the switching circuit is connected in ring communication with N CPLDs for upgrading any one of the N CPLDs, N being a positive integer greater than 1.

8. A switch characterized by an upgrade system comprising a CPLD according to any one of claims 1 to 7.

9. An upgrading method for a CPLD, which is applied to the upgrading system for a CPLD according to any one of claims 1 to 7, and comprises:

when the channel control circuit detects a first control signal output by the first upgrading trigger device in a standby state, controlling the conduction of a first channel of the switching circuit and prohibiting the conduction of a second channel of the switching circuit until the first control signal is not detected, so that when the first channel of the switching circuit is conducted, the first channel of the switching circuit is utilized to realize the communication connection between the first upgrading trigger device and the CPLD, and the first upgrading trigger device upgrades the CPLD;

when the channel control circuit detects a second control signal output by the second upgrade trigger device in a standby state, controlling the conduction of a second channel of the switching circuit and prohibiting the conduction of a first channel of the switching circuit until the second control signal is not detected, so that when the second channel of the switching circuit is conducted, the second channel of the switching circuit is utilized to realize the communication connection between the second upgrade trigger device and the CPLD, and the second upgrade trigger device upgrades the CPLD;

wherein the standby state indicates that the channel control circuit does not detect the first control signal and does not detect the second control signal.

10. The upgrading method for CPLD according to claim 9, characterized in that the first upgrade triggering device is a CPU and the second upgrade triggering device is a BMC.

Technical Field

The invention relates to the technical field of communication equipment, in particular to a switch and a CPLD (complex programmable logic device) upgrading system and method thereof.

Background

At present, various large internet manufacturers can combine their respective service requirements to perform customized development on data center switch products. Internet manufacturers can set product hardware design specifications, network equipment suppliers provide hardware and bottom layer drivers, switching chip manufacturers provide SAI (Switch Abstraction Interface), on the basis, the internet manufacturers can independently complete the development of an upper operating system, and the type of Switch product is also called as a white box Switch. When an internet manufacturer customizes a product hardware architecture of a white box switch, a BMC (Baseboard management Controller) chip is usually added to improve product reliability, so as to achieve system monitoring task offloading, firmware and Logic version upgrading, reduce a task burden of a Central Processing Unit (CPU), and improve switch product reliability.

In summary, how to effectively avoid the abnormal situations of version disorder and system crash of the CPLD is a technical problem that needs to be solved urgently by those skilled in the art at present.

Disclosure of Invention

The invention aims to provide a switch and a CPLD upgrading system and method thereof, so as to effectively avoid the abnormal situations of version disorder and system breakdown of the CPLD.

In order to solve the technical problems, the invention provides the following technical scheme:

an upgrade system for a CPLD, comprising:

a first upgrade trigger device;

a second upgrade trigger device;

the channel control circuit is respectively connected with the first upgrading trigger device, the second upgrading trigger device and the switching circuit and is used for controlling the conduction of a first channel of the switching circuit and forbidding the conduction of a second channel of the switching circuit when detecting a first control signal output by the first upgrading trigger device in a standby state until the first control signal is not detected; when a second control signal output by the second upgrading trigger device is detected in a standby state, controlling the conduction of a second channel of the switching circuit and prohibiting the conduction of a first channel of the switching circuit until the second control signal is not detected; wherein the standby state indicates that the channel control circuit does not detect the first control signal and does not detect the second control signal either;

the switching circuit is connected with the first upgrading trigger device and the second upgrading trigger device and is used for realizing the communication connection between the first upgrading trigger device and the CPLD by utilizing the first channel of the switching circuit when the first channel of the switching circuit is conducted so as to upgrade the CPLD by the first upgrading trigger device; and when the second channel of the switching circuit is conducted, the second channel of the switching circuit is utilized to realize the communication connection between the second upgrading trigger device and the CPLD, so that the second upgrading trigger device upgrades the CPLD.

Preferably, the first upgrade triggering device is a CPU, and the second upgrade triggering device is a BMC.

Preferably, the first control signal and the second control signal are both PWM signals.

Preferably, the channel control circuit includes a first controller, a second controller, a first not gate, a second not gate, a first resistor, and a second resistor:

the input end and the output end of a first channel of the first controller are respectively connected with the first upgrading trigger device and the input end of a first channel of the second controller, and the output end of the first channel of the second controller is respectively connected with a first control end of the switching circuit and the input end of the first NOT gate; the input end and the output end of a second channel of the first controller are respectively connected with the second upgrade trigger device and the input end of the second channel of the second controller, and the output end of the second channel of the second controller is respectively connected with a second control end of the switching circuit and the input end of the second NOT gate; the output end of the first NOT gate is respectively connected with the first end of the first resistor and the second control end of the first controller; an output end of the second not gate is respectively connected with a first end of the second resistor and a first control end of the first controller, and a second end of the first resistor and a second end of the second resistor are both grounded;

when the first control end of the first controller is in a default first level state, a first channel of the first controller is switched on, and when the first control end of the first controller is in a second level state, the first channel of the first controller is switched off; when the second control end of the first controller is in a default first level state, the second channel of the first controller is switched on, and when the second control end of the first controller is in a second level state, the second channel of the first controller is switched off;

when the input end of the first channel of the second controller receives a PWM signal, the output end of the first channel of the second controller is in a first level state, and when the input end of the first channel of the second controller does not receive the PWM signal, the output end of the first channel of the second controller is in a default second level state; when the input end of the second channel of the second controller receives the PWM signal, the output end of the second channel of the second controller is in a first level state, and when the input end of the second channel of the second controller does not receive the PWM signal, the output end of the second channel of the second controller is in a default second level state.

Preferably, the first level state is a low level state, and the second level state is a high level state.

Preferably, the switching circuit is connected to the JTAG interface of the first upgrade trigger apparatus and connected to the JTAG interface of the second upgrade trigger apparatus.

Preferably, the switching circuit is in annular communication connection with the N CPLDs to upgrade any one of the N CPLDs, where N is a positive integer greater than 1.

A switch comprising an upgrade system for a CPLD as claimed in any one of the preceding claims.

An upgrading method of a CPLD is applied to an upgrading system of a CPLD according to any one of the above methods, and includes:

when the channel control circuit detects a first control signal output by the first upgrading trigger device in a standby state, controlling the conduction of a first channel of the switching circuit and prohibiting the conduction of a second channel of the switching circuit until the first control signal is not detected, so that when the first channel of the switching circuit is conducted, the first channel of the switching circuit is utilized to realize the communication connection between the first upgrading trigger device and the CPLD, and the first upgrading trigger device upgrades the CPLD;

when the channel control circuit detects a second control signal output by the second upgrade trigger device in a standby state, controlling the conduction of a second channel of the switching circuit and prohibiting the conduction of a first channel of the switching circuit until the second control signal is not detected, so that when the second channel of the switching circuit is conducted, the second channel of the switching circuit is utilized to realize the communication connection between the second upgrade trigger device and the CPLD, and the second upgrade trigger device upgrades the CPLD;

wherein the standby state indicates that the channel control circuit does not detect the first control signal and does not detect the second control signal.

Preferably, the first upgrade triggering device is a CPU, and the second upgrade triggering device is a BMC.

The applicant considers that in some existing white box switches, because the CPU and the BMC exist at the same time and both the CPU and the BMC can perform online upgrade of the CPLD, it can be avoided that the CPLD cannot be upgraded when the CPU or the BMC is abnormal, that is, a redundant function is achieved, however, such a design can cause that, in some occasions, if one of the CPU and the BMC performs online upgrade of the CPLD, in the process, the other performs upgrade operation, both sides are easily failed to upgrade, and in serious cases, version disorder of the CPLD and system crash can occur.

Therefore, in the scheme of the application, the channel control circuit connected with the first upgrading trigger device, the second upgrading trigger device and the switching circuit respectively and the switching circuit connected with the first upgrading trigger device and the second upgrading trigger device are arranged. When the channel control circuit detects a first control signal output by the first upgrading trigger device in a standby state, controlling the conduction of a first channel of the switching circuit and forbidding the conduction of a second channel of the switching circuit until the first control signal is not detected; when the channel control circuit detects a second control signal output by the second upgrading trigger device in a standby state, the second channel of the switching circuit is controlled to be conducted, and the first channel of the switching circuit is forbidden to be conducted until the second control signal is not detected; the standby state indicates that the channel control circuit does not detect the first control signal and also does not detect the second control signal. That is, by the channel control circuit, interlocking of the first channel and the second channel of the switching circuit is realized. When the first channel of the switching circuit is conducted, the first upgrading trigger device can be used for realizing the communication connection between the first upgrading trigger device and the CPLD, so that the first upgrading trigger device can upgrade the CPLD; correspondingly, when the second channel of the switching circuit is conducted, the second upgrading trigger device can be used for realizing the communication connection between the second upgrading trigger device and the CPLD, so that the CPLD is upgraded by the second upgrading trigger device. Therefore, it can be seen that, in the process of upgrading the CPLD by the first upgrade trigger device, the second upgrade trigger device may be prohibited from upgrading the CPLD, and in the process of upgrading the CPLD by the second upgrade trigger device, the first upgrade trigger device may be prohibited from upgrading the CPLD, so that the situations that the first upgrade trigger device and the second upgrade trigger device both communicate with the CPLD and simultaneously upgrade the CPLD online are avoided, and the problems of disordered version and system crash of the CPLD are also avoided.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of an upgrading system of a CPLD in the present invention;

fig. 2 is a schematic structural diagram of an upgrade system of a CPLD in an embodiment of the present invention;

fig. 3 is a schematic structural diagram of a middle switching circuit and N CPLD ring communication connections according to an embodiment of the present invention;

fig. 4 is a flowchart of an implementation of a CPLD upgrading method according to the present invention.

Detailed Description

The core of the invention is to provide an upgrading system of the CPLD, which can avoid the problems of disordered version and system crash of the CPLD.

In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an upgrading system of a CPLD in the present invention, where the upgrading system of the CPLD may include:

a first upgrade trigger device 10;

a second upgrade triggering device 20;

the channel control circuit 30 is respectively connected with the first upgrade trigger device 10, the second upgrade trigger device 20 and the switching circuit 40, and is configured to, when detecting a first control signal output by the first upgrade trigger device 10 in a standby state, control the conduction of the first channel of the switching circuit 40 and prohibit the conduction of the second channel of the switching circuit 40 until the first control signal is not detected; when a second control signal output by the second upgrade trigger device 20 is detected in a standby state, controlling the conduction of the second channel of the switching circuit 40 and prohibiting the conduction of the first channel of the switching circuit 40 until the second control signal is not detected; the standby state indicates that the channel control circuit 30 does not detect the first control signal and does not detect the second control signal;

the switching circuit 40 is connected to both the first upgrade triggering device 10 and the second upgrade triggering device 20, and is configured to utilize the first channel of the switching circuit 40 to implement communication connection between the first upgrade triggering device 10 and the CPLD when the first channel of the switching circuit 40 is turned on, so that the first upgrade triggering device 10 upgrades the CPLD; when the second channel of the switching circuit 40 is turned on, the second channel of the switching circuit 40 is used to implement the communication connection between the second upgrade trigger device 20 and the CPLD, so that the second upgrade trigger device 20 upgrades the CPLD.

Specifically, the CPLD described in this application is usually a CPLD in a switch, and therefore, the first upgrade triggering device 10 and the second upgrade triggering device 20 may be usually embodied as a CPU and a BMC, and hereinafter, the first upgrade triggering device 10 is taken as a CPU and the second upgrade triggering device 20 is taken as a BMC for example for explanation, and fig. 2 of this application also illustrates this embodiment.

Of course, in other occasions, when there are two devices that can upgrade the CPLD, the scheme of the present application may also be adopted to avoid the occurrence of an upgrade exception, that is, the first upgrade trigger device 10 and the second upgrade trigger device 20 may be other types of devices in other occasions.

The switching circuit 40 is connected to both the first upgrade trigger device 10 and the second upgrade trigger device 20, and the switching circuit 40 has 2 channels, which can be controlled by the channel control circuit 30. When the first channel of the switching circuit 40 is turned on, the first upgrade trigger device 10 and the CPLD may be communicatively connected by using the first channel of the switching circuit 40, and at this time, the first upgrade trigger device 10 may upgrade the CPLD.

Similarly, when the second channel of the switching circuit 40 is turned on, the second channel of the switching circuit 40 may be used to implement the communication connection between the second upgrade trigger device 20 and the CPLD, and at this time, the second upgrade trigger device 20 may upgrade the CPLD.

If one of the CPU and the BMC executes online upgrade of the CPLD, during the upgrade process, if the other performs upgrade operation, that is, if the CPU and the BMC simultaneously perform online upgrade of the CPLD, both sides are easily failed to upgrade, and if the CPLD is seriously upgraded, the version of the CPLD is disordered and the system is crashed. Therefore, the present application realizes the interlocking of the first channel and the second channel of the switching circuit 40 by the channel control circuit 30.

In the present application, the standby state indicates that the channel control circuit 30 does not detect the first control signal and does not detect the second control signal, that is, when the channel control circuit 30 is in the standby state, neither the first upgrade trigger device 10 nor the second upgrade trigger device 20 needs to communicate with the CPLD. Therefore, when the channel control circuit 30 is in the standby state, the first channel and the second channel of the switching circuit 40 are not conductive.

When the channel control circuit 30 detects the first control signal output by the first upgrade trigger device 10 in the standby state, it indicates that the first upgrade trigger device 10 needs to communicate with the CPLD at this time to upgrade the CPLD, and therefore, the channel control circuit 30 controls the conduction of the first channel of the switching circuit 40 and prohibits the conduction of the second channel of the switching circuit 40 until the first control signal is not detected. It can be seen that, after the first upgrade trigger device 10 is communicatively connected to the CPLD, as long as the first control signal exists continuously, even if the channel control circuit 30 detects the second control signal, the second channel of the switching circuit 40 is not turned on, so that the CPLD can only be upgraded online by the first upgrade trigger device 10, and the second upgrade trigger device 20 is not communicatively connected to the CPLD. Of course, after the first control signal is not detected, it indicates that the first upgrade trigger device 10 has completed upgrading the CPLD, and at this time, the channel control circuit 30 may be restored to the standby state without communicating with the CPLD. It will be further understood that, in addition to performing the upgrade of the CPLD, when the first upgrade trigger device 10 needs to communicate with the CPLD, it also needs to continuously output the first control signal to maintain the first channel of the continuous switching circuit 40 to be conductive.

Similarly, when the channel control circuit 30 detects the second control signal output by the second upgrade trigger device 20 in the standby state, it indicates that the second upgrade trigger device 20 needs to communicate with the CPLD at this time to upgrade the CPLD, and therefore, the channel control circuit 30 controls the conduction of the second channel of the switching circuit 40 and prohibits the conduction of the first channel of the switching circuit 40 until the second control signal is not detected. It can be seen that, after the second upgrade trigger device 20 is communicatively connected to the CPLD, as long as the second control signal is continuously present, even if the channel control circuit 30 detects the first control signal, the first channel of the switching circuit 40 is not turned on, so that the CPLD can only be upgraded online by the second upgrade trigger device 20, and the first upgrade trigger device 10 is not communicatively connected to the CPLD. Of course, after the second control signal is not detected, it indicates that the second upgrade trigger device 20 has completed upgrading the CPLD, and at this time, the channel control circuit 30 may be restored to the standby state without communicating with the CPLD.

The specific form of the first control signal and the second control signal can be set and adjusted according to actual needs, for example, set as a simple high-level signal or a simple low-level signal.

In one embodiment of the present invention, the first control signal and the second control signal are both PWM signals.

In this embodiment, considering that if the first control signal and the second control signal are set to be simple high-level signals or low-level signals, which are easily affected by factors such as interference, the interference can be effectively avoided by setting both the first control signal and the second control signal to be PWM signals. Moreover, when the first upgrade trigger device 10 works normally, a correct PWM signal can be output when the PWM signal needs to be output, and if the first upgrade trigger device 10 fails, the PWM signal cannot be output stably, that is, the first control signal is selected as the PWM signal, which can effectively reflect whether the first upgrade trigger device 10 fails, and when the channel control circuit 30 detects the PWM signal output by the first upgrade trigger device 10 in a standby state, it indicates that the first upgrade trigger device 10 fails, which is beneficial to ensuring the reliability of the scheme of the present application. Similarly, the second control signal is selected as a PWM signal, which can effectively reflect whether the second upgrade trigger device 20 is faulty or not.

In one embodiment of the present invention, the channel control circuit 30 may include a first controller 31, a second controller 32, a first not gate G1, a second not gate G2, a first resistor R1, and a second resistor R2:

an input end and an output end of a first channel of the first controller 31 are respectively connected with the first upgrade trigger device 10 and an input end of a first channel of the second controller 32, and an output end of the first channel of the second controller 32 is respectively connected with a first control end of the switching circuit 40 and an input end of the first not gate G1; an input end and an output end of a second channel of the first controller 31 are respectively connected with the second upgrade trigger device 20 and an input end of a second channel of the second controller 32, and an output end of the second channel of the second controller 32 is respectively connected with a second control end of the switching circuit 40 and an input end of the second not gate G2; the output end of the first not gate G1 is connected to the first end of the first resistor R1 and the second control end of the first controller 31 respectively; an output end of the second not gate G2 is respectively connected to a first end of the second resistor R2 and a first control end of the first controller 31, and a second end of the first resistor R1 and a second end of the second resistor R2 are both grounded;

when the first control terminal of the first controller 31 is in the default first level state, the first channel of the first controller 31 is turned on, and when the first control terminal of the first controller 31 is in the second level state, the first channel of the first controller 31 is turned off; when the second control terminal of the first controller 31 is in the default first level state, the second channel of the first controller 31 is turned on, and when the second control terminal of the first controller 31 is in the second level state, the second channel of the first controller 31 is turned off;

when the input terminal of the first channel of the second controller 32 receives the PWM signal, the output terminal of the first channel of the second controller 32 is in a first level state, and when the input terminal of the first channel of the second controller 32 does not receive the PWM signal, the output terminal of the first channel of the second controller 32 is in a default second level state; when the input terminal of the second channel of the second controller 32 receives the PWM signal, the output terminal of the second channel of the second controller 32 is in the first level state, and when the input terminal of the second channel of the second controller 32 does not receive the PWM signal, the output terminal of the second channel of the second controller 32 is in the default second level state.

In this embodiment, the channel control circuit 30 is implemented by the first controller 31, the second controller 32, the first not gate G1, the second not gate G2, the first resistor R1 and the second resistor R2, and has a simple structure and easy implementation.

In practical applications, the first control terminal of the first controller 31 is used as the enable terminal of the first channel of the first controller 31, and the second control terminal of the first controller 31 is used as the enable terminal of the second channel of the first controller 31, and therefore, the first level state is a low level state and the second level state is a high level state, considering that the first controller 31 can be selected as a low level enabled controller, which is described below as an example.

When the first control terminal of the first controller 31 is at a low level, the first channel of the first controller 31 is turned on, and when the second control terminal of the first controller 31 is at a low level, the second channel of the first controller 31 is turned on.

For example, the channel control circuit 30 detects the first control signal output by the first upgrade trigger device 10 in the standby state, that is, the pin a1 detects the PWM signal output by the CPU in the standby state of the first controller 31 in fig. 2, which indicates that the CPU needs to communicate with the CPLD at this time to upgrade the CPLD. At this time, the first control terminal of the first controller 31 is at the default low level, the first channel of the first controller 31 is turned on, that is, the OE1 pin of the first controller 31 is at the default low level, the first channel of the first controller 31 is turned on, and the OA1 pin of the first controller 31 outputs the PWM signal at this time because the PWM signal is input to the a1 pin. When the input terminal of the first channel of the second controller 32 receives the PWM signal, that is, the pin B1 of the second controller 32 in fig. 2 receives the PWM signal output from the pin OA1 of the first controller 31, the output terminal OB1 of the first channel of the second controller 32 is in a low state, so that the first channel of the switching circuit 40 is turned on. The low level output by the OB1 of the first channel of the second controller 32 goes high through the first not gate G1, so that the OE2 pin of the first controller 31 is high, at this time, even if the a2 pin of the first controller 31 detects the PWM signal output by the BMC, since the OE2 pin of the first controller 31 is high, the second channel of the first controller 31 is also off, that is, the OA2 pin of the first controller 31 cannot output the PWM signal to the B2 pin, so that the B2 pin of the second controller 32 does not receive the PWM signal, and therefore the OB2 of the second channel of the second controller 32 is in a default high state, so that the second channel of the switching circuit 40 is not on.

It can be seen that in the process of upgrading the CPLD by the CPU, the output OB1 of the first channel of the second controller 32 is in a low state. The output end OB2 of the second channel of the second controller 32 is in a high level state, so that the first channel of the switching circuit 40 is turned on and the second channel of the switching circuit 40 is turned off, thereby avoiding the situation that the CPU and the BMC upgrade the CPLD at the same time.

In the foregoing example, the channel control circuit 30 detects the first control signal output by the first upgrade trigger device 10 in the standby state, that is, the first controller 31 detects the PWM signal output by the CPU at the pin a1 in the standby state, and the channel control circuit 30 detects the second control signal output by the second upgrade trigger device 20 in the standby state, and in the same way, the CPU and the BMC can be prevented from upgrading the CPLD at the same time, and the description is not repeated here.

In practical applications, considering that the upgrading of the CPLD is currently performed, the CPLD is usually based on the JTAG interface, and therefore, in an embodiment of the present invention, the switching circuit 40 is connected to the JTAG interface of the first upgrade trigger device 10 and connected to the JTAG interface of the second upgrade trigger device 20. The embodiment adopted in fig. 2 of the present application is advantageous for facilitating the implementation of the present application.

Further, in an embodiment of the present invention, considering that there are usually a plurality of CPLDs that need to be upgraded, a corresponding channel control circuit 30 and switching circuit 40 may be configured for each CPLD. However, such an embodiment has a high requirement on the number of pins of the first upgrade trigger device 10 and the second upgrade trigger device 20, and therefore, in an embodiment of the present invention, the switching circuit 40 is connected in loop communication with N CPLDs to perform the upgrade of any one of the N CPLDs, where N is a positive integer greater than 1.

In this embodiment, since the switching circuit 40 is in annular communication connection with N CPLDs, even if the value of N is increased, the pin occupation of the first upgrade trigger device 10 and the second upgrade trigger device 20 is not increased, and the flexibility and the application range of the scheme of the present application are improved.

The applicant considers that in some existing white box switches, because the CPU and the BMC exist at the same time and both the CPU and the BMC can perform online upgrade of the CPLD, it can be avoided that the CPLD cannot be upgraded when the CPU or the BMC is abnormal, that is, a redundant function is achieved, however, such a design can cause that, in some occasions, if one of the CPU and the BMC performs online upgrade of the CPLD, in the process, the other performs upgrade operation, both sides are easily failed to upgrade, and in serious cases, version disorder of the CPLD and system crash can occur.

Therefore, in the solution of the present application, there are provided the channel control circuit 30 connected to the first upgrade trigger device 10, the second upgrade trigger device 20 and the switching circuit 40, respectively, and the switching circuit 40 connected to both the first upgrade trigger device 10 and the second upgrade trigger device 20. When the channel control circuit 30 detects the first control signal output by the first upgrade trigger device 10 in a standby state, the first channel of the switching circuit 40 is controlled to be conducted and the second channel of the switching circuit 40 is prohibited from being conducted until the first control signal is not detected; when the channel control circuit 30 detects the second control signal output by the second upgrade trigger device 20 in the standby state, the second channel of the switching circuit 40 is controlled to be conducted and the first channel of the switching circuit 40 is prohibited from being conducted until the second control signal is not detected; the standby state indicates that the channel control circuit 30 does not detect the first control signal and also does not detect the second control signal. That is, by the channel control circuit 30, the interlocking of the first channel and the second channel of the switching circuit 40 is realized. When the first channel of the switching circuit 40 is turned on, the first channel of the switching circuit 40 can be used to realize the communication connection between the first upgrade trigger device 10 and the CPLD, so that the first upgrade trigger device 10 upgrades the CPLD; accordingly, when the second channel of the switching circuit 40 is turned on, the second channel of the switching circuit 40 may be used to implement the communication connection between the second upgrade trigger device 20 and the CPLD, so that the second upgrade trigger device 20 upgrades the CPLD. Therefore, it can be seen that, in the process of upgrading the CPLD by the first upgrade trigger device 10, the second upgrade trigger device 20 may be prohibited from upgrading the CPLD, and in the process of upgrading the CPLD by the second upgrade trigger device 20, the first upgrade trigger device 10 may be prohibited from upgrading the CPLD, so that the situations that the first upgrade trigger device 10 and the second upgrade trigger device 20 both communicate with the CPLD and the CPLD is upgraded online at the same time do not occur, and the problems of wrong version and system crash of the CPLD can be avoided.

Corresponding to the above embodiments of the upgrading system for CPLDs, the embodiments of the present invention further provide a switch, which may include the upgrading system for CPLDs in any of the above embodiments, and the switch may be a white box switch in general.

Corresponding to the above embodiment of the CPLD upgrading system, the embodiment of the present invention further provides an upgrading method for a CPLD, which can be applied to the CPLD upgrading system in any of the above embodiments, and includes:

step S101: when the channel control circuit detects a first control signal output by the first upgrading trigger device in a standby state, the first channel of the switching circuit is controlled to be conducted, and the conduction of the second channel of the switching circuit is forbidden until the first control signal is not detected, so that when the first channel of the switching circuit is conducted, the first channel of the switching circuit is used for realizing the communication connection between the first upgrading trigger device and the CPLD, and the first upgrading trigger device is used for upgrading the CPLD;

step S102: when the channel control circuit detects a second control signal output by the second upgrading trigger device in a standby state, the second channel of the switching circuit is controlled to be conducted, and the first channel of the switching circuit is prohibited from being conducted until the second control signal is not detected, so that when the second channel of the switching circuit is conducted, the second channel of the switching circuit is used for realizing the communication connection between the second upgrading trigger device and the CPLD, and the CPLD is upgraded by the second upgrading trigger device;

the standby state indicates that the channel control circuit does not detect the first control signal and does not detect the second control signal.

In a specific embodiment of the present invention, the first upgrade triggering device is a CPU, and the second upgrade triggering device is a BMC.

In one embodiment of the present invention, the first control signal and the second control signal are both PWM signals.

In one embodiment of the present invention, the channel control circuit includes a first controller, a second controller, a first not gate, a second not gate, a first resistor, and a second resistor:

the input end and the output end of a first channel of the first controller are respectively connected with the first upgrading trigger device and the input end of a first channel of the second controller, and the output end of the first channel of the second controller is respectively connected with a first control end of the switching circuit and the input end of the first NOT gate; the input end and the output end of a second channel of the first controller are respectively connected with the second upgrading trigger device and the input end of the second channel of the second controller, and the output end of the second channel of the second controller is respectively connected with a second control end of the switching circuit and the input end of the second NOT gate; the output end of the first NOT gate is respectively connected with the first end of the first resistor and the second control end of the first controller; the output end of the second NOT gate is respectively connected with the first end of the second resistor and the first control end of the first controller, and the second end of the first resistor and the second end of the second resistor are both grounded;

when the first control end of the first controller is in a default first level state, a first channel of the first controller is switched on, and when the first control end of the first controller is in a second level state, the first channel of the first controller is switched off; when the second control end of the first controller is in a default first level state, the second channel of the first controller is switched on, and when the second control end of the first controller is in a second level state, the second channel of the first controller is switched off;

when the input end of the first channel of the second controller receives the PWM signal, the output end of the first channel of the second controller is in a first level state, and when the input end of the first channel of the second controller does not receive the PWM signal, the output end of the first channel of the second controller is in a default second level state; when the input end of the second channel of the second controller receives the PWM signal, the output end of the second channel of the second controller is in a first level state, and when the input end of the second channel of the second controller does not receive the PWM signal, the output end of the second channel of the second controller is in a default second level state.

In one embodiment of the present invention, the first level state is a low level state, and the second level state is a high level state.

In one embodiment of the present invention, the switching circuit is connected to the JTAG interface of the first upgrade trigger apparatus and to the JTAG interface of the second upgrade trigger apparatus.

In a specific embodiment of the present invention, the switching circuit is in annular communication with N CPLDs to upgrade any one of the N CPLDs, where N is a positive integer greater than 1.

It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

The principle and the implementation of the present invention are explained in the present application by using specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.