阅读说明：本技术 数字灰阶展开方法、数字驱动方法及电路、存储介质 (Digital gray scale developing method, digital driving method and circuit, storage medium ) 是由 籍亚男 于 2021-08-26 设计创作，主要内容包括：本申请涉及一种数字灰阶展开方法、数字驱动方法及电路、显示装置、存储介质。数字灰阶展开方法,包括：获取m个浮点位、n个灰阶有效位以及k个虚拟灰阶展开位,m、n为正整数,k为大于(m+n)的正整数；根据m个浮点位的取值分布,确定至少两个展开组；根据展开组,确定n个灰阶有效位在k个虚拟灰阶展开位中的位置；根据n个灰阶有效位在k个虚拟灰阶展开位中的位置,获取k个虚拟灰阶展开位的数字灰阶分布；根据k个虚拟灰阶展开位的数字灰阶分布,获取p个的模拟灰阶值对应的p个数字灰阶值,p为正整数。本申请可以用较少的比特位实现模拟灰阶的有效展开。(The application relates to a digital gray scale expansion method, a digital driving method and circuit, a display device and a storage medium. The digital gray scale expansion method comprises the following steps: acquiring m floating point positions, n gray scale effective bits and k virtual gray scale unfolding positions, wherein m and n are positive integers, and k is a positive integer larger than (m + n); determining at least two expansion groups according to the value distribution of the m floating point positions; determining the positions of the n gray scale effective bits in the k virtual gray scale unfolding positions according to the unfolding groups; acquiring digital gray scale distribution of the k virtual gray scale unfolding positions according to the positions of the n gray scale effective bits in the k virtual gray scale unfolding positions; and acquiring p digital gray scale values corresponding to the p analog gray scale values according to the digital gray scale distribution of the k virtual gray scale unfolding positions, wherein p is a positive integer. The method and the device can realize effective expansion of the analog gray scale by using fewer bits.)

1. A digital gray scale development method, comprising:

acquiring m floating point positions, n gray scale effective bits and k virtual gray scale unfolding positions, wherein m and n are positive integers, and k is a positive integer larger than (m + n);

determining at least two expansion groups according to the value distribution of the m floating point positions;

determining the positions of the n gray scale effective bits in the k virtual gray scale unfolding positions according to the unfolding groups;

acquiring digital gray scale distribution of the k virtual gray scale unfolding positions according to the positions of the n gray scale effective bits in the k virtual gray scale unfolding positions;

and acquiring p digital gray scale values corresponding to the p analog gray scale values according to the digital gray scale distribution of the k virtual gray scale unfolding positions, wherein p is a positive integer.

2. The digital gray scale expansion method of claim 1, wherein the determining at least two expansion groups according to the distribution of the values of the m floating point positions comprises:

determining 2 according to the value distribution of the m floating point positions^mAnd (4) unfolding the groups.

3. The method of claim 1, wherein said determining the positions of n gray scale significant bits in said k virtual gray scale deployment positions according to said deployment group comprises:

determining the lowest n bits of the n gray scale effective bits in the k virtual gray scale unfolding positions from the first unfolding group;

and replacing the expansion groups, so that the positions of the n gray scale effective bits in the k virtual gray scale expansion positions jump to high positions until the last expansion group, and in the last expansion group, the n gray scale effective bits are positioned at the highest n positions in the k virtual gray scale expansion positions.

4. The digital gray scale deployment method of claim 2, wherein when the number of the deployment groups is greater than two, the number of bits for jumping from the n gray scale significant bits to the higher bits in the k virtual gray scale deployment positions is sequentially reduced every time the deployment groups are replaced.

5. The method according to claim 4, wherein p-256, n-8, m-2, k-17, and the number of bits of n gray scale active bits jumping from the k virtual gray scale expansion positions to the upper bits is 4, 3, 2 in sequence each time the expansion set is replaced.

6. The method according to claim 1, wherein m is in the range of 1 to 4, n is in the range of 5 to 12, and k is in the range of 12 to 20.

7. A digital driving method, comprising:

acquiring a target simulation gray scale value;

acquiring a target digital gray scale value according to the target analog gray scale value and the corresponding relation between the analog gray scale value and the digital gray scale value acquired by the digital gray scale unfolding method of claims 1-6;

determining values of the k virtual gray scale unfolding positions according to the target digital gray scale;

obtaining values of m floating point positions and values of n gray scale effective bits according to the values of the k virtual gray scale unfolding positions;

and driving m floating-point circuits corresponding to the m floating-point bits and n gray-scale effective bit circuits corresponding to the n gray-scale effective bits according to the values of the m floating-point bits and the values of the n gray-scale effective bits.

8. A digital driver circuit, comprising:

a floating-point bit module including m floating-point bit circuits,

the gray scale effective bit module comprises n gray scale effective bit circuits;

a driving control module electrically connected to the floating-point bit module and the gray scale valid bit module, for driving the m floating-point bit circuits and the n gray scale valid bit circuits according to the digital driving method of claim 7.

9. A display device comprising the digital drive circuit of claim 8.

10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 7.

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a digital gray scale development method, a digital driving method and circuit, a display device, and a storage medium.

Background

With the development of display technology, digitally controlled PWM driving methods have emerged. The method receives an image frame and equally divides the image frame into K sub-frames, wherein each sub-frame corresponds to one bit. In an image frame, the digital gray scale value of a pixel point is a corresponding decimal value converted from a binary value formed by K bit numerical values. Specifically, in the ith subframe, according to the bit value corresponding to the subframe, the corresponding switch tube (such as CMOS) in the display backplane is driven to be turned on or turned off. When the sub-frame corresponds toAnd when the bit value is 1, driving a corresponding switch tube in the display back plate to be opened. And when the bit value corresponding to the subframe is 0, driving the corresponding switch tube in the display back plate to be closed. Wherein, i takes values from 1 to K in sequence. And the weights of the K bits corresponding to the K subframes are different. The weight corresponds to the time that the switch tube is on. The ratio of the switching tube on-time of K bits (i.e. K sub-frames) can be set to 1:2:4:2ⁱ…：2^K. Different combinations of K bit values ("0" or "1") can yield 2 in total^KDifferent pulse widths are used. The corresponding luminance value also corresponds to 2^KDifferent brightness values. The luminance value is linearly related to the digital gray scale value (binary value of K bits is converted into a decimal corresponding value).

However, in real life, the luminance value is not linearly related to the gray scale value (analog gray scale value) recognizable by human eyes, and is generally set to be a power function relationship, and is generally set to be a2.2 th power function relationship. Namely: the brightness value is the maximum brightness value x (simulation gray level value/maximum gray level value) ^ 2.2.

Under this setting, the luminance value of the first gray scale of the 256 analog gray scales is only 0.0005% of the maximum luminance value. At this time, if the analog gray scale values of 256 analog grays are expanded by using the digital gray scale values described above (i.e., the digital gray scale values corresponding to the analog gray scale values are selected from the digital gray scale values described above), more than 16 bits are required to completely expand the gray scale values. However, at this time, 16 sub-frames of corresponding circuits are required to be matched with the sub-frames, thereby increasing the complexity of the circuit structure.

Disclosure of Invention

In view of the above, it is necessary to provide an effective expansion of gamma2.2 gray scale with less bits.

A digital gray scale unfolding method comprises the following steps:

acquiring m floating point positions, n gray scale effective bits and k virtual gray scale unfolding positions, wherein m and n are positive integers, and k is a positive integer larger than (m + n);

determining at least two expansion groups according to the value distribution of the m floating point positions;

determining the positions of the n gray scale effective bits in the k virtual gray scale unfolding positions according to the unfolding groups;

acquiring digital gray scale distribution of the k virtual gray scale unfolding positions according to the positions of the n gray scale effective bits in the k virtual gray scale unfolding positions;

and acquiring p digital gray scale values corresponding to the p analog gray scale values according to the digital gray scale distribution of the k virtual gray scale unfolding positions, wherein p is a positive integer.

In one embodiment, the determining at least two expansion groups according to the distribution of the m floating point positions includes:

determining 2 according to the value distribution of the m floating point positions^mAnd (4) unfolding the groups.

In one embodiment, the determining the positions of the n gray scale valid bits in the k virtual gray scale deployment positions according to the deployment group comprises:

determining the lowest n bits of the n gray scale effective bits in the k virtual gray scale unfolding positions from the first unfolding group;

and replacing the expansion groups, so that the positions of the n gray scale effective bits in the k virtual gray scale expansion positions jump to high positions until the last expansion group, and in the last expansion group, the n gray scale effective bits are positioned at the highest n positions in the k virtual gray scale expansion positions.

In one embodiment, when the number of the expanded groups is greater than two, the number of bits for jumping from the n gray-scale effective bits to the upper bits in the k virtual gray-scale expanded bits is sequentially reduced each time the expanded groups are replaced.

In one embodiment, p is 256, n is 8, m is 2, and k is 17, and the number of bits of the n gray-scale active bits jumping to the upper bit in the k virtual gray-scale expanded positions is 4, 3, and 2 in sequence each time the expanded group is replaced.

In one embodiment, m ranges from 1 to 4, n ranges from 5 to 12, and k ranges from 12 to 20.

A digital driving method, comprising:

acquiring a target simulation gray scale value;

acquiring a target digital gray scale value according to the target analog gray scale value and the corresponding relation between the analog gray scale value and the digital gray scale value acquired by the digital gray scale expansion method;

determining values of the k virtual gray scale unfolding positions according to the target digital gray scale;

obtaining values of m floating point positions and values of n gray scale effective bits according to the values of the k virtual gray scale unfolding positions;

and driving m floating-point circuits corresponding to the m floating-point bits and n gray-scale effective bit circuits corresponding to the n gray-scale effective bits according to the values of the m floating-point bits and the values of the n gray-scale effective bits.

A digital drive circuit comprising:

a floating-point bit module including m floating-point bit circuits,

the gray scale effective bit module comprises n gray scale effective bit circuits;

a driving control module electrically connected to the floating-point bit module and the gray scale valid bit module, for driving the m floating-point bit circuits and the n gray scale valid bit circuits according to the digital driving method of claim 7.

A display device comprises the digital driving circuit.

A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method as claimed above.

According to the digital gray scale expansion method, the digital driving method and circuit, the display device and the storage medium, the m floating point positions are arranged while the n gray scale effective bits are arranged, so that at least two expansion groups are obtained through the m floating point positions, and the same n gray scale effective bits can form at least twice the number of digital gray scale values, so that the analog gray scale can be effectively expanded.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a diagram illustrating a case where 256 analog grayscales are expanded by 10 bits (10bit) to 17 bits (17bit) in the related art;

FIG. 2 is a flowchart illustrating a digital gray scale expanding method according to an embodiment;

FIG. 3 is a schematic diagram of the positions of n gray-scale valid bits in the k virtual gray-scale expanded bits in different expanded groups according to one embodiment;

FIG. 4 is a diagram illustrating an embodiment of a digital gray scale distribution with k virtual gray scale open positions;

FIG. 5 is a flow chart illustrating a digital driving method according to an embodiment;

fig. 6 is a block diagram of a digital driving circuit in one embodiment.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or be connected to the other element through intervening elements. Further, "connection" in the following embodiments is understood to mean "electrical connection", "communication connection", or the like, if there is a transfer of electrical signals or data between the connected objects.

As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.

As described in the background, more bits are required in the related art to achieve effective spreading of the Gamma2.2 gray level.

Specifically, referring to fig. 1, more than 16 bits are required to correspondingly expand the analog gray scale values of 256 analog grays and the digital gray scale values one by one in the related art. If bits of 16 bits or less are used, it is necessary to correspond a plurality of analog gray scale values to one digital gray scale value in the low gray scale stage, thereby reducing the gray scale accuracy.

For the above reasons, the present invention provides a digital gray scale development method, a digital driving method and circuit, a display device, and a storage medium.

In one embodiment, referring to fig. 2, a digital gray scale expanding method is provided, which includes:

step S100, m floating point positions, n gray scale effective bits and k virtual gray scale unfolding positions are obtained, wherein m and n are positive integers, and k is a positive integer larger than (m + n).

The m floating-point bits and the n gray-scale effective bits are bit bits. Wherein, n gray scale effective bits correspond to n subframes, and each gray scale effective bit corresponds to a gray scale effective bit circuit. Each sub-frame is provided with a gray scale effective bit circuit.

Meanwhile, in the m floating point positions, each floating point corresponds to one floating point position circuit. Each sub-frame shares m floating-point circuits.

The k virtual gray scale expansion positions are virtual k bits and are used for expanding the analog gray scale.

For example, the total number of the floating-point bits and the gray-scale valid bits may be 10, that is, the number of the total bits may be 10, and at this time, 2 floating-point bits and 8 gray-scale valid bits may be used, or 1 floating-point bit and 9 gray-scale valid bits may be used, or 3 floating-point bits and 7 gray-scale valid bits may be used, and so on. Of course, the total number of the floating-point bits and the gray-level valid bits can be (1+10) or (2+12), etc.

And S200, determining at least two expansion groups according to the value distribution of the m floating point positions.

Of the m floating point positions, the value of each floating point position is a bit numerical value (0 or 1). The value distribution of the m floating point positions has 2^mAnd (4) composing values. For example, when m is 1, the distribution of values of 1 floating point position is two groups of values, i.e., 0 and 1. When m is 2, the value distribution of 2 floating point positions is four groups of values (1, 1), (1, 0), (0, 1), (0, 0), and the like.

The step is carried out at 2 of m floating point positions^mIn the group values, at least two groups of values are selected as expansion groups.

Step S300, according to the expansion group, the positions of the n gray scale effective bits in the k virtual gray scale expansion positions are determined.

Referring to FIG. 3, the n gray level valid bits are located at different positions in the k virtual gray level expanded bits in different expanded groups.

It is understood that the positions of the n gray-scale effective bits in the k virtual gray-scale expanded bits in fig. 2 are indicated by "0", and the actual gray-scale effective bits may be "0" or "1". The virtual gray scale development bit without the gray scale effective bit is defaulted to be 0.

And step S400, acquiring digital gray scale distribution of the k virtual gray scale unfolding positions according to the positions of the n gray scale effective bits in the k virtual gray scale unfolding positions.

After the positions of the n gray-scale valid bits in the k virtual gray-scale spread positions are determined, referring to fig. 4, values ("0" or "1", values of the n gray-scale valid bits are framed by a dashed line frame in fig. 4) can be taken from the n gray-scale valid bits, and a value of 0 is taken from the virtual gray-scale spread positions without the gray-scale valid bits, so that digital gray-scale distribution of the k virtual gray-scale spread positions can be formed. The digital gray scale distribution is a distribution of digital gray scale values. The digital gray scale value is a corresponding decimal value converted from a binary value formed by the bit values of the k virtual gray scale expansion positions (virtual k bits).

At this time, at least twice the number of digital gray scale values can be formed using the same n gray scale valid bits, thereby facilitating efficient spreading of the analog gray scale.

Step S500, acquiring p digital gray scale values corresponding to the p analog gray scale values according to the digital gray scale distribution of the k virtual gray scale unfolding positions, wherein p is a positive integer.

At this time, for the ith analog gray scale value, among the digital gray scale values of the k virtual gray scale open positions, a digital gray scale value close to the relative brightness percentage (relative brightness%) thereof is selected and corresponds to the ith analog gray scale value. And i is taken from 1 to p, so that p digital gray-scale values corresponding to the p analog gray-scale values are obtained.

It is understood that the relative brightness percentage, i.e., the percentage of the brightness value corresponding to the gray scale value to the maximum brightness value. For analog gray scale, the percentage of the luminance value corresponding to the gray scale value to the maximum luminance value is 2.2 powers of the percentage of the gray scale value to the maximum gray scale value. For the digital gray scale, the percentage of the brightness value corresponding to the gray scale value in the maximum brightness value is the percentage of the gray scale value in the maximum gray scale value.

In this embodiment, m floating point positions are further provided while n gray scale valid bits are set, so that at least two expansion groups are obtained through the m floating point positions, and further, the same n gray scale valid bits can form at least twice the number of digital gray scale values, thereby facilitating effective expansion of analog gray scales.

In one embodiment, step S200 includes:

determining 2 according to the value distribution of m floating point positions^mAnd (4) unfolding the groups.

At this time, 2 of m floating points are positioned^mThe group values are all used as expansion groups, and then the real state can be realized by fewer floating pointsMore groups of floating point positions are taken, so that the virtual gray scale unfolding position with more digits can be realized under the same precision. In this case, m floating-point circuits corresponding to m floating-point bits can be effectively used.

Of course, in other embodiments, step S200 may be performed on 2 of m floating-point bits^mAnd selecting part of the composition values as an expansion group. For example, 4 of the 8 sets of values of 3 floating point positions may be used as the expansion set. This is not limited by the present application.

In one embodiment, step S300 includes:

in step S310, from the first expansion group, the lowest n bits of the n gray-scale effective bits located in the k virtual gray-scale expansion positions are determined.

At this time, the digital gray scale values of the low gray stage forming the k virtual gray scale expanded positions may be corresponded.

Step S320, replacing the expansion groups, so that the n gray-scale effective bits jump to the higher bits in the k virtual gray-scale expansion positions until the last expansion group, and in the last expansion group, the n gray-scale effective bits are located at the highest n bits in the k virtual gray-scale expansion positions.

At this time, the digital gray scale values of the gray stages of the k virtual gray scale deployment positions can be formed from low to high.

In this embodiment, each time the expansion group is replaced, the positions of the n gray scale effective bits in the k virtual gray scale expansion positions jump gradually to the higher position, so that the digital gray scale values of the k virtual gray scale expansion positions are more regular, and the analog gray scale is conveniently expanded.

In one embodiment, when the number of the expansion groups is more than two, the number of bits of the n gray-scale effective bits jumping from the k virtual gray-scale expansion positions to the upper bit is reduced in sequence every time the expansion groups are replaced.

At the moment, the jumping digit adapts to the gradient of a Gamma2.2 curve and shows the trend of low first and high second, so that the analog gray scale can be better expanded, and the expansion accuracy is improved.

As an example, p may take 256. At this time, 256 analog gray scales are expanded. At this time, it can be spread out with 10 bits of 2 floating-point bits (i.e., m 2) and 8 gray-scale active bits (i.e., n 8). Also, 17 virtual gray scale deployment positions may be employed.

At this time, referring to fig. 3 and 4, 4 expansion groups can be determined according to 2 floating-point bits. The 2 floating point bit values are four groups of values (0, 0), (0, 1), (1, 0) and (1, 1) which can be respectively used as a first expansion group, a second expansion group, a third expansion group and a fourth expansion group, wherein the first expansion group is positioned at 8 lowest bits of the virtual gray scale expansion position, and the fourth expansion group is positioned at 8 highest bits of the virtual gray scale expansion position.

At this time, it may be set that the second expanded group jumps to the higher bit by 4 bits in the expanded position of 17 virtual grayscales as compared with the first expanded group, the third expanded group jumps to the higher bit by 3 bits in the expanded position of 17 virtual grayscales as compared with the second expanded group, and the fourth expanded group jumps to the higher bit by 2 bits in the expanded position of 17 virtual grayscales as compared with the third expanded group. That is, the bit number of the n gray-scale effective bits jumping to the high bit in the k virtual gray-scale expanded bits is 4, 3, 2 in order each time the expanded group is replaced.

Of course, in other embodiments, other jumping manners may be specifically adopted, for example, in the above example, the number of bits of the n gray-scale effective bits jumping to the upper bits in the k virtual gray-scale expanded bits is 3, and 2 in sequence every time the expanded group is replaced, so that k may take a value of 16.

In the embodiment of the present application, in order to effectively expand 256 analog gray scales, a value range of m may be selected to be 1 to 4, a value range of n may be selected to be 5 to 12, and a value range of k may be selected to be 12 to 20.

In an embodiment, referring to fig. 5, a digital driving method is further provided, including:

in step S10, a target analog gray scale is obtained.

The target analog gray scale value is an analog gray scale of an image frame to be displayed.

Step S20, obtaining a target digital gray scale value according to the target analog gray scale and the corresponding relationship between the analog gray scale value and the digital gray scale value obtained by the digital gray scale expansion method.

The digital gray scale expanding method obtains p digital gray scale values corresponding to the p analog gray scale values, namely, the corresponding relation between the analog gray scale values and the digital gray scale values can be obtained.

The target digital gray scale value is the decimal digital gray scale value of the unfolded positions of the k virtual gray scales adopted.

And step S30, determining the values of the k virtual gray scale unfolding positions according to the target digital gray scale value.

The values of the k virtual gray scale unfolding positions can be determined through decimal and binary conversion.

And step S40, obtaining values of m floating point positions and values of n gray scale effective bits according to the values of the k virtual gray scale unfolding positions.

Specifically, the expansion group where the k virtual gray scales are located can be determined according to the values of the expansion positions of the k virtual gray scales. And then obtaining values of m floating-point bits and values of n gray-scale valid bits according to the expansion group.

In step S50, according to the values of the m floating-point bits and the values of the n gray-scale significant bits, m floating-point bit circuits corresponding to the m floating-point bits and n gray-scale significant bit circuits corresponding to the n gray-scale significant bits are driven.

Specifically, each floating point corresponds to one floating point circuit, and the switching tube of the floating point circuit is correspondingly turned on or off according to the value of the floating point. Each gray scale effective bit corresponds to a gray scale effective bit circuit, and the switch tube of the gray scale effective bit circuit is correspondingly turned on or off according to the value of the gray scale effective bit. When the switch tube of the gray scale effective bit circuit is opened, the corresponding opening time of the k virtual gray scale unfolding positions used by the switch tube of each floating point bit circuit can be determined according to the opening and closing conditions of the switch tube of each floating point bit circuit.

In this embodiment, the gray scale expansion of the k virtual gray scale expansion positions can be realized by the m floating point bit circuits and the n gray scale effective bit circuits, so that the analog gray scale is effectively expanded.

It should be understood that although the steps in the flowcharts of fig. 2 and 5 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 2 and 5 may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed in turn or alternately with other steps or at least some of the other steps or stages

In one embodiment, referring to fig. 6, a digital driving circuit is further provided, which includes: a floating-point bit module 100, a gray-scale valid bit module 200, and a driving control module 300.

The floating-point bit module 100 includes m floating-point bit circuits. The gray scale valid bit module 200 includes n gray scale valid bit circuits. The driving control module 300 is electrically connected to the floating-point bit module 100 and the gray scale valid bit module 200, and is used for driving the m floating-point bit circuits and the n gray scale valid bit circuits by the digital driving method.

In one embodiment, a display device is also provided, which includes the above digital driving circuit. The display device may be an active matrix micro LED display device or the like.

For specific limitations of the display device and the digital driving circuit, reference may be made to the above limitations of the method, which are not described herein again. All or part of the modules of the display device and the digital driving circuit can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules. It should be noted that, in the embodiment of the present application, the division of the module is schematic, and is only one logic function division, and there may be another division manner in actual implementation.

In an embodiment, a computer-readable storage medium is also provided, on which a computer program is stored, which computer program, when being executed by a processor, realizes the steps of the method of any of the above.

It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include at least one of non-volatile and volatile memory. Non-volatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical storage, or the like. Volatile Memory can include Random Access Memory (RAM) or external cache Memory. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), among others.

In the description herein, references to the description of "one embodiment," "another embodiment," or the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.

The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.