Pseudo product code encoding method and device facing next generation Ethernet

文档序号：1965784 发布日期：2021-12-14 浏览：11次中文

阅读说明：本技术 一种面向下一代以太网的伪乘积码编码方法及装置 (Pseudo product code encoding method and device facing next generation Ethernet ) 是由崔航轩于 2021-11-16 设计创作，主要内容包括：本申请提供一种面向下一代以太网的伪乘积码编码方法及装置,方法包括确定码字矩阵行方向的子码和列方向的子码；根据行方向使用的KP4码子码数目确定目标次数；将KP4码编码后的码字折叠目标次数后置于码字矩阵每行对应位置；确定目标码字矩阵列方向BCH码的信息比特数目以及所在的伽罗华域；确定目标码字矩阵列方向BCH码纠错能力；对目标码字矩阵列方向进行BCH编码；判断伪乘积码矩阵的性能是否满足误码率的要求；若否,重新选择目标次数,对码字矩阵行方向的KP4码子码进行折叠；若所有折叠次数都不满足,则增加行方向KP4码子码数目。可在硬判决译码下满足下一代以太网的时延和性能要求。(The application provides a pseudo product code coding method and a device facing to a next generation Ethernet, wherein the method comprises the steps of determining subcodes in the row direction and subcodes in the column direction of a code matrix; determining the target times according to the number of KP4 code subcodes used in the row direction; placing the code word after KP4 code coding at the corresponding position of each row of the code word matrix after folding the target times; determining the number of information bits of a BCH code in the direction of a target code word matrix array and the located Galois field; determining the error correction capability of a BCH code in the direction of a target code word matrix; performing BCH coding on the direction of the target code word matrix array; judging whether the performance of the pseudo product code matrix meets the requirement of the error rate or not; if not, reselecting the target times, and folding KP4 code subcodes in the row direction of the code word matrix; if all folding times are not satisfied, increasing the number of subcodes of the column direction KP 4. The delay and performance requirements of the next generation Ethernet can be met under the hard decision decoding.)

1. A pseudo product code encoding method facing next generation Ethernet is characterized by comprising the following steps:

determining a subcode in the row direction and a subcode in the column direction of the code word matrix; the subcodes in the row direction adopt KP4 codes, and the subcodes in the column direction adopt shortened BCH codes;

selecting the number of KP4 code subcodes used in row direction according to the code length requirementm；

Selecting the energy quiltmNumber of integer divisionpAs a target number of times;

folding the code word coded by the KP4 code in the row direction for the target times, and then placing the code word at the corresponding position of each row of the code word matrix to obtain a target code word matrix;

determining the number of information bits of the BCH code in the target code word matrix direction and the located Galois field according to the target code word matrix;

determining the error correction capability of the BCH code in the direction of the target code word matrix array according to the next generation Ethernet coding overhead;

performing BCH encoding on the array direction of the target code word matrix to obtain a pseudo product code matrix after encoding is completed;

judging whether the performance of the pseudo product code matrix meets the condition that the output error rate is 1e-15 under the condition that the input error rate is 2 e-3;

if not, reselecting the target times, and folding the code subcodes of the code word matrix in the column direction KP 4; if all folding times are not satisfied, increasing the number of subcodes of the column direction KP 4.

2. The method according to claim 1, wherein the number of KP4 code subcodes used in the row direction is selected according to the code length requirementmThe method comprises the following steps:

the number of KP4 code subcodes used in the row direction is selected according to the following formula:

；

wherein the content of the first and second substances,N ₁=544, codeword length of row subcode.

3. The method of claim 1, wherein the determining the target codeword matrix direction BCH code error correction capability according to the next generation ethernet coding overhead comprises:

determining the error correction capability of the BCH code in the direction of the target code word matrix according to the following formula:

；

wherein the content of the first and second substances,OHfor coding overhead, i.e.K/（N-K) It is required to be 12.06% or less, whereinKIs the number of information bits,Nis the total length of the codeword; having column direction KP4 codesOH ₁，R ₁In the known manner, it is known that,OH ₁=30/514,R ₁=514/544；q2 andt2 are the Galois field GF (2) in which the column direction subcodes are located^q2) Parameters and error correction capability;n,mthe number of column subcodes and row subcodes contained in a pseudo-random code respectively;N ₁,K ₁respectively the code word length and the information bit number of the line subcode;N ₂,K ₂respectively the code word length and the information bit number of the column subcodes;OH ₁andOH ₂coding overhead of row subcodes and column subcodes respectively;pthe number of folds;R ₁is the code rate of the row subcode.

4. The method of claim 1, wherein the code matrix has 7 KP4 codes in row direction, each KP4 code is folded 68 times, 80 BCH (503,476, t =3) codes in column direction, total code length 40240 and coding overhead of 11.84%.

5. The method of claim 1, wherein the code matrix comprises 10 KP4 codes in row direction, each KP4 code is folded 68 times, and 80 BCH (720,680, t =4) codes in column direction, the code length is 57600, and the coding overhead is 12.06%.

6. The method of claim 1, wherein the code matrix has 13 KP4 codes in row direction, each KP4 code is folded 68 times, and 80 BCH (934,884, t =5) codes in column direction, the total code length of the code word is 74720, and the coding overhead is 11.82%.

7. An apparatus for encoding a pseudo product code for next generation ethernet, comprising:

the first determining module is used for determining the subcodes in the row direction and the subcodes in the column direction of the code word matrix; the subcodes in the row direction adopt KP4 codes, and the subcodes in the column direction adopt shortened BCH codes;

a first selection module for selecting KP4 code used in row direction according to code length requirementNumber of subcodesm；

A second selection module for selecting the quiltmNumber of integer divisionpAs a target number of times;

the folding module is used for folding the code words coded by the KP4 codes in the row direction for the target times and then placing the code words at the corresponding position of each row of the code word matrix to obtain a target code word matrix;

the second determining module is used for determining the number of information bits of the BCH code in the direction of the target code word matrix array and the located Galois field according to the target code word matrix;

a third determining module, configured to determine, according to a next-generation ethernet coding overhead, a BCH code error correction capability in the target codeword matrix direction;

the coding module is used for carrying out BCH coding on the target code word matrix direction to obtain a pseudo product code matrix after the coding is finished;

the judging module is used for judging whether the performance of the pseudo product code matrix meets the condition that the output error rate is 1e-15 under the condition that the input error rate is 2 e-3;

8. The apparatus of claim 7, wherein the first selection module comprises:

the selection unit is used for selecting the number of KP4 code subcodes used in the row direction according to the following formula:

；

wherein the content of the first and second substances,N ₁=544, codeword length of row subcode.

9. The apparatus of claim 7, wherein the third determining module comprises:

a determining unit, configured to determine the error correction capability of the BCH code in the target codeword matrix direction according to the following formula:

；

Technical Field

The present invention relates to the field of communication coding technologies, and in particular, to a method and an apparatus for encoding a pseudo product code for next generation ethernet.

Background

Ethernet is a widely used technology, and the vast majority of local area networks use the ethernet standard. And in recent years, with the increase of ethernet transmission rate and transmission distance, more and more wide area networks have come to adopt the ethernet standard. High-speed and long-distance information transmission puts higher requirements on a physical channel, but the error rate of Ethernet transmission is improved due to noise, dispersion, attenuation and the like.

In order to reduce the error rate of ethernet transmission, product code is to be adopted as the FEC coding scheme of the next generation ethernet (800 Gbase). The structure of the product code shown in fig. 1 is such that the code matrix is in two dimensions. When coding, each row and each column of the code word matrix are coded into a subcode. The existing coding scheme for high-speed optical communication using product codes adopts RS codes in the row direction and BCH or Hamming codes in the column direction. The code length, information bit number and code rate of the row-column direction subcode are respectively expressed as (N ₁，K ₁，R ₁），（N ₂，K ₂，R ₂) The coding overhead (number of parity bits/number of information bits) of the product code is thenCode length of. WhereinnAs the number of column subcodes,mis the number of the row subcodes,N ₁,K ₁respectively representing the codeword length and the information bit number of the row subcode,N ₂,K ₂respectively representing the codeword length and the number of information bits of the column subcode,OH ₁andOH ₂the coding overhead for the row subcodes and column subcodes respectively,R ₁andR ₂respectively representing the code rates of the row subcodes and the column subcodes.

It can be seen that the code length of the product code is the product of the row and column subcodes. When the product code is selected as the coding scheme, if the BCH code is adopted in the column direction, the code length of the whole codeword is very long when the decoding performance requirement is met, so that the processing delay of a receiving end is too long, and the low delay requirement of the ethernet system cannot be met. The receiving end processing delay comprises the time for receiving the code word and the decoding time. In the ethernet system, the number of bits that can be received per cycle is fixed, and the longer the code length, the more the number of cycles required to receive a codeword, and the longer the reception delay. In the decoder, under the same parallelism, the longer the code word is, the more the number of cycles executed by the module is, and the decoding delay is also increased. If the column direction adopts the Hamming code, when the receiving end adopts the hard decision decoding, because the error correction capability t =1 of the Hamming code, under the limited coding overhead, the error correction capability of the cascade scheme is limited, and the decoding performance can not meet the performance requirement in the high-speed optical communication; when the receiving end adopts soft decision decoding, the power consumption required by the equalizer to generate soft messages is too large, and the power consumption requirement in high-speed optical communication cannot be met. Therefore, the above solutions all have certain technical disadvantages when applied to the next generation ethernet.

Disclosure of Invention

The application provides a pseudo product code coding method and device facing to next generation Ethernet, which can solve the problems of prolonged processing time, substandard performance and overhigh power consumption when the product code is applied to the next generation Ethernet.

In a first aspect, the present application provides a pseudo product code encoding method for next generation ethernet, including:

selecting the number of KP4 code subcodes used in row direction according to the code length requirementm；

Selecting the energy quiltmNumber of integer divisionpAs a target number of folds;

determining the number of information bits of the BCH code in the target code word matrix direction and the located Galois field according to the target code word matrix;

determining the error correction capability of the BCH code in the direction of the target code word matrix array according to the next generation Ethernet coding overhead;

performing BCH encoding on the array direction of the target code word matrix to obtain a pseudo product code matrix after encoding is completed;

judging whether the performance of the pseudo-random code matrix meets the requirement that the output error rate is 1e-15 under the condition that the input error rate is 2 e-3;

if not, reselecting the times of folding targets, and folding the code subcodes of KP4 in the row direction of the code matrix; if all folding times are not satisfied, increasing the number of subcodes of the column direction KP 4.

Optionally, the number of KP4 code sub-codes used in the row direction is selected according to the code length requirementmThe method comprises the following steps:

the number of KP4 code subcodes used in the row direction is selected according to the following formula:

；

wherein the content of the first and second substances,N ₁=544, codeword length of row subcode.

Optionally, determining the error correction capability of the BCH code in the target codeword matrix direction according to the next generation ethernet coding overhead includes:

determining the error correction capability of the BCH code in the direction of the target code word matrix according to the following formula:

；

Optionally, the code word matrix has 7 KP4 codes in the row direction, each KP4 code is folded 68 times, 80 BCH (503,476, t =3) codes in the column direction, the total code length is 40240, and the coding overhead is 11.84%.

Optionally, the code word matrix has 10 KP4 codes in the row direction, each KP4 code is folded 68 times, 80 BCH (720,680, t =4) codes in the column direction, the total code length of the code word is 57600, and the coding overhead is 12.06%.

Optionally, the code word matrix has 13 KP4 codes in the row direction, each KP4 code is folded 68 times, 80 BCH (934,884, t =5) codes in the column direction, the total code length of the code word is 74720, and the coding overhead is 11.82%.

In a second aspect, the present application provides an ethernet-oriented pseudo product code encoding apparatus, including:

a first selection module for selecting the number of KP4 code subcodes used in the row direction according to the code length requirementm；

A second selection module for selecting the quiltmNumber of integer divisionpAs a target number of folds;

a third determining module, configured to determine, according to a next-generation ethernet coding overhead, a BCH code error correction capability in the target codeword matrix direction;

the coding module is used for carrying out BCH coding on the target code word matrix direction to obtain a pseudo product code matrix after the coding is finished;

the judging module is used for judging whether the performance of the pseudo-random code matrix meets the condition that the output error rate is 1e-15 under the condition that the input error rate is 2 e-3;

Optionally, the first selecting module includes:

the selection unit is used for selecting the number of KP4 code subcodes used in the row direction according to the following formula:

；

wherein the content of the first and second substances,N ₁=544, codeword length of row subcode.

Optionally, the third determining module includes:

a determining unit, configured to determine the error correction capability of the BCH code in the target codeword matrix direction according to the following formula:

；

wherein the content of the first and second substances,OHfor coding overhead, i.e.K/（N-K) It is required to be 12.06% or less, whereinKIs the number of information bits,Nis the total length of the codeword; having column direction KP4 codesOH ₁，R ₁In the known manner, it is known that,OH ₁=30/514,R ₁=514/544；q2 andt2 are the Galois field GF (2) in which the column direction subcodes are located^q2) Parameters and error correction capability;n,mthe number of column subcodes and row subcodes contained in a pseudo-random code respectively;N ₁,K ₁respectively the code word length and the information bit number of the line subcode;N ₂,K ₂respectively the code word length and the information bit number of the column subcodes;OH ₁andOH ₂respectively row subcodes and column subcodesCoding overhead;pthe number of folds;R ₁is the code rate of the row subcode.

The application provides a pseudo product code coding method and a device facing to a next generation Ethernet, wherein the method comprises the steps of determining a subcode in the row direction and a subcode in the column direction of a code word matrix; the subcodes in the row direction adopt KP4 codes, and the subcodes in the column direction adopt shortened BCH codes; selecting the number of KP4 code subcodes used in row direction according to the code length requirementm(ii) a Selecting the energy quiltmNumber of integer divisionpAs a target number of folds; folding the code word coded by the KP4 code in the row direction for the target times, and then placing the code word at the corresponding position of each row of the code word matrix to obtain a target code word matrix; determining the number of information bits of the BCH code in the target code word matrix direction and the located Galois field according to the target code word matrix; determining the error correction capability of the BCH code in the direction of the target code word matrix array according to the next generation Ethernet coding overhead; performing BCH encoding on the array direction of the target code word matrix to obtain a pseudo product code matrix after encoding is completed; judging whether the performance of the pseudo-random code matrix meets the requirement that the output error rate is 1e-15 under the condition that the input error rate is 2 e-3; if not, reselecting the times of folding targets, and folding the code subcodes of KP4 in the row direction of the code matrix; if all folding times are not satisfied, increasing the number of subcodes of the column direction KP 4. By adopting the scheme, the problems of prolonged processing time, substandard performance and overhigh power consumption of the product code applied to the next generation Ethernet are solved.

Drawings

In order to more clearly explain the technical solution of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious to those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a diagram illustrating a conventional product code;

FIG. 2 is a coding block diagram of 4 × 200G/lane in an 800GBase Ethernet;

fig. 3 is a schematic flowchart of a pseudo product code encoding method for next generation ethernet according to an embodiment of the present disclosure;

FIG. 4 is a block diagram of a pseudo product code according to an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of a pseudo product code encoding for a next generation Ethernet encoding specification design according to an embodiment of the present application;

FIG. 6 is a performance diagram of a coding scheme provided in part by the embodiments of the present application;

fig. 7 is a schematic structural diagram of a pseudo product code encoding apparatus for next generation ethernet according to an embodiment of the present disclosure.

Detailed Description

The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

When designing a GEL coding scheme for 800GBase high-speed optical communication, first, technical indexes of a coding scheme in a next-generation ethernet network are analyzed. FIG. 2 shows a block diagram of 4X 200G/lane coding in 800 GBase. To achieve a throughput of 800Gbps, the throughput per lane port is 200 Gbps. Each time the four lane ports transmit 66 bits, 4 × 66 bits are first transcoded into 257 bits. Thereafter, the information bits are encoded in accordance with KP4 (RS (544, 514, t = 15)) codewords defined in the ieee802.3bs standard. The FEC encoder part is an 800GBase code word encoder used for improving the performance. And after the whole coding is finished, the 4 lane ports output 72 bits at a time. At present, there are two main FEC coding schemes for a single channel 200G, and the first option does not use KP4 and directly adopts a new FEC with larger coding overhead for replacement. The second is a concatenation scheme, where the KP4 code is retained as an outer codeword and then combined with a new inner codeword. The pseudo product code coding adopted by the application belongs to the second scheme, and the cascading scheme does not need to decode KP4 to recover information bits, so that the method has advantages in delay and power consumption schemes.

In FIG. 2The code rate at the encoding end is represented as R, and the requirement is met when a single channel is 200G. The coding overhead for the overall codeword can thus be calculated to be about 12.06%. Furthermore, to achieve the sensitivity requirements of a 200G PAM receiver, the coding scheme requires that a threshold performance of 2e-3 be achieved, i.e., the Net Coding Gain (NCG) is about 8.35 dB. Considering that the requirement of 800GBase optical communication for low delay is extremely high, the overall decoding delay can be preferably controlled to be about 50ns, so for the second coding scheme, the code length needs to be controlled to be about 40000 bits. In summary, to meet the requirement of 800GBase high-speed optical communication, the coding scheme needs to meet the requirements that the coding overhead is not more than 12.06%, the code length is within 40000bits, and the Net Coding Gain (NCG) is not lower than 8.35 dB.

According to the encoding technical indexes obtained by the analysis, the embodiment of the application provides a pseudo product code encoding method facing to the next generation Ethernet. As shown in fig. 3, the method includes:

step S101, determining a subcode in a row direction and a subcode in a column direction of a code word matrix; the sub-codes in the row direction adopt KP4 codes, and the sub-codes in the column direction adopt shortened BCH codes.

Step S102, selecting the number of KP4 code subcodes used in the row direction according to the code length requirementm。

In this step, the number of KP4 code subcodes used in the row direction is selected according to the following formula:

；

wherein the content of the first and second substances,N ₁=544, codeword length of row subcode.

Step S103, selecting the energy quiltmNumber of integer divisionpAs the target folding times.

And step S104, folding the code word coded by the KP4 code in the row direction for the target times, and then placing the code word at the corresponding position of each row of the code word matrix to obtain the target code word matrix.

As shown in fig. 4, in this step, the target number of times of folding the subcodes in the row direction of the codeword matrix is divided into equal parts of the target number of times, where the length of each codeword matrix is the ratio of the code length of the codeword matrix to the target number of times, and the codeword matrix corresponding to the length of each codeword matrix is placed in the row direction to obtain the target codeword matrix.

And step S105, determining the information bit number of the BCH code in the direction of the target code word matrix and the located Galois field according to the target code word matrix. The information bit number of the BCH code in the direction of the target code word matrix is as follows.

And step S106, determining the error correction capability of the BCH code in the direction of the target code word matrix array according to the next generation Ethernet coding overhead.

In this step, use is made ofDetermining the error correction capability of the BCH code in the direction of the target code word matrixt2. WhereinOHIt is required to be 12.06% or less. Having column direction KP4 codesOH ₁，R ₁In the known manner, it is known that,OH ₁=30/514,R ₁=514/544,。q2 is the Galois field GF (2) in which the column-wise subcode is located^q2) And (4) parameters.OHFor coding overhead, i.e.K/（N-K) WhereinKIs the number of information bits,Nis the total length of the codeword;n,mthe number of column subcodes and row subcodes contained in a pseudo-random code respectively;N ₁,K ₁respectively the code word length and the information bit number of the line subcode;N ₂,K ₂respectively the code word length and the information bit number of the column subcodes;OH ₁andOH ₂coding overhead of row subcodes and column subcodes respectively;pthe number of folds;R ₁is the code rate of the row subcode.

And step S107, carrying out BCH coding on the array direction of the target code word matrix to obtain a pseudo product code matrix after the coding is finished.

And step S108, judging whether the performance of the pseudo-random code matrix meets the condition that the output error rate is 1e-15 under the condition that the input error rate is 2 e-3.

Step S109, if not, reselecting the folding target times, and folding the code subcodes of the code matrix in the column direction KP 4; if all folding times are not satisfied, increasing the number of subcodes of the column direction KP 4.

In steps S101-S109, KP4 code is used as a subcode in the row direction of the codeword matrix, a shortened BCH code is used in the column direction, and the coding scheme meets the requirements of code length and coding overhead by adjusting the error correction capability of the BCH code and the number of times of folding KP4 code.

The codeword structure is adjusted by the technical index and decoding performance, as shown in fig. 5, fig. 5 shows a schematic diagram of the proposed pseudo product Code encoding scheme for 800GBase ethernet, which is denoted as Code 1. The Code1 Code word matrix has 7 KP4 codes in the row direction, each KP4 Code is folded 68 times, and 80 BCH (503,476, t =3) codes in the column direction. The total code length can be calculated to be 40240 and the coding overhead is 11.84%. In addition, the application also provides two coding schemes aiming at application scenes with loose delay requirement and strict performance requirement. In this case, since the performance requirement is more stringent, it is necessary to increase the error correction capability of the column-direction subcodes. On the premise that the requirement of coding overhead is kept unchanged, the longer time delay enables the length of the column direction subcode to be increased by increasing the number of the row direction code words, so that the improvement of the error correction capability of the column direction subcode is realized under the same coding overhead. The two proposed coding schemes are denoted Code2 and Code3, respectively. The design performance index corresponding to Code2 is that the output error rate is less than 1e-15 under the input error rate of 3.8 e-3. The code word matrix has 10 KP4 codes in the row direction, each KP4 code is folded 68 times, 80 BCH (720,680, t =4) codes in the column direction, and the total code length of the code word can be calculated to be 57600, and the coding overhead is 12.06%. The design performance index corresponding to Code3 is that the output error rate is less than 1e-15 under the input error rate of 3 e-3. The code word matrix has 13 KP4 codes in the row direction, each KP4 code is folded 68 times, 80 BCH (934,884, t =5) codes in the column direction, and the total code length of the code word can be calculated to be 74720, and the coding overhead is 11.82%. It is noted that since the code word applied in the communication standard needs to strictly satisfy the code rate requirement, the code rate of 257/288 should be strictly satisfied for the three proposed code words. Based on this, after the encoding is completed, 80,0 and 160 bits of redundant bits need to be added to the three code words respectively during transmission, and the selection of the redundant bits is not limited and can be freely selected.

As shown in fig. 6, fig. 6 is a performance diagram of the coding scheme proposed in the present application, which all use hard decision decoding, and the number of iterations is 5. The solid line is a performance simulation diagram of the code word in the waterfall area, and the dotted line is a theoretical analysis result of the error-floor area, which represents the lower limit of the simulated performance. It can be seen that the NCG of the Code1 encoding scheme is about 8.45 dB. Therefore, the Code1 encoding scheme completely meets the technical requirements of 800GBase in terms of Code length, throughput rate, decoding performance and the like. In addition, the NCG of the Code2 encoding scheme is about 8.80dB, and the NCG of the Code3 encoding scheme is about 9.05dB, which can satisfy higher performance criteria.

As shown in fig. 7, the present application further provides a pseudo product code encoding apparatus for next generation ethernet, including:

a first determining module 100, configured to determine a subcode in a row direction and a subcode in a column direction of a codeword matrix; the subcodes in the row direction adopt KP4 codes, and the subcodes in the column direction adopt shortened BCH codes;

a first selecting module 200, configured to select the number of KP4 code sub-codes used in the row direction according to the code length requirementm；

A second selection module 300 for selecting the energy to be usedmNumber of integer divisionpAs a target number of folds;

the folding module 400 is configured to fold the target times of the code words encoded by the KP4 codes in the row direction and then place the code words at corresponding positions of each row of the code word matrix to obtain a target code word matrix;

a second determining module 500, configured to determine, according to the target codeword matrix, the number of information bits of the BCH code in the target codeword matrix direction and a galois field where the BCH code is located;

a third determining module 600, configured to determine, according to the next-generation ethernet coding overhead, the BCH code error correction capability in the target codeword matrix direction;

the encoding module 700 is configured to perform BCH encoding on the target code word matrix in the column direction to obtain a pseudo product code matrix after encoding is completed;

the judging module 800 is used for judging whether the performance of the pseudo-random code matrix meets the requirement that the output error rate is 1e-15 under the condition that the input error rate is 2 e-3;

Optionally, the first selecting module includes:

the selection unit is used for selecting the number of KP4 code subcodes used in the row direction according to the following formula:

；

wherein the content of the first and second substances,N ₁=544, codeword length of row subcode.

Optionally, the third determining module includes:

a determining unit, configured to determine the error correction capability of the BCH code in the target codeword matrix direction according to the following formula:

；

In the embodiment of the present application, the embodiments of the pseudo product code encoding apparatus portion oriented to the next generation ethernet and the embodiments of the pseudo product code encoding method portion oriented to the ethernet may be mutually referred to, and are not described herein again.

The present application has been described in detail with reference to specific embodiments and illustrative examples, but the description is not intended to limit the application. Those skilled in the art will appreciate that various equivalent substitutions, modifications or improvements may be made to the presently disclosed embodiments and implementations thereof without departing from the spirit and scope of the present disclosure, and these fall within the scope of the present disclosure. The protection scope of this application is subject to the appended claims.

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