阅读说明：本技术 一种光敏场效应晶体管 (Photosensitive field effect transistor ) 是由 黄永 汪琼 芦雪 陈兴 王东 吴勇 于 2021-07-08 设计创作，主要内容包括：本发明公开了一种光敏场效应晶体管,包括：衬底；高阻层,设置于衬底上；光敏层和晶体管结构层,均设置于高阻层上,且光敏层和晶体管结构层之间具有间隙；晶体管结构层包括二维材料层以及与二维材料层相接触的源极、漏极和栅极,且二维材料层、源极、漏极和栅极均具有紧邻间隙的壁面；第一电极和第二电极,第一电极和第二电极分别设置于光敏层上相对应的两个端部,且第二电极设置于光敏层靠近晶体管结构层的端部,第二电极与栅极电连接；第一电极用于连接电信号。该发明中的器件通过较为简单的结构实现了光敏结构和晶体管结构的集成,结构简单,成本较低,稳定性较高,性能优异,适于控制高频信号。(The invention discloses a photosensitive field effect transistor, comprising: a substrate; the high-resistance layer is arranged on the substrate; the photosensitive layer and the transistor structure layer are arranged on the high-resistance layer, and a gap is formed between the photosensitive layer and the transistor structure layer; the transistor structure layer comprises a two-dimensional material layer, and a source electrode, a drain electrode and a grid electrode which are in contact with the two-dimensional material layer, wherein the two-dimensional material layer, the source electrode, the drain electrode and the grid electrode are provided with wall surfaces close to gaps; the first electrode and the second electrode are respectively arranged at two corresponding end parts on the photosensitive layer, the second electrode is arranged at the end part of the photosensitive layer close to the transistor structure layer, and the second electrode is electrically connected with the grid; the first electrode is used for connecting an electric signal. The device in the invention realizes the integration of the photosensitive structure and the transistor structure through a simpler structure, has the advantages of simple structure, lower cost, higher stability and excellent performance, and is suitable for controlling high-frequency signals.)

1. A photosensitive field effect transistor, comprising:

a substrate (1);

a high resistance layer (2) disposed on the substrate (1);

the photosensitive layer (3) and the transistor structure layer are arranged on the high-resistance layer (2), and a gap (5) is formed between the photosensitive layer (3) and the transistor structure layer; the transistor structure layer comprises a two-dimensional material layer (41) and a source electrode (42), a drain electrode (43) and a grid electrode (44) which are in contact with the two-dimensional material layer (41);

the transistor structure layer comprises a first electrode (6) and a second electrode (7), wherein the first electrode (6) and the second electrode (7) are respectively arranged at two corresponding ends of the photosensitive layer (3), the second electrode (7) is arranged at the end, close to the transistor structure layer, of the photosensitive layer (3), and the second electrode (7) is electrically connected with the grid electrode (44); the first electrode (6) is used for connecting an electric signal.

2. The photosensitive field effect transistor according to claim 1, wherein the two-dimensional material layer (41) is disposed on the high-resistance layer (2), the source electrode (42), the drain electrode (43), and the gate electrode (44) are all disposed on the two-dimensional material layer (41), and the gate electrode (44) is disposed between the source electrode (42) and the drain electrode (43).

3. The photosensitive field effect transistor according to claim 1, wherein the source (42), the drain (43) and the two-dimensional material layer (41) are all disposed on the high resistance layer (2), and the two-dimensional material layer (41) is filled between the source (42) and the drain (43), and the gate (44) is disposed on the two-dimensional material layer (41).

4. The photoactive field-effect transistor according to any of claims 1-3, characterized in that the photoactive layer (3) is a halide perovskite layer or a perovskite-like layer.

5. Photosensitive field-effect transistor according to claim 4, characterised in that the thickness of the photosensitive layer (3) is 100nm-5 μm.

6. The photo sensitive field effect transistor according to claim 4, wherein the two dimensional material layer (41) comprises a channel layer (411) and a barrier layer (412), and the barrier layer (412) is disposed on the channel layer (411).

7. The photosensitive field effect transistor of claim 4, further comprising:

a buffer layer (8), the buffer layer (8) being disposed between the substrate (1) and the high resistance layer (2).

8. The photosensitive field effect transistor according to claim 4, wherein the first electrode (6) is in ohmic contact or Schottky contact with the photosensitive layer (3), and the second electrode (7) is in ohmic contact or Schottky contact with the photosensitive layer (3).

Technical Field

The invention relates to the technical field of semiconductors, in particular to a photosensitive field effect transistor.

Background

A High Electron Mobility Transistor (HEMT) is a voltage-controlled electronic conduction type device fabricated based on a semiconductor compound heterojunction, and serves in the High-frequency, millimeter-wave, or ultra-High-speed fields. The HEMT is integrated with the photosensitive material, and the application fields of the HEMT can be expanded to cover optical fiber communication systems, infrared light communication, ultraviolet light communication, photoelectric detection, irradiation detection, flame detection, laser radar, industrial temperature control, fire early warning, radiation early warning and the like. At present, there is a technical scheme for realizing the above integration, which generally adopts a mode of stacking a photosensitive structure on the existing HEMT, but in order to adjust the matching degree between different layer structures and the performance of a device integrating the photosensitive structure and the HEMT structure, the final structure of the integrated device is generally complex, and the corresponding cost is also high.

Disclosure of Invention

Therefore, the invention aims to solve the technical problems of complex structure and high cost of the conventional HEMT and photosensitive structure integrated device and provides a photosensitive field effect transistor.

To this end, the present invention provides a photo sensitive field effect transistor comprising: a substrate; the high-resistance layer is arranged on the substrate; the photosensitive layer and the transistor structure layer are arranged on the high-resistance layer, and a gap is formed between the photosensitive layer and the transistor structure layer; the transistor structure layer comprises a two-dimensional material layer, and a source electrode, a drain electrode and a grid electrode which are in contact with the two-dimensional material layer, wherein the two-dimensional material layer, the source electrode, the drain electrode and the grid electrode are provided with wall surfaces close to gaps; the first electrode and the second electrode are respectively arranged at two corresponding end parts on the photosensitive layer, the second electrode is arranged at the end part of the photosensitive layer close to the transistor structure layer, and the second electrode is electrically connected with the grid; the first electrode is used for connecting an electric signal.

Further, the two-dimensional material layer is arranged on the high-resistance layer, the source electrode, the drain electrode and the grid electrode are arranged on the two-dimensional material layer, and the grid electrode is arranged between the source electrode and the drain electrode.

Furthermore, the source electrode, the drain electrode and the two-dimensional material layer are all arranged on the high-resistance layer, the two-dimensional material layer is filled between the source electrode and the drain electrode, and the grid electrode is arranged on the two-dimensional material layer.

Further, the photosensitive layer is a halide perovskite layer or a perovskite-like layer.

Further, the thickness of the photosensitive layer is 100nm-5 μm.

Further, the two-dimensional material layer includes a channel layer and a barrier layer, and the barrier layer is disposed on the channel layer.

Further, the photo field effect transistor further includes: and the buffer layer is arranged between the substrate and the high-resistance layer.

Further, the first electrode is in ohmic contact or schottky contact with the photosensitive layer, and the second electrode is in ohmic contact or schottky contact with the photosensitive layer.

The technical scheme provided by the invention has the following advantages:

1. according to the photosensitive field effect transistor provided by the invention, the photosensitive layer and the transistor structure layer are arranged on the high-resistance layer on the substrate, and the photosensitive layer and the transistor structure layer are arranged to have a gap therebetween, so that an interface state which influences the current information control of the transistor structure layer cannot be formed between the photosensitive layer and the transistor structure layer; the second electrode is arranged at the end part of the photosensitive layer close to the transistor structure layer, the second electrode is electrically connected with the grid electrode in the transistor structure layer, and the first electrode used for connecting an electric signal is arranged at the other end, corresponding to the second electrode, of the photosensitive layer, so that the integration of the photosensitive structure and the transistor structure is realized through a simpler structure, the structure is simple, the corresponding cost is lower, the photosensitive field effect transistor can be comprehensively controlled based on voltage (through the first electrode) and light intensity (through the photosensitive layer), the controllability (also wider application range), the flexibility and the stability are improved, and the photosensitive field effect transistor is suitable for controlling high-frequency signals.

2. According to the photosensitive field effect transistor provided by the invention, the photosensitive layer and the transistor structure layer are arranged on the high-resistance layer on the substrate, and the photosensitive layer and the transistor structure layer are arranged to have a gap therebetween, so that the influence of the pressure resistance of the photosensitive layer on the pressure resistance of the transistor structure layer can be blocked, and the photosensitive layer can be arranged to be a halide perovskite layer or perovskite-like layer which is low in cost, high in extinction coefficient, adjustable in band gap, strong in defect tolerance, low in carrier mobility and poor in pressure resistance, so that the photosensitive field effect transistor can be ensured to have higher pressure resistance, the manufacturing cost of the photosensitive field effect transistor is reduced, and the applicable range of the photosensitive field effect transistor is further expanded.

3. According to the photosensitive field effect transistor, the buffer layer is arranged between the substrate layer and the high-resistance layer, so that the lattice stress of the substrate and the material on the substrate can be adjusted, and the stability of the photosensitive field effect transistor is further improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.

FIG. 1 is a top view of a photosensitive field effect transistor provided by an embodiment of the present invention;

FIG. 2 is a cross-sectional view at location A of FIG. 1;

FIG. 3 is a right side view of a photosensitive field effect transistor provided in accordance with an embodiment of the present invention;

FIG. 4 is a right side view of another photo sensitive field effect transistor provided in accordance with an embodiment of the present invention;

FIG. 5 is another cross-sectional view taken at location A of FIG. 1;

description of reference numerals:

1-a substrate; 2-high resistance layer; 3-a photosensitive layer; 41-a two-dimensional material layer; 411-the channel layer; 412-barrier layer; 42-source electrode; 43-a drain electrode; 44-a gate; 5-clearance; 6-a first electrode; 7-a second electrode; 8-buffer layer.

Detailed Description

The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it should be noted that the terms "upper", "lower", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, which are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

The present embodiment provides a photo field effect transistor, as shown in fig. 1, the device including: the semiconductor device comprises a substrate, a high-resistance layer, a photosensitive layer, a transistor structure layer, a first electrode and a second electrode.

As shown in fig. 1, the high resistance layer 2 is disposed on the substrate 1. In the present embodiment, the substrate 1 may be any suitable semiconductor substrate 1, such as a Si substrate, a buried oxide Si substrate, a sapphire substrate, a SiC substrate, a buried oxide SiC substrate, or a III-V semiconductor material substrate, such as but not limited to GaN or InP. In the present embodiment, the thickness of the substrate 1 may be set according to the thickness of the upper layer structure thereof and the requirements in the specific application scenario, for example, the thickness of the substrate 1 may be 200 μm to 2000 μm. In the present embodiment, the high-resistance layer 2 is not particularly limited As long As it has a layer structure with a high net doping concentration and a low resistivity, and any one of, but not limited to, GaN, (InAl) N, (algal) N and (InGa) N compound systems, and GaAs, (InAl) As, (InGa) As and (algal) As compound systems may be used.

As shown in fig. 2, the photosensitive layer 3 and the transistor structure layer are both disposed on the high-resistance layer 2, and a gap 5 is provided between the photosensitive layer 3 and the transistor structure layer. In the present embodiment, the gap 5 may be an air gap directly or a gap filled with an insulating medium, as long as it can block the close proximity relationship between the photosensitive layer 3 and the transistor structure layer.

In the present embodiment, the photosensitive layer 3 may be In_xGa_(1-x)As layer, x represents In InGa_(1-x)The proportion of III group elements contained in As is more than 0 and less than 1, and the As can also be a structural layer prepared by any compound in a Si layer or CIGS material system; in addition, based on disposing the photosensitive layer 3 and the transistor structure layer on the high resistance layer 2 on the substrate 1 and disposing the photosensitive layer 3 and the transistor structure layer with the gap 5 therebetween, the effect of the voltage endurance capability of the photosensitive layer 3 on the voltage endurance capability of the transistor structure layer can be blocked, so that the photosensitive layer 3 can be disposed as a halide perovskite layer or perovskite-like layer with low carrier mobility and poor voltage endurance, thereby reducing the manufacturing cost and expanding the applicable range of the photosensitive field effect transistor while ensuring the high voltage endurance capability of the photosensitive field effect transistor, specifically, the photosensitive layer 3 can be a halide perovskite or perovskite-like material, which can be specifically but not limited to MAPbI₃、FAPbI₃、CsPbBr₃、CsPbI₃、CsPbCl₃、Cs₂AgBiBr₆、(NH₄)₃Bi₂I₉、CsSnI₃、FASnI₃、Cs₂(AgNa)(InBi)Cl₆Or (CsFA) Pb (IBr)₃And the like. In the present embodiment, when the photosensitive layer 3 is a halide perovskite layer or a perovskite-like layer, the thickness thereof may be set according to the incident light energy in a specific application scenario, specifically, the thickness of the halide perovskite layer or the perovskite-like layer may be any thickness in the range of 100nm to 5 μm, and when the thickness of the halide perovskite layer or the perovskite-like layer is in a micrometer range, the high-energy radiation can be absorbed.

As shown in fig. 1, the transistor structure layer includes a two-dimensional material layer 41, and a source electrode 42, a drain electrode 43, and a gate electrode 44 in contact with the two-dimensional material layer 41. In the present embodiment, the position and the specific contact relationship among the two-dimensional material layer 41, the source electrode 42, the drain electrode 43, and the gate electrode 44 may be any one of those of the existing field effect transistors as long as it can satisfy that the second electrode 7 described below can be electrically connected to the gate electrode 44 (without an electrical connection relationship between the source electrode 42 and the drain electrode 43), specifically, the specific structure of the transistor structure layer may be that, as shown in fig. 3, the two-dimensional material layer 41 is disposed on the high-resistance layer 2, the source electrode 42, the drain electrode 43, and the gate electrode 44 are disposed on the two-dimensional material layer 41, and the gate electrode 44 is disposed between the source electrode 42 and the drain electrode 43; as shown in fig. 4, the specific structure of the transistor structure layer may also be that the source 42, the drain 43 and the two-dimensional material layer 41 are all disposed on the high-resistance layer 2, the two-dimensional material layer 41 is filled between the source 42 and the drain 43, and the gate 44 is disposed on the two-dimensional material layer 41. In the present embodiment, the two-dimensional material layer 41 includes a channel layer 411 and a barrier layer 412, and the barrier layer 412 is disposed on the channel layer 411.

As shown in fig. 1 and fig. 2, the first electrode 6 and the second electrode 7 are respectively disposed at two corresponding ends of the photosensitive layer 3, the second electrode 7 is disposed at an end of the photosensitive layer 3 close to the transistor structure layer, and the second electrode 7 is electrically connected to the gate 44, wherein the first electrode 6 is used for connecting an electrical signal. In the present embodiment, the first electrode 6 is in ohmic contact or schottky contact with the photosensitive layer 3, and the second electrode 7 is in ohmic contact or schottky contact with the photosensitive layer 3. In this embodiment, the second electrode 7 and the gate 44 may be made of the same metal material, and the specific connection manner between the second electrode 7 and the gate 44 is not limited, for example, the second electrode 7 at the intersection of the second electrode 7 and the gate 44 (at the position a in fig. 1) may be extended to be electrically connected to the gate 44, the gate 44 at the intersection of the second electrode 7 and the gate 44 may be extended to be electrically connected to the second electrode 7 (in the above two cases, the intersection of the second electrode 7 and the gate 44 may still have the gap 5, as shown in fig. 5, and of course, the intersection of the second electrode 7 and the gate 44 may also be filled, as shown in fig. 2), and the gap 5 at the intersection of the second electrode 7 and the gate 44 may also be filled with a metal, so that the filled metal is connected to the second electrode 7 and the gate 44.

As shown in fig. 2 to 4, a buffer layer 8 may be further disposed between the substrate 1 and the high resistance layer 2 in order to adjust lattice stress of the substrate 1 and the material on the substrate 1 and improve stability of the photo sensitive field effect transistor. In this embodiment, in order to further improve the overall device stability of the photo-sensitive field-effect transistor, the buffer layer 8, the high-resistance layer 2, the channel layer 411, and the barrier layer 412 may use compounds in the same system, for example, the buffer layer 8, the high-resistance layer 2, the channel layer 411, and the barrier layer 412 may be compounds in a GaN, (InAl) N, (algal) N, and (InGa) N compound system, or compounds in a GaAs, (InAl) As, (InGa) As, and (algaas) As compound system, or the like.

In the photosensitive field effect transistor in the embodiment, the photosensitive layer 3 and the transistor structure layer are both arranged on the high-resistance layer 2 on the substrate 1, and the photosensitive layer 3 and the transistor structure layer are arranged to have a gap 5 therebetween, so that an interface state which influences the current information control of the transistor structure layer is not formed between the photosensitive layer 3 and the transistor structure layer; the second electrode 7 is arranged at the end part of the photosensitive layer 3 close to the transistor structure layer, the second electrode 7 is electrically connected with the grid 44 in the transistor structure layer, and the first electrode 6 used for connecting an electric signal is arranged at the other end of the photosensitive layer 3 corresponding to the second electrode 7, so that the integration of the photosensitive structure and the transistor structure is realized through a simpler structure, the structure is simple, the corresponding cost is lower, the photosensitive field effect transistor can be comprehensively controlled based on voltage (through the first electrode 6) and light intensity (through the photosensitive layer 3), and the controllability (also wider application range), the flexibility and the stability of the photosensitive field effect transistor are improved.

It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are intended to be within the scope of the invention.