阅读说明：本技术 一种buck-boost变换器的控制方法 (Control method of BUCK-BOOST converter ) 是由 解建章 于 2021-08-04 设计创作，主要内容包括：本发明属于模拟电路技术领域,具体的说是涉及一种BUCK-BOOST变换器的控制方法。本发明在每个周期A+C导通阶段前插入一小段A+D导通时间。确保在将SW1充至VIN且开关B的体二极管反向恢复时间结束之后,再进入A+C导通阶段。在A+C导通阶段开关A中的电流一直等于电感中的电流。系统不再需要将电流采样信号屏蔽一段时间,从而减小了A+C导通的最小时间,降低了电感电流的纹波。(The invention belongs to the technical field of analog circuits, and particularly relates to a control method of a BUCK-BOOST converter. The invention inserts a small segment of A + D conduction time before the A + C conduction stage of each period. It is ensured that the a + C conduction phase is entered after SW1 is charged to VIN and the body diode reverse recovery time of switch B is over. The current in switch a is always equal to the current in the inductor during the a + C conduction phase. The system does not need to shield the current sampling signal for a period of time, so that the minimum time for conducting the A + C is reduced, and the ripple of the inductive current is reduced.)

1. A control method of a BUCK-BOOST converter comprises an MOS switch A, MOS, a switch B, MOS, a switch C, MOS, a switch D, an inductor, a differential amplifier, a comparator, a first timer, a second timer and a third timer, wherein an input voltage signal VIN is output after passing through an MOS switch A, the inductor and the MOS switch D, a connection point of the MOS switch A and the inductor is grounded after passing through an MOS switch B, and a connection point of the inductor and the MOS switch D is grounded after passing through an MOS switch C; the in-phase input end of the differential amplifier is connected with a reference voltage VREF, the reverse-phase input end of the differential amplifier is connected with a feedback voltage VFB sampled by the output end, the in-phase input end of the comparator is connected with a sampling voltage VSNS of the output end of the MOS switch A, and the reverse-phase input end of the comparator is connected with an output voltage VC of the differential amplifier; the BUCK-BOOST converter is controlled by controlling the on and off of the MOS switch A, MOS, the switch B, MOS, the switch C, MOS and the switch D, wherein the control method comprises:

s1, when the switching period starts, the MOS switch A and the MOS switch D are conducted, and meanwhile, the third timer starts to time;

s2, when the third timer reaches the preset time, outputting a control signal to control to turn off the MOS switch D and turn on the MOS switch C until the sampling voltage VSNS reaches the output voltage VC of the differential amplifier, at the moment, outputting a PWM signal by the comparator to turn off the MOS switch C, turning on the MOS switch D, and starting timing by the second timer;

s3, when the second timer reaches the preset time, outputting a control signal to control to turn off the MOS switch A and turn on the MOS switch B, and starting timing by the first timer;

and S4, outputting a control signal to turn off the MOS switch B and turn on the MOS switch A when the first timer reaches the preset time, and entering the next switching period.

Technical Field

The invention belongs to the technical field of analog circuits, and particularly relates to a control method of a BUCK-BOOST converter.

Background

BUCK-BOOST is a short for inductance type switch BUCK-BOOST DCDC voltage stabilizer. The basic principle is shown in fig. 1. The MOS switch ABCD and the inductor form a power stage circuit. The control circuit enables the ABCD to work alternately according to a certain time sequence, and the output VOUT is moved from the input VIN by using the inductance of the energy storage element while keeping the output voltage VOUT constant.

When VIN > VOUT, the switch D is always conducted, C is always turned off, and the switch AB is alternately conducted and turned off. The system operates in a simple BUCK mode (BUCK mode). When VIN < < VOUT, the switch A is always conducted, the switch B is always turned off, and the switch CD is alternately conducted and turned off. The system operates in a simple BOOST mode (BOOST mode).

When VIN is close to VOUT, the switch ABCD is required to be turned on alternately according to a specific timing, and the system operates in a BUCK-BOOST mode (BUCK-BOOST mode) to keep VOUT constant. Through the development of several generations of products, the peak current mode becomes a new control trend of the BUCK-BOOST mode.

A typical peak current module BUCK-BOOST system block diagram is shown in fig. 2. The internal reference voltage VREF and the VOUT voltage feedback signal VFB are subjected to differential amplification to generate a current control signal Vc, and the inductor current sampling signal flows through Rsns to generate VSNS. VSNS and Vc are compared to produce a pulse width modulated signal PWM. The Timer circuit generates the T1 and T2 signals by monitoring the VIN and VOUT voltages. PWM, T1 and T2 jointly control switch ABCD, and voltage stabilization of VOUT is achieved.

When VIN is close to VOUT, the circuit operates in BUCK-BOOST mode. At the beginning of each switching cycle, switches a and C are turned on and the inductor current increases linearly with time. When the inductive current sampling signal VSNS reaches the peak value set by Vc, the PWM signal turns off the switch C and turns on the switch D. And meanwhile, the Timer2 circuit starts to time, and when the preset time is reached, the T2 signal turns off the switch A and turns on the switch B. And meanwhile, the Timer1 circuit starts to time, when the preset time is reached, the T1 signal turns off the switch BD, the switch AC is turned on, and the system enters the next switching period. The switching signal and the inductor current signal are shown in fig. 3.

The charging voltage of the inductor at the A + C conduction stage is VIN, the charging voltage at the A + D conduction stage is VIN-VOUT, and the discharging voltage at the B + D conduction stage is VOUT. Since VIN and VOUT are relatively close in the BUCK-BOOST operating mode, the ripple current of the inductor current is mainly determined by the times of a + C and B + D. For the peak current mode control mode, the conduction time loop PWM of A + C and the time of B + D are set according to the minimum A + C conduction time which can be reached by the circuit according to the principle of inductive volt-second balance. The magnitude of the inductor current ripple is essentially determined by the minimum on-time of a + C.

There are two factors that affect the a + C minimum on-time. The first factor is the transmission delay of comparator COMP 1. The second factor is caused by the timing of the switch ABCD action and the parasitic capacitance inductance in the actual circuit. Switch B is turned off before switch a is turned on at the beginning of each cycle to prevent series connection of AB. The parasitic body diode of switch B will automatically conduct to maintain the current in the inductor and the SW1 node will be pulled to-0.7V. As shown in fig. 4, when AC starts to conduct, SW1 is pulled up to VIN by tube a. The current flowing through tube a will include inductor current I _ IND, reverse recovery current IRR of the body diode of switch B, and current I _ PAR where VIN charges the parasitic capacitance Cpar of node SW1 to VIN voltage through tube a. Due to the parasitic inductance Lpar in the VIN path in practical application, IRR + I _ PAR oscillates and attenuates to zero. To avoid the loop operation interference caused by this oscillating current, VSNS needs to be masked for a while at the beginning of each switching cycle, and the current sampling circuit is enabled after IRR + I _ PAR is attenuated to be small enough. In practical circuit design, the shielding time of VSNS is larger than the transmission delay of COMP1, and is a main factor affecting the a + C minimum on time.

When the inductor ripple current is large, the system efficiency is reduced and the EMI interference is increased. Meanwhile, the input and output voltage ripples are large, and a filter capacitor is required to be added to suppress the ripples, so that the cost is increased.

Disclosure of Invention

The present invention is directed to the above-mentioned problems, and a control method of a BUCK-BOOST converter is proposed. Due to the parasitic capacitance at point SW1, the reverse recovery time of the body diode of switch B and the parasitic inductance in VIN path, the current flowing in a during the period after switch a is turned on is greater than the actual charging current in the inductance. During this time, if real-time current in switch a is used to participate in the loop control, PWM can be triggered erroneously to cause loop oscillation. In an actual circuit, a current sampling signal needs to be shielded for a period of time, and the current in the switch A is equal to the inductive current and then participates in the control of a loop. During the masking time, A + C will be forced to conduct. The charging voltage of the inductor is higher in the period of time, so that the current ripple of the inductor is larger.

Aiming at the problems, the technical scheme of the invention is as follows:

a control method of a BUCK-BOOST converter comprises an MOS switch A, MOS, a switch B, MOS, a switch C, MOS, a switch D, an inductor, a differential amplifier, a comparator, a first timer, a second timer and a third timer, wherein an input voltage signal VIN is output after passing through an MOS switch A, the inductor and the MOS switch D, a connection point of the MOS switch A and the inductor is grounded after passing through an MOS switch B, and a connection point of the inductor and the MOS switch D is grounded after passing through an MOS switch C; the in-phase input end of the differential amplifier is connected with a reference voltage VREF, the reverse-phase input end of the differential amplifier is connected with a feedback voltage VFB sampled by the output end, the in-phase input end of the comparator is connected with a sampling voltage VSNS of the output end of the MOS switch A, and the reverse-phase input end of the comparator is connected with an output voltage VC of the differential amplifier; the BUCK-BOOST converter is controlled by controlling the on and off of the MOS switch A, MOS, the switch B, MOS, the switch C, MOS and the switch D, wherein the control method comprises:

s1, when the switching period starts, the MOS switch A and the MOS switch D are conducted, and meanwhile, the third timer starts to time;

s2, when the third timer reaches the preset time, outputting a control signal to control to turn off the MOS switch D and turn on the MOS switch C until the sampling voltage VSNS reaches the output voltage VC of the differential amplifier, at the moment, outputting a PWM signal by the comparator to turn off the MOS switch C, turning on the MOS switch D, and starting timing by the second timer;

s3, when the second timer reaches the preset time, outputting a control signal to control to turn off the MOS switch A and turn on the MOS switch B, and starting timing by the first timer;

and S4, outputting a control signal to turn off the MOS switch B and turn on the MOS switch A when the first timer reaches the preset time, and entering the next switching period.

The invention inserts a small segment of A + D conduction time before the A + C conduction stage of each period. It is ensured that the a + C conduction phase is entered after SW1 is charged to VIN and the body diode reverse recovery time of switch B is over. The current in switch a is always equal to the current in the inductor during the a + C conduction phase. The system does not need to shield the current sampling signal for a period of time, so that the minimum time for conducting the A + C is reduced, and the ripple of the inductive current is reduced.

The invention has the beneficial effects that: the ripple of the inductive current can be effectively reduced.

Drawings

FIG. 1 is a simplified block diagram of BUCK-BOOST;

FIG. 2 is a peak current mode BUCK-BOOST;

FIG. 3 is a waveform in BUCK-BOOST mode;

FIG. 4 is the current in the initial period A when the switch AC is on;

FIG. 5 is a block diagram of a schematic system of the present invention;

FIG. 6 is a waveform of the scheme of the present invention in BUCK-BOOST mode.

Detailed Description

The present invention will be described in detail below with reference to the accompanying drawings.

The method of the invention is mainly to let the switch AD lead for a short period of time at the beginning of each switching cycle. Since VIN and VOUT are relatively close, the charging voltage of the inductor is relatively low, and the current only rises slowly. After VIN charges the SW1 node to VIN through switch a and the body diode reverse recovery time of switch B is over, switch D turns off switch C and turns on. The inductor is rapidly charged with VIN. At this time, only the charging current of the inductor is in the switch a, and the VSNS does not need to be shielded any more. The a + C minimum on time can be greatly reduced.

As shown in fig. 5, in the system shown in fig. 2, the shielding block blanking in the inductor current sampling circuit is removed while the delay circuit Tdelay is added. The T1 signal generates T3 via a delay circuit Tdelay. Tdelay is set for a time slightly greater than the reverse recovery time of the body diode of switch B and the time that the node SW1 is charged to VIN by switch a.

The switching sequence and inductor current waveforms of the present invention are shown in fig. 6. At the beginning of each switching cycle, switches a and D are turned on and the Timer3 circuit begins to count. When Timer3 reaches a predetermined time, switches a and C conduct and the inductor current increases linearly with time. When the inductive current sampling signal VSNS reaches the peak value set by Vc, the PWM signal turns off the switch C and turns on the switch D. And meanwhile, the Timer2 circuit starts to time, and when the preset time is reached, the T2 signal turns off the switch A and turns on the switch B. And meanwhile, the Timer1 circuit starts timing, when the preset time is reached, the T1 signal turns off the switch B, the switch A is turned on, and the system enters the next switching period.