阅读说明：本技术 单电阻电流采样方法及其装置 (Single-resistor current sampling method and device ) 是由 李柏松 陈伟 时迎亮 成爱军 李武君 于 2021-07-22 设计创作，主要内容包括：本发明公开了一种单电阻电流采样方法及其装置,该方法包括以下步骤：a、对电机控制算法计算出的三相占空比进行调整,获得调整后的三相占空比；b、根据调整后的三相占空比计算电流采样时刻；c、按照调整后的三相占空比输出三相电压；d、在电流采样时刻进行电流采样,根据电流采样结果重构出三相电流。本发明可以实现单电阻电流采样,并保证采样精度。(The invention discloses a single-resistor current sampling method and a device thereof, wherein the method comprises the following steps: a. adjusting the three-phase duty ratio calculated by the motor control algorithm to obtain the adjusted three-phase duty ratio; b. calculating current sampling time according to the adjusted three-phase duty ratio; c. outputting three-phase voltage according to the adjusted three-phase duty ratio; d. and carrying out current sampling at the current sampling moment, and reconstructing a three-phase current according to a current sampling result. The invention can realize single-resistor current sampling and ensure sampling precision.)

1. A single resistance current sampling method, sample the bus current through the sampling resistance set up on the three-phase inverter circuit bus; the method is characterized by comprising the following steps:

a. three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c](ii) a Wherein D is₁[a]、D₁[b]、D₁[c]Three-phase duty cycle, D, being one of the first half or the second half of the carrier cycle₂[a]、D₂[b]、D₂[c]A three-phase duty cycle that is the other of the first half cycle or the second half cycle of the carrier cycle;

b. calculating current sampling time according to the adjusted three-phase duty ratio;

c. outputting three-phase voltage according to the adjusted three-phase duty ratio;

d. and carrying out current sampling at the current sampling moment, and reconstructing a three-phase current according to a current sampling result.

2. The single resistor current sampling method of claim 1, wherein step a comprises:

a1, three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Sorting according to the size sequence to obtain the maximum value D_maxMiddle value D_midMinimum value D_minAnd recording the maximum value D_maxMiddle value D_midAnd a minimum value D_minIf the corresponding phase is a phase a, a phase b or a phase c, making Max represent the serial number of the phase corresponding to the maximum value of the duty ratio, Mid represent the serial number of the phase corresponding to the intermediate value of the duty ratio, and Min represent the serial number of the phase corresponding to the minimum value of the duty ratio; when the three-phase duty ratios are equal, firstly, appointing any one-phase duty ratio as a maximum value, then appointing any one-phase duty ratio in the rest two-phase duty ratios as an intermediate value, and appointing the rest one-phase duty ratio as a minimum value; when the two-phase duty ratios are equal, designating any one phase of the equal two-phase duty ratios as a large value and designating the other phase of the equal two-phase duty ratios as a small value;

a2, calculation D_maxAnd D_midDifference D of_xdAnd D_midAnd D_minDifference D of_dn：

Wherein D is_max、D_midAnd D_minAre respectively the three-phase duty ratio D [ a ]]、D[b]、D[c]Maximum, intermediate and minimum values of;

a3, according to D_xdAnd D_dnObtaining a first temporary calculated variable D_xd1A second temporary calculated variable D_dn1A third temporary calculated variable D_xd2And a fourth temporary calculated variable D_dn2：

D_xd2＝2D_xd-D_xd1

D_dn2＝2D_dn-D_dn1

Wherein D is_Ts＝T_s2/T, wherein T is a carrier period, and Ts is a preset minimum sampling window; for D calculated by the above formula_xd1、D_dn1、D_xd2、D_dn2Limiting according to the following limiting rule to obtain the final D_xd1、D_dn1、D_xd2、D_dn2：

If D is_xd1And D_dn1Sum greater than 1, D_xd1And D_dn1Is unchanged for the smaller of D_xd1And D_dn1The larger of which becomes 1 minus the smaller;

if D is_xd2And D_dn2Sum greater than 1, D_xd2And D_dn2Is unchanged for the smaller of D_xd2And D_dn2The larger of which becomes 1 minus the smaller;

a4, according to D_xd1、D_dn1And D_xd2、D_dn2Calculate D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c]：

Wherein D is_z1Has a value range of [0, 1-D_xd1-D_dn1]；D_z2The value range of (a) is [0,

1-D_xd2-D_dn2](ii) a The definition of function sign1() and function sign2() are shown as follows:

3. the single-resistor current sampling method as claimed in claim 2, wherein in the step b, two current sampling times t of the current carrier period are calculated_s1And t_s2，t_s1And t_s2The calculation formula of (a) is as follows:

4. the single-resistor current sampling method as claimed in claim 3, wherein in said step c, the first half period of the present carrier cycle is according to D₁[a]、D₁[b]、D₁[c]Outputting three-phase voltage according to D in the latter half period of the current carrier wave period₂[a]、D₂[b]、D₂[c]And outputting three-phase voltage.

5. The single resistor current sampling method of claim 4 wherein in the first half of the present carrier cycle, when time t is less than (1-D)₁[x]) When T/2, the x phase outputs low level, otherwise, high level is output; in the latter half of the current carrier period, when time t is less than (1+ D)₂[x]) When T/2, the x phase outputs high level, otherwise, the x phase outputs low level; d₁[x]Represents D₁[a]、D₁[b]And D₁[c]，D₂[x]Represents D₂[a]、D₂[b]And D₂[c]。

6. The single-resistor current sampling method as claimed in claim 2, wherein in the step b, two current sampling times t of the current carrier period are calculated_s1、t_s2And two current sampling times t of the next carrier period_s3、t_s4，t_s1、t_s2、t_s3And t_s4The calculation formula of (a) is as follows:

7. the single-resistor current sampling method as claimed in claim 6, wherein in said step c, the first half period of the present carrier cycle is according to D₁[a]、D₁[b]、D₁[c]Outputting three-phase voltage according to D in the latter half period of the current carrier wave period₂[a]、D₂[b]、D₂[c]Outputting three-phase voltage according to D in the first half period of the next carrier wave period₂[a]、D₂[b]、D₂[c]Outputting three-phase voltage according to D in the latter half period of the next carrier wave period₁[a]、D₁[b]、D₁[c]And outputting three-phase voltage.

8. The single resistor current sampling method of claim 7 wherein in the first half of the present carrier cycle, when time t is less than (1-D)₁[x]) When T/2, the x phase outputs low level, otherwise outputs high level, and in the latter half period of the current carrier period, the time T is less than (1+ D)₂[x]) When T/2, the x phase outputs high level, otherwise, the x phase outputs low level; in the first half of the next carrier cycle, when time t is less than (3-D)₂[x]) When T/2, the x phase outputs low level, otherwise, high level is output; in the second half of the next carrier period, when time t is less than (3+ D)₁[x]) When T/2, the x phase outputs high level, otherwise, the x phase outputs low level; d₁[x]Represents D₁[a]、D₁[b]And D₁[c]，D₂[x]Represents D₂[a]、D₂[b]And D₂[c]。

9. The single-resistor current sampling method of claim 6, wherein the formula for reconstructing the three-phase current is as follows:

I_dc1、I_dc2、I_dc3and I_dc4Are each at t_s1、t_s2、t_s3And t_s4And sampling the obtained bus current at any time.

10. A single resistance current sampling device, comprising:

a memory for storing a program;

a processor for loading the program to perform the single resistance current sampling method of any one of claims 1 to 9.

Technical Field

The invention relates to a single-resistor current sampling technology.

Background

The inverter is typically a three-phase output used to control a three-phase ac motor. The frequency converter generally needs three-phase current signals to realize motor control, and simultaneously, the frequency converter and the motor are protected according to the three-phase current signals. There are many ways to obtain three-phase current signals, and obtaining current signals through sampling resistors is a common current sampling way. According to the number of the sampling resistors, the current sampling method can be divided into three-resistor current sampling, two-resistor current sampling and single-resistor current sampling, wherein the hardware cost of the single-resistor current sampling is the lowest. When the requirement on the system cost is high, single resistance current sampling is a good choice.

The single-resistor current sampling is to collect bus current, and in order to obtain current of each phase, sampling is required to be carried out at different moments in a sampling period, and then three-phase current is obtained in a reconstruction mode. In order to ensure that three-phase current can be accurately obtained, a single-resistor current sampling method has certain requirements on a sampling window and sampling time, and the output voltage of the frequency converter needs to be adjusted to meet the requirements. In addition, the current sampling at the voltage zero vector can not be realized during the single-resistor current sampling, so that the current sampled by the common single-resistor current sampling method contains a current ripple signal, and the accuracy of the sampled current signal is reduced.

Disclosure of Invention

The invention aims to provide a single-resistor current sampling method, which can obtain three-phase current signals under the condition of only one sampling resistor.

The invention provides a single-resistor current sampling device.

The technical scheme adopted by the invention is as follows:

a single resistance current sampling method, sample the bus current through the sampling resistance set up on the three-phase inverter circuit bus; the method comprises the following steps:

a. three-phase duty ratio D [ a ] calculated by motor control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c](ii) a Wherein D is₁[a]、D₁[b]、D₁[c]Three-phase duty cycle, D, being one of the first half or the second half of the carrier cycle₂[a]、D₂[b]、D₂[c]A three-phase duty cycle that is the other of the first half cycle or the second half cycle of the carrier cycle;

b. calculating current sampling time according to the adjusted three-phase duty ratio;

c. outputting three-phase voltage according to the adjusted three-phase duty ratio;

d. and carrying out current sampling at the current sampling moment, and reconstructing a three-phase current according to a current sampling result.

The single-resistor current sampling method comprises the following steps:

a1, three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Sorting according to the size sequence to obtain the maximum value D_maxMiddle value D_midMinimum value D_minAnd recording the maximum value D_maxMiddle value D_midAnd a minimum value D_minIf the corresponding phase is a phase a, a phase b or a phase c, making Max represent the serial number of the phase corresponding to the maximum value of the duty ratio, Mid represent the serial number of the phase corresponding to the intermediate value of the duty ratio, and Min represent the serial number of the phase corresponding to the minimum value of the duty ratio; when the three-phase duty ratios are equal, firstly, appointing any one-phase duty ratio as a maximum value, then appointing any one-phase duty ratio in the rest two-phase duty ratios as an intermediate value, and appointing the rest one-phase duty ratio as a minimum value; when the two-phase duty ratios are equal, designating any one phase of the equal two-phase duty ratios as a large value and designating the other phase of the equal two-phase duty ratios as a small value;

a2, calculation D_maxAnd D_midDifference D of_xdAnd D_midAnd D_minDifference D of_dn：

Wherein D is_max、D_midAnd D_minAre respectively the three-phase duty ratio D [ a ]]、D[b]、D[c]Maximum, intermediate and minimum values of;

a3, according to D_xdAnd D_dnObtaining a first temporary calculated variable D_xd1A second temporary calculated variable D_dn1A third temporary calculated variable D_xd2And a fourth temporary calculated variable D_dn2：

D_xd2＝2D_xd-D_xd1

D_dn2＝2D_dn-D_dn1

Wherein D is_Ts＝T_s2/T, wherein T is a carrier period, and Ts is a preset minimum sampling window; for D calculated by the above formula_xd1、D_dn1、D_xd2、D_dn2Limiting according to the following limiting rule to obtain the final D_xd1、D_dn1、D_xd2、D_dn2：

If D is_xd1And D_dn1Sum greater than 1, D_xd1And D_dn1Is unchanged for the smaller of D_xd1And D_dn1The larger of which becomes 1 minus the smaller;

if D is_xd2And D_dn2Sum greater than 1, D_xd2And D_dn2Is unchanged for the smaller of D_xd2And D_dn2The larger of which becomes 1 minus the smaller;

a4, according to D_xd1、D_dn1And D_xd2、D_dn2Calculate D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c]：

Wherein D is_z1Has a value range of [0, 1-D_xd1-D_dn1]；D_z2Has a value range of [0, 1-D_xd2-D_dn2](ii) a The definition of function sign1() and function sign2() are shown as follows:

the invention also provides a single-resistor current sampling device, which comprises: a memory for storing a program; and the processor is used for loading the program to execute the single-resistor current sampling method.

According to the single-resistor current sampling method and the single-resistor current sampling device, the single-resistor current sampling can be realized, the sampling precision is ensured, and further the control on the three-phase motor and the protection on a motor driving device (such as a frequency converter) and the motor are realized.

Drawings

Fig. 1 shows a schematic flow diagram of a single-resistor current sampling method according to an embodiment of the present invention.

Fig. 2 shows a schematic diagram of two sampling instants according to a first embodiment of the present invention.

Fig. 3 shows a schematic diagram of a single-phase voltage output according to a regulated duty cycle according to a first embodiment of the present invention.

Fig. 4 shows a schematic diagram of four sampling instants according to a second embodiment of the present invention.

Fig. 5 shows a schematic diagram of a single-phase voltage output according to a regulated duty cycle according to a second embodiment of the present invention.

Detailed Description

Please refer to fig. 1. The single-resistor current sampling method provided by the embodiment of the invention comprises the following steps of:

a. three-phase duty ratio D [ a ] calculated by motor control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c](ii) a Wherein D is₁[a]、D₁[b]、D₁[c]Three-phase duty cycle, D, being one of the first half or the second half of the carrier cycle₂[a]、D₂[b]、D₂[c]A three-phase duty cycle that is the other of the first half cycle or the second half cycle of the carrier cycle;

b. calculating current sampling time according to the adjusted three-phase duty ratio;

c. outputting three-phase voltage according to the adjusted three-phase duty ratio;

d. and carrying out current sampling at the current sampling moment, and reconstructing a three-phase current according to a current sampling result.

The working process of the single-resistor current sampling method of the present invention is further described below with reference to two specific embodiments.

First embodiment

According to the embodiment, the three-phase duty ratio calculated by the PWM control algorithm is firstly adjusted, then the sampling time of two times is calculated, and finally the three-phase current is reconstructed according to the bus current obtained by sampling. The single-resistor current sampling method of the embodiment is applied to a frequency converter, the carrier period of the frequency converter is T, and the minimum sampling window is T_sA PWM control algorithm for controlling the operation of the motor and a sampling algorithm are performed once per carrier period. The first embodiment comprises the following specific steps:

step a, calculating the three-phase duty ratio D [ a ] of the PWM control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c](ii) a Step a further comprises:

a1, calculating the three-phase duty ratio D [ a ] by PWM control algorithm]、D[b]、D[c]Sorting according to the size sequence to obtain the maximum value D_maxMiddle value D_midMinimum value D_minAnd recording whether the phase corresponding to the maximum value, the intermediate value and the minimum value is a phase, b phase or c phase. Let Max represent the serial number of the corresponding phase of the maximum value of the duty ratio, Mid representThe intermediate value of the duty ratio corresponds to the serial number of the phase, Min represents the serial number of the phase corresponding to the minimum value of the duty ratio, the values of Max, Mid and Min are all a, b or c, and a, b and c are the serial numbers of the a phase, the b phase and the c phase respectively. In this embodiment, before the adjustment, the a-phase duty ratio is the largest, the b-phase duty ratio is the next, and the c-phase duty ratio is the smallest, so that: d_max＝D[a]，D_mid＝D[b]，D_min＝D[c]Max is a, Mid is b, and Min is c. Note that Max denotes that the a-phase duty ratio is the maximum before adjustment, and Max stores the number of the phase corresponding to the maximum duty ratio before adjustment, but the a-phase duty ratio after adjustment (i.e., D to be described later)₁[a]And D₂[a]) May no longer be the maximum. Mid and Min are similar to the meaning of b and c.

a2, calculation D_maxAnd D_midDifference D of_xdAnd D_midAnd D_minDifference D of_dn，D_xdAnd D_dnCalculated according to the following formula:

a3, according to D_xdAnd D_dnObtaining a first temporary calculated variable D_xd1A second temporary calculated variable D_dn1A third temporary calculated variable D_xd2Fourth temporary calculated variable D_dn2；D_xd1、D_dn1And D_xd2、D_dn2The following formula was used for calculation:

D_xd2＝2D_xd-D_xd1

D_dn2＝2D_dn-D_dn1

wherein D is_Ts＝T_s2/T, T is the carrier periodIn the period, Ts is a preset minimum sampling window; for D calculated by the above formula_xd1、D_dn1、D_xd2、D_dn2Limiting according to the following limiting rule to obtain the final D_xd1、D_dn1、D_xd2、D_dn2：

If D is_xd1And D_dn1The sum is greater than 1, then D_xd1And D_dn1Is unchanged for the smaller of D_xd1And D_dn1The larger of which becomes 1 minus the smaller (1-smaller);

if D is_xd2And D_dn2The sum is greater than 1, then D_xd2And D_dn2Is unchanged for the smaller of D_xd2And D_dn2The larger of which becomes 1 minus the smaller (the larger is 1-smaller).

a4, according to D_xd1、D_dn1And D_xd2、D_dn2Calculate D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c]；D₁[a]、D₁[b]、D₁[c]Obtained by the following formula:

in the above formula, D_z1Has a value range of [0, 1-D_xd1-D_dn1]I.e. D_z1Is 0, 1-D_xd1-D_dn1Or 0 and 1-D_xd1-D_dn1Any value in between. The functions sign1() and sign2() are defined as follows

D₂[a]、D₂[b]、D₂[c]Obtained from the formula：

In the above formula, D_z2Has a value range of [0, 1-D_xd2-D_dn2]I.e. D_z2Is 0, 1-D_xd2-D_dn2Or 0 and 1-D_xd2-D_dn2Any value in between.

Step b, calculating current sampling time according to the adjusted three-phase duty ratio, in this embodiment, calculating two current sampling times t of the current carrier period_s1And t_s2，t_s1And t_s2The calculation formula of (a) is as follows:

fig. 2 shows a schematic diagram of two sampling instants according to a first embodiment of the present invention, where 0 in fig. 2 represents the start instant of a carrier period.

And c, outputting the three-phase voltage according to the adjusted three-phase duty ratio. According to D in the first half period of the current carrier wave period₁[a]、D₁[b]、D₁[c]Outputting three-phase voltage according to D in the latter half period of the current carrier wave period₂[a]、D₂[b]、D₂[c]And outputting three-phase voltage.

For simplicity of description, x represents a, b, c, by D₁[x]Represents D₁[a]、D₁[b]And D₁[c]By D₂[x]Represents D₂[a]、D₂[b]And D₂[c]. In the first half of the current carrier cycle, when time t is less than (1-D)₁[x]) When T/2, the x phase outputs low level, otherwise, high level is output; in the latter half of the current carrier period, when time t is less than (1+ D)₂[x]) And T/2+, the x phase outputs high level, otherwise, the x phase outputs low level. Fig. 3 shows a schematic diagram of a single-phase voltage output according to the adjusted duty ratio according to the first embodiment of the present invention. 0 in figure 3 represents the start of the carrier period,in this embodiment, the sampling algorithm period is the same as the carrier period, and 0 is also the starting time of the sampling algorithm period. The time t mentioned above is the time within the current sampling algorithm period.

Step d, sampling time t in current carrier cycle_s1And t_s2Sampling to obtain bus current I_dc1And I_dc2And reconstructing three-phase current according to the sampled bus current.

Noting that the three-phase currents are Ia, Ib and ic, respectively, then the three-phase currents can be obtained by:

it should be noted that I Max is not necessarily the maximum value of the three-phase current, but the corresponding current with the maximum duty ratio before the duty ratio is adjusted.

Second embodiment

According to the embodiment, the three-phase duty ratio calculated by the PWM control algorithm is firstly adjusted, then the time of four times of sampling is calculated, and finally the three-phase current is reconstructed according to the bus current obtained by sampling. The single-resistor current sampling method of the embodiment is applied to a frequency converter, the carrier period of the frequency converter is T, and the minimum sampling window is T_sThe PWM control algorithm and the sampling algorithm are executed once every two carrier cycles, i.e. the sampling algorithm cycle equals two carrier cycles, the PWM control algorithm being used to control the operation of the motor. The second embodiment comprises the following specific steps:

step a, calculating the three-phase duty ratio D [ a ] of the PWM control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c](ii) a Step a further comprises:

a1, calculating the three-phase duty ratio D [ a ] by PWM control algorithm]、D[b]、D[c]Sorting according to the size sequence to obtain the maximum value D_maxMiddle value D_midMinimum value D_minAnd recording the maximum and intermediate valuesThe phase corresponding to the minimum value is either a phase, b phase or c phase. Max represents the serial number of the phase corresponding to the maximum value of the duty ratio, Mid represents the serial number of the phase corresponding to the intermediate value of the duty ratio, Min represents the serial number of the phase corresponding to the minimum value of the duty ratio, the values of Max, Mid and Min are all a, b or c, and a, b and c are the serial numbers of the phase a, the phase b and the phase c respectively. In this embodiment, before the adjustment, the a-phase duty ratio is the largest, the b-phase duty ratio is the next, and the c-phase duty ratio is the smallest, so D_max＝D[a]，D_mid＝D[b]，D_min＝D[c]Max is a, Mid is b, and Min is c. Note that Max denotes that the a-phase duty ratio is the maximum before adjustment, and Max stores the number of the phase corresponding to the maximum duty ratio before adjustment, but the a-phase duty ratio after adjustment (i.e., D to be described later)₁[a]And D₂[a]) May no longer be the maximum. Mid and Min are similar to the meaning of b and c.

a2, calculation D_maxAnd D_midDifference D of_xdAnd D_midAnd D_minDifference D of_dn，D_xdAnd D_dnCalculated according to the following formula:

a3 and according to D_xdAnd D_dnObtaining a first temporary calculated variable D_xd1A second temporary calculated variable D_dn1A third temporary calculated variable D_xd2Fourth temporary calculated variable D_dn2；D_xd1、D_dn1And D_xd2、D_dn2The following formula was used for calculation:

D_xd2＝2D_xd-D_xd1

D_dn2＝2D_dn-D_dn1

wherein D is_Ts＝T_s2/T, wherein T is a carrier period, and Ts is a preset minimum sampling window; for D calculated by the above formula_xd1、D_dn1、D_xd2、D_dn2Limiting according to the following limiting rule to obtain the final D_xd1、D_dn1、D_xd2、D_dn2：

If D is_xd1And D_dn1The sum is greater than 1, then D_xd1And D_dn1Is unchanged for the smaller of D_xd1And D_dn1The larger of which becomes 1 minus the smaller;

if D is_xd2And D_dn2The sum is greater than 1, then D_xd2And D_dn2Is unchanged for the smaller of D_xd2And D_dn2The larger of which becomes 1 minus the smaller.

a4, according to D_xd1、D_dn1And D_xd2、D_dn2Calculate D₁[a]、D₁[b]、D₁[c]And D₂[a]、D₂[b]、D₂[c]；D₁[a]、D₁[b]、D₁[c]Obtained by the following formula:

in the above formula, D_z1Has a value range of [0, 1-D_xd1-D_dn1]. The functions sign1() and sign2() are defined as follows

D₂[a]、D₂[b]、D₂[c]Obtained by the following formula:

in the above formula, D_z2Has a value range of [0, 1-D_xd2-D_dn2]。

Step b, calculating current sampling time according to the adjusted three-phase duty ratio, in this embodiment, calculating two current sampling times t of the current carrier period_s1、t_s2And two current sampling times t of the next carrier period_s3、t_s4，t_s1、t_s2、t_s3And t_s4The calculation formula of (a) is as follows:

fig. 4 shows a schematic diagram of four current sampling moments according to a second embodiment of the present invention, and 0 in fig. 3 represents the start moment of the current carrier period, i.e. the start moment of the sampling algorithm period.

Step c, outputting three-phase voltage according to the adjusted three-phase duty ratio, and outputting the three-phase voltage according to D in the first half period of the current carrier period₁[a]、D₁[b]、D₁[c]Output voltage according to D in the second half of the current carrier cycle₂[a]、D₂[b]、D₂[c]Output voltage according to D in the first half of the next carrier cycle₂[a]、D₂[b]、D₂[c]Output voltage according to D in the second half of the next carrier period₁[a]、D₁[b]、D₁[c]And outputting the voltage.

For simplicity of description, x represents a, b, c, by D₁[x]Represents D₁[a]、D₁[b]、D₁[c]By D₂[x]Represents D₂[a]、D₂[b]、D₂[c]. In the first half of the current carrier cycle (i.e., the first carrier cycle of the sampling algorithm cycle), when time t is less than (1-D)₁[x]) T/2, x phase output low levelOtherwise, outputting a high level; in the latter half of the current carrier period, when time t is less than (1+ D)₂[x]) When T/2, the x phase outputs high level, otherwise, the x phase outputs low level; in the first half of the next carrier cycle (i.e., the second carrier cycle of the sampling algorithm cycle), when time t is less than (3-D)₂[x]) When T/2, the x phase outputs low level, otherwise, high level is output; in the second half of the next carrier period, when time t is less than (3+ D)₁[x]) And T/2, outputting high level by the x phase, and otherwise, outputting low level. Fig. 5 shows a schematic diagram of a single-phase voltage output according to the adjusted duty ratio according to the second embodiment of the present invention. 0 in fig. 5 represents the starting time of the current carrier period, in this embodiment, the sampling algorithm period is equal to two carrier periods, and 0 is also the starting time of the sampling algorithm period. The time t mentioned above is the time within the current sampling algorithm period.

Step d, sampling time t in current carrier cycle_s1、t_s2And the sampling instant t of the next carrier period_s3、t_s4Sampling to obtain bus current I_dc1、I_dc2、I_dc3And I_dc4And reconstructing three-phase current according to the sampled bus current.

Noting that the three-phase currents are Ia, Ib and ic, respectively, then the three-phase currents can be obtained by:

in the second embodiment, the reconstructed three-phase current is obtained by averaging two groups of current sampling values, so that the influence of ripple current during single-resistor current sampling can be reduced, and the current sampling precision is improved.

In the first and second embodiments of the present invention, the duty ratio of the first half period and the duty ratio of the second half period of each carrier cycle may be interchanged, and after the interchange, the sampling time and the calculation formula of the current reconstruction are modified accordingly to implement the single-resistance current sampling, and no specific formula is given here.

In the first and second embodiments of the present invention, the polarity of the level may be changed when the voltage is outputted. If the high level is changed into the low level, and the low level is changed into the high level, the same voltage can be ensured to be output only by adjusting the original duty ratio (the value of the original duty ratio is changed into 1 and the value is subtracted), at the moment, the single-resistance current sampling can be realized by correspondingly modifying the sampling time and the calculation formula of current reconstruction, and a specific formula is not given here.

Yet another embodiment of the present invention further provides a single resistance current sampling apparatus including a memory and a processor. The memory is used for storing programs; the processor is used for loading the program to execute the single-resistor current sampling method.

According to the single-resistor current sampling method and the single-resistor current sampling device, the single-resistor current sampling can be realized, the sampling precision is ensured, and further the control on the three-phase motor and the protection on a motor driving device (such as a frequency converter) and the motor are realized.