阅读说明：本技术 自适性电压定比测量方法及相关的电子装置 (Adaptive voltage scaling measurement method and related electronic device ) 是由 赖照民 王鸿玮 张堂洪 谢瀚颉 郭俊仪 于 2020-04-23 设计创作，主要内容包括：本发明公开一种自适性电压定比测量方法及相关的电子装置,所述方法包含有以下步骤：将一系统芯片安装至一印刷电路板上,并连接至一存储元件；致能该系统芯片以自该存储元件读取一启动程序码,并执行该启动程序码以对该系统芯片进行自适性电压定比测量,以决定出该系统芯片分别在多个操作频率下的多个目标供应电压值,并据以建立出一自适性电压定比查找表；以及将该自适性电压定比查找表存储在该系统芯片或是该存储元件中。(The invention discloses an adaptive voltage scaling measurement method and a related electronic device, wherein the method comprises the following steps: mounting a system chip on a printed circuit board and connecting to a memory element; enabling the system chip to read a start-up program code from the storage element, executing the start-up program code to perform adaptive voltage scaling measurement on the system chip so as to determine a plurality of target supply voltage values of the system chip under a plurality of operating frequencies respectively, and establishing an adaptive voltage scaling lookup table according to the target supply voltage values; and storing the adaptive voltage scaling look-up table in the system-on-chip or the storage device.)

1. An adaptive voltage scaling method, comprising:

mounting a system chip on a printed circuit board and connecting to a memory element;

enabling the system chip to read a start-up program code from the storage element, executing the start-up program code to perform adaptive voltage scaling measurement on the system chip so as to determine a plurality of target supply voltage values of the system chip under a plurality of operating frequencies respectively, and establishing an adaptive voltage scaling lookup table according to the target supply voltage values; and

the adaptive voltage scaling look-up table is stored in the system-on-chip or the storage device.

2. The adaptive voltage scaling method of claim 1, wherein the pcb further comprises a power management chip, and the step of enabling the system-on-chip to read the boot-up program code from the memory device and execute the boot-up program code to perform adaptive voltage scaling on the system-on-chip to determine a plurality of target supply voltage values of the system-on-chip at a plurality of operating frequencies respectively, and accordingly establishing the adaptive voltage scaling look-up table comprises:

enabling the system chip to read the start-up program code from the storage element, executing the start-up program code to control the power management chip to generate a plurality of different supply voltage values to the system chip, so as to perform adaptive voltage scaling measurement on the system chip, determine a plurality of target supply voltage values of the system chip under the plurality of operating frequencies respectively, and establish the adaptive voltage scaling lookup table.

3. An electronic device, comprising:

a system chip; and

a storage element including a boot program code;

when the system chip is enabled, the system chip reads the starting program code from the storage element and executes the starting program code to perform adaptive voltage ratio measurement on the system chip so as to determine a plurality of target supply voltage values of the system chip under a plurality of operating frequencies respectively and establish an adaptive voltage ratio lookup table according to the target supply voltage values; and the system chip stores the adaptive voltage scaling look-up table in a memory or the storage element of the system chip.

4. The electronic device of claim 3, further comprising:

a power management chip;

when the system chip is enabled, the system chip reads the starting program code from the storage element and executes the starting program code to control the power management chip to generate a plurality of different supply voltage values to the system chip so as to perform adaptive voltage scaling measurement on the system chip, determine a plurality of target supply voltage values of the system chip under the plurality of operating frequencies respectively and establish the adaptive voltage scaling lookup table.

5. The electronic device as claimed in claim 3 or 4, wherein during a testing phase of the electronic device, when the system-on-chip is enabled for the first time to read the boot-up program code from the storage device, the boot-up program code is executed to perform adaptive voltage scaling measurement on the system-on-chip to establish the adaptive voltage scaling look-up table.

6. The electronic device of claim 5, wherein the system-on-chip performs adaptive voltage scaling measurements periodically or according to a schedule to update the adaptive voltage scaling look-up table.

7. The electronic device of claim 3, wherein the system-on-chip comprises a CPU and a graphics processor; the central processing unit performs adaptive voltage scaling measurement to determine a plurality of first target supply voltage values of the central processing unit at a plurality of first operating frequencies respectively; an adaptive voltage scaling measurement is performed on the graphics processor to determine a plurality of second target supply voltage values of the graphics processor at a plurality of second operating frequencies, respectively, for establishing the adaptive voltage scaling look-up table.

8. The electronic device of claim 3, wherein the system-on-chip comprises at least one sensor, and when the system-on-chip is at any one of the plurality of operating frequencies, the system-on-chip applies the plurality of supply voltages to the at least one sensor to generate a plurality of test data respectively, and the system-on-chip determines a target supply voltage value corresponding to the operating frequency according to the plurality of test data.

9. The electronic device of claim 8, wherein the at least one sensor comprises a plurality of sensors respectively located in a plurality of core circuits of a system on a chip.

10. The electronic device of claim 8, wherein each sensor comprises a programmable delay circuit, and the at least one sensor inputs a clock signal having the operating frequency and test data to the programmable delay circuit and applies the plurality of supply voltages to the programmable delay circuit such that the programmable delay circuit outputs the plurality of test data corresponding to the plurality of supply voltages, respectively.

Technical Field

The invention relates to an adaptive voltage scaling measurement method.

Background

In general, in consumer electronics, a Central Processing Unit (CPU) and a Graphics Processing Unit (GPU) in a system on a chip are usually important indicators of performance, and the higher the highest operating frequency of the CPU and the GPU, the better the performance. However, higher operating frequencies also require higher supply voltages, thus resulting in higher power consumption and also affecting the lifetime of the electronic product. In addition, because of the process distribution of chips, faster chips can be operated using lower supply voltages, while slower chips require higher supply voltages.

However, considering the process distribution and the chip yield, the conventional method of determining the supply voltage is to settle for the slowest chip, i.e. the same supply voltage is used at the same operating frequency regardless of whether the chip is slow or fast. However, although the slower chip can operate normally, the faster chip increases power consumption due to increased leakage current caused by operating at an unnecessarily high supply voltage. Therefore, in order to solve the above problem and make the chips operate at the proper supply Voltage, Adaptive Voltage Scaling (AVS) technology is developed to build an AVS lookup table for each chip, so that the electronic product can determine the most suitable supply Voltage by using the AVS lookup table during the actual operation process. However, since the measurement of AVS in the mass production test process requires a lot of time to affect the operation of the production line, and the environment difference between the test machine of the chip and the final electronic product in the mass production process is very large (e.g., the difference of the circuit layout on the printed circuit board), and it is difficult to establish the environment correlation between the test machine and the final electronic product, the AVS lookup table established in the mass production test process may not be suitable for the final electronic product.

Disclosure of Invention

Therefore, an object of the present invention is to provide an AVS measurement method, which can perform AVS measurement to establish an AVS lookup table after a system chip is mounted on a printed circuit board of a final product, so as to solve the problems in the prior art.

In one embodiment of the present invention, an adaptive voltage scaling method is disclosed, which comprises the following steps: mounting a system chip on a printed circuit board and connecting to a memory element; enabling the system chip to read a start-up program code from the storage element, executing the start-up program code to perform adaptive voltage scaling measurement on the system chip so as to determine a plurality of target supply voltage values of the system chip under a plurality of operating frequencies respectively, and establishing an adaptive voltage scaling lookup table according to the target supply voltage values; and storing the adaptive voltage scaling look-up table in the system-on-chip or the storage device.

In another embodiment of the present invention, an electronic device comprising a system-on-chip and a memory device is disclosed, wherein when the system-on-chip is enabled, the system-on-chip reads a boot-up program code from the memory device and executes the boot-up program code to perform adaptive voltage scaling measurement on the system-on-chip to determine a plurality of target supply voltage values of the system-on-chip at a plurality of operating frequencies respectively, and thereby establish an adaptive voltage scaling look-up table; and the system chip stores the adaptive voltage scaling look-up table in a memory or the storage element of the system chip.

Drawings

Fig. 1 is a schematic diagram of an electronic device according to an embodiment of the invention.

FIG. 2 is a schematic diagram of a sensor.

Fig. 3 is a schematic diagram of a cpu according to an embodiment of the present invention.

Fig. 4 is a flowchart of an AVS measurement method according to an embodiment of the invention.

Description of the symbols

100: electronic device

102: printed circuit board

110: power management chip

120: system-on-chip

122: central processing unit

123: sensor device

124: graphics processor

125: sensor device

130: memory element

132: operation system

134: startup procedure code

210: clock and test data generating circuit

220: programmable delay circuit

230: judgment circuit

310_1 to 310_ 4: core circuit

312_1 to 312_ 5: sensor device

400-406: step (ii) of

CLK, CLK': clock signal

DATA, DATA': test data

VDD _1 to VDD _ N: supply voltage

Detailed Description

Fig. 1 is a schematic diagram of an electronic device 100 according to an embodiment of the invention. As shown in fig. 1, the electronic device 100 includes a printed circuit board 102, the printed circuit board 102 includes a power management chip 110, a system chip 120 and a memory device 130, wherein the system chip 120 includes a cpu 122 and a graphic processor 124, the cpu 122 and the graphic processor 124 respectively include sensors 123 and 125 for AVS measurement, and the memory device 130 includes an operating system 132 and a start-up program code 134. In one embodiment, the soc 120 and the memory device 130 may be integrated in the same soc. In the embodiment, the electronic device 100 may be any electronic product, such as a set-top box (set-top box), a mobile phone, a tablet computer, a notebook computer, a desktop computer, a television …, and the like, and the electronic device 100 may be a final product or a semi-finished product (e.g., a housing is not yet installed) of the electronic product.

In the present embodiment, the system on chip 120 starts the AVS measurement after being mounted on the printed circuit board 102, for example, the printed circuit board 102 performs the AVS measurement in a test stage in a factory to establish the AVS lookup table. Therefore, since the system chip 120 is only subjected to the AVS measurement on the final product or the semi-finished product of the electronic product 100, it can be reflected that the system chip 120 is influenced by the layout of other components on the pcb 102 during the operation, and the determined AVS lookup table can actually reflect the real operation status of the system chip 120, thereby having higher accuracy.

Specifically, assuming that the system chip 120 is mounted on the pcb 102 and connected to the power management chip 110 and the storage element 130, and the operating system 132 and the boot code 134 are written in the storage element 130, when the electronic device 100 is powered on for the first time, the cpu 122 in the system chip 120 reads the boot code 134 from the storage element 130, and executes the boot code 134 to control/instruct the power management chip 110 to generate a plurality of different supply voltage values to the system chip 120, so that the cpu 122 performs AVS measurement through the sensor 123 to determine a plurality of first target supply voltage values of the cpu 122 at a plurality of first operating frequencies, respectively; in addition, the graphic processor 124 also performs AVS measurement through the sensor 125 to determine a plurality of second target supply voltage values of the graphic processor 124 at a plurality of second operating frequencies, respectively; finally, an AVS lookup table is established according to the determined first target supply voltage values of the cpu 122 at the first operating frequencies and the determined second target supply voltage values of the gpu 124 at the second operating frequencies, and the AVS lookup table is stored in a memory of the system chip 120 or the storage device 130 for subsequent use. The memory and storage element 130 may be, but is not limited to, a non-volatile memory, such as: one-time programmable memory (OTP memory), electrically blown metal fuse (eFUSE), flash memory (flash), and the like.

In detail, referring to the schematic diagram of the sensor 200 shown in fig. 2, the sensor 200 can be used to implement any one of the sensors 123, 125 shown in fig. 1, and the sensor 200 includes a clock and test data generating circuit 210, a programmable delay circuit 220 and a determining circuit 230. To illustrate the sensor 200 as the sensor 123 in the CPU 122, first, the CPU 122 controls the clock and test DATA generating circuit 210 to generate the clock signal CLK and the test DATA DATA with a first operating frequency (e.g., 1GHz), and the clock and test DATA generating circuit 210 outputs the clock signal CLK and the test DATA DATA to the programmable delay circuit 220. At this time, the central processing unit 122 notifies the power management chip 110 to sequentially generate the plurality of supply voltages VDD _1 to VDD _ N from low to high to the central processing unit 122, so that the programmable delay circuit 220 outputs a plurality of clock signals CLK 'and test DATA' respectively corresponding to the plurality of supply voltages VDD _1 to VDD _ N, wherein each clock signal CLK 'may be a delayed clock signal generated by the clock signal CLK passing through the programmable delay circuit 220, and similarly, each test DATA' may be a delayed test DATA generated by the test DATA passing through the programmable delay circuit 220. Then, the determining circuit 230 determines a target supply voltage (the most suitable supply voltage) at the operating frequency of 1GHz according to the plurality of test DATA ' and/or the plurality of clock signals CLK ', for example, the determining circuit 230 may first determine a portion of the test DATA ' having a qualified signal quality in the plurality of test DATA ', and select a minimum supply voltage of the supply voltages corresponding to the portion of the test DATA ' as the most suitable supply voltage, for example, if the test DATA ' generated when the programmable delay circuit 220 has the supply voltages VDD _4 to VDD _ N all have a qualified signal quality (e.g., the pattern of the test DATA ' conforms to a desired pattern), the determining circuit 230 selects VDD _4 as the target supply voltage. Then, the CPU 122 controls the clock and test DATA generating circuit 210 to generate the clock signal CLK and the test DATA DATA at another first operating frequency (e.g., 1.1GHz), and determines a target supply voltage at the operating frequency of 1.1GHz by the above operations, …. Similarly, the image processor 124 may also obtain a plurality of second target supply voltages respectively corresponding to a plurality of second operating frequencies through the above-described operation.

It should be noted that the circuit architecture and operation details of the sensor 200 shown in FIG. 2 are only for exemplary purposes, and are not intended to limit the present invention. In other embodiments, the sensor 200 may have other designs and different operation modes, as long as the cpu 122 and the graphic processor 125 can obtain the most suitable supply voltages corresponding to different operation frequencies through the sensors 123 and 125, respectively.

After the AVS lookup table is established and stored in the soc 120 or the storage element 130, when the user uses the electronic product 100, the cpu 122 and the graphic processor 124 can obtain relevant information from the AVS lookup table according to their operating frequencies and transmit the information to the power management chip 110, so that the power management chip 110 can provide a supply voltage corresponding to the operating frequencies of the cpu 122 and the graphic processor 124.

In the above embodiment, the soc 120 may establish only one AVS lookup table for the cpu 122 and the graphic processor 124 to use simultaneously, or may establish two AVS lookup tables for the cpu 122 and the graphic processor 124 to use respectively, that is, one AVS lookup table includes a plurality of first operating frequencies of the cpu 122 and a plurality of corresponding first target supply voltages, and the other AVS lookup table includes a plurality of second operating frequencies of the graphic processor 124 and a plurality of corresponding second target supply voltages.

In the embodiment shown in fig. 1, the system chip 120 includes a central processing unit 122 and a graphics processing unit 124, however, in other embodiments, the system chip 120 may include only one processing unit, such as only the central processing unit 122.

In the embodiment shown in fig. 1, the power management chip 110 is located outside the system chip 120, however, in other embodiments, the power management chip 110 and the system chip 120 may be integrated in the same package, or the power management chip 110 may be integrated as a part of the system chip 120.

In the embodiment shown in fig. 1, both the cpu 122 and the gpu 124 comprise only one sensor, however, in other embodiments, the cpu 122 and the gpu 124 may comprise a plurality of sensors for generating the AVS lookup table. For example, referring to the schematic diagram of the central processing unit 122 shown in FIG. 3, the central processing unit 122 includes four core circuits 310_1 to 310_4, the core circuits 310_1 to 310_4 include sensors 312_1 to 312_4, respectively, and the central processing unit 122 further includes a sensor 312_5 disposed between the four core circuits 310_1 to 310_ 4. In the embodiment shown in fig. 3, when the electronic device 100 is turned on for the first time, each of the sensors 312_1 to 312_5 receives a plurality of target supply voltages with a plurality of operating frequencies according to the operation of the sensor 200, and the core circuits corresponding to each of the sensors 312_1 to 312_5 are different and located at different positions, so that the determined target supply voltages are not necessarily the same. At this time, in order to ensure the CPU 122 to operate smoothly, when the sensors 312_1 to 312_5 obtain two or more target supply voltages for an operating frequency, the CPU 122 selects the highest target supply voltage among the target supply voltages for building the AVS lookup table. For example, assuming that the target supply voltages determined by the sensors 312_1 to 312_5 are VDD _2, VDD _3, VDD _2, and VDD _2 respectively at the operating frequency of 1.1GHz, the CPU 122 selects the target supply voltage VDD _3 for the corresponding operating frequency of 1.1GHz in the AVS lookup table.

It should be noted that, in the above embodiment, the system on chip 120 performs the AVS measurement when the electronic device 100 is first powered on to establish the AVS lookup table for use when the electronic device 100 is used by a subsequent user. However, the AVS lookup table may become unsuitable over time, taking into account internal circuit element aging and other system issues. Therefore, in the present embodiment, the cpu 122 and/or the graphic processor 124 may perform AVS measurement periodically or according to a schedule to update the AVS lookup table stored in the soc 120 or the storage device 130.

Fig. 4 is a flowchart of an AVS measurement method according to an embodiment of the invention. The flow of the AVS measurement method is as follows with reference to the description of the above embodiments.

Step 400: the process begins.

Step 402: a system chip is mounted on a printed circuit board and connected to a memory element.

Step 404: enabling the system chip to read a starting program code from the storage element, executing the starting program code to carry out AVS measurement on the system chip so as to determine a plurality of target supply voltage values of the system chip under a plurality of operating frequencies respectively, and establishing an AVS lookup table according to the target supply voltage values.

Step 406: the AVS lookup table is stored in the system-on-chip or the storage element.

Briefly summarizing the present invention, in the AVS measuring method of the present invention, after the system chip is mounted on the printed circuit board of the final product, AVS measurement is performed to establish an AVS lookup table for use by a user in subsequent operations of the electronic product. Therefore, the AVS lookup table determined is most effective for the SOC to obtain the most suitable supply voltage, since the SOC is already in the final product and there is no change in the peripheral devices during AVS measurement.

The above-mentioned embodiments are only preferred embodiments of the present invention, and all equivalent changes and modifications made by the claims of the present invention should be covered by the scope of the present invention.