阅读说明：本技术 超高深宽比图形的光刻工艺方法 (Photoetching process method for pattern with ultrahigh depth-to-width ratio ) 是由 程宇 纪明岐 朱至渊 李玉华 吴长明 姚振海 金乐群 于 2021-01-06 设计创作，主要内容包括：本发明公开了一种超高深宽比图形的光刻工艺方法,对光刻图形采用以双重曝光技术为基础,同时采用单次曝光对焦增强技术对图形进行曝光,最后形成超高深宽比的图形。本发明通过双重曝光技术及单次曝光对焦增强技术的叠加效应,结合强力曝光后烘烤,将两次曝光的投影叠加在一起,最终形成了超高深宽比的光刻图形。(The invention discloses a photoetching process method of a graph with an ultra-high depth-to-width ratio. The invention combines the superposition effect of double exposure technology and single exposure focusing enhancement technology with baking after strong exposure to superpose the projections of two exposures together, and finally forms the photoetching graph with ultrahigh depth-to-width ratio.)

1. A photoetching process method of a pattern with an ultrahigh depth-to-width ratio is characterized in that: the photoetching pattern is exposed by adopting a single exposure focusing enhancement technology based on a double exposure technology, and finally, the pattern with the ultra-high depth-to-width ratio is formed.

2. The photolithography process for forming a pattern with an ultra-high aspect ratio as recited in claim 1, wherein: the double exposure technology comprises two steps of step projection, and the aspect ratio of the finally formed graph is the superposition of the two projections.

3. The photolithography process for forming a pattern with an ultra-high aspect ratio as recited in claim 1, wherein: the double exposure technology and the single exposure focusing enhancement technology are superposed, the double exposure technology is carried out in two steps, each step is based on the double exposure technology, and the single exposure focusing enhancement technology is superposed on the double exposure technology of each step, so that each projection graph of the double exposure technology is elongated again on the basis of the parameter characteristics of the projection graph.

4. The photolithography process for forming a pattern with an ultra-high aspect ratio as recited in claim 1, wherein: and after the photoetching pattern is exposed, baking after exposure.

5. The photolithographic process method of ultra-high aspect ratio pattern as recited in claim 4, wherein: the baking is combined with the single exposure focusing enhancement technology EFESE function of the machine platform, namely, the wafer bearing platform is inclined around an X axis, the inclined tilt-X exposure is carried out for two times, the two projections are fused together through a strong exposure post-baking process, and finally the graph with the ultra-high depth-to-width ratio is obtained.

6. The photolithography process for forming a pattern with an ultra-high aspect ratio as claimed in any one of claims 1 to 5, wherein: the formed pattern with the ultrahigh aspect ratio is a pattern with the aspect ratio not less than 20: 1.

Technical Field

The invention relates to the field of semiconductor device manufacturing, in particular to a photoetching process method of a pattern with an ultrahigh depth-to-width ratio.

Background

A Contact Image Sensor (CIS) is a new image sensor composed of a row of photoelectric sensing arrays, LED light source arrays, and lenticular lens arrays, which have the same width as the scanned original. The components are all integrated in a strip square box, no additional optical accessories are needed, the problems of light path adjustment, depth of field adjustment and the like are solved, and the strip square box is simple in structure, small in size and convenient to apply. In some applications, CIS sensors have incomparable advantages over CCD or cmos sensors. The device adopts a contact type photosensitive element (photosensitive sensor) to carry out photosensitive, 300-600 red, green and blue three-color LED (light emitting diode) sensors are tightly arranged together at a position of 1-2 mm below a scanning platform to generate a white light source, complex mechanisms such as a CCD array, a lens, a fluorescent tube, a cold cathode ray tube and the like in a CCD scanner are replaced, and the light, the machine and the electricity of the CCD scanner are integrated into a machine and an electricity of the CIS scanner. The method is widely applied to the fields of fax machines, scanners, paper currency sorting and changing and the like.

The aspect ratio of the layers used for pixel region isolation in the CIS process often exceeds 10:1, and as shown in fig. 1, the layers are micrographs of deep trenches formed in a certain CIS process. The aspect ratio of a representative level PXHP (P-type high-voltage isolation well) in a CIS of a 90nm node process is 8:1, and the aspect ratio of the representative level PXHP in the CIS of a 65nm node process is improved to 12:1, as shown in FIG. 2, with the continuous development of the CIS process, the depth and the width of the representative level PXHP are required to reach 15:1 or even higher.

And limited by the process window of the aerial image, the limit of the aspect ratio of single exposure of the common photoresist is 4:1, and the limit of the aspect ratio of single exposure of the CIS photoresist is 8: 1.

The CIS adopts the DET (Double Exposure technology), which can break through the limitation on the DOF of the depth of field of one Exposure, as shown in fig. 3, to enlarge the DOF and increase the process window, with a theoretical maximum aspect ratio limit of 16: 1.

Too many exposure times can influence the throughput on a production line, reduce the production efficiency and theoretically do not adopt three times of exposure.

The Single-Exposure Focus Enhancement efese (enhance Focus With Single Exposure) technology is enabled for improving DOF (Depth of Focus), but at the same time EL (Exposure latitude) is sacrificed, and the tool is also required to be equipped With this function.

Tilting of the wafer stage about the X-axis is equivalent to an elongated projection, while sacrificing contrast.

The larger the EFESE FR (Focus range), the larger the DOF, the smaller the EL, and at the same time the MEEF (Mask Error Enhancement Factor, defined as the slope of the photoresist line width (CD wafer) on the wafer as the pattern line width (CD Mask) on the Mask) also rises.

Another method is to use the shrink material of Merck, Germany, as shown in FIG. 4, to make a pattern with a certain aspect ratio, then apply a shrink material coating, and bake PEB after exposure to remove excess material, so as to obtain a pattern with a higher aspect ratio and obtain a gap CD exceeding the process limit of the current conditions. The method also requires a machine to be equipped with an independent unit, and the compatibility problem with other materials, the same layer and the drain region needs to be considered.

In another method, the high-strength flushing material is used, and after development, the high-strength flushing material flushing and deionized water flushing are added, so that the surface tension is reduced, and the process window of pattern collapse is increased, and in this way, the machine table is required to be provided with an independent unit.

Disclosure of Invention

The technical problem to be solved by the invention is to provide a photoetching process method for a pattern with an ultrahigh aspect ratio, wherein the pattern with the ultrahigh aspect ratio is formed by utilizing the existing machine equipment.

In order to solve the above problems, the photolithography process for forming a pattern with an ultra-high aspect ratio according to the present invention comprises:

the photoetching pattern is exposed by adopting a single exposure focusing enhancement technology based on a double exposure technology, and finally, the pattern with the ultra-high depth-to-width ratio is formed.

In a further improvement, the double exposure technology projects in two steps, and the aspect ratio of the finally formed pattern is the superposition of the two projections.

In a further improvement, the double exposure technology is superposed with the single exposure focus enhancement technology, the double exposure technology is carried out in two steps, each step is based on the double exposure technology, and the single exposure focus enhancement technology is superposed on the double exposure technology of each step, so that each projection graph of the double exposure technology is elongated again on the basis of the parameter characteristics of the projection graph.

In a further improvement, the photolithographic pattern further comprises a step of baking the PEB after exposure.

The further improvement is that the baking combines the single exposure focusing enhancement technology EFESE function equipped by the machine station, namely the wafer bearing platform is inclined around the X axis, the two times of inclined tilt-X exposure are carried out, and the two times of projections are fused together through the baking process after the powerful exposure, so that the graph with the ultra-high depth-to-width ratio is finally obtained.

In a further improvement, the formed ultrahigh-aspect-ratio pattern is a pattern with an aspect ratio of not less than 20: 1.

The photoetching process method of the pattern with the ultrahigh depth-to-width ratio, disclosed by the invention, combines the baking after the strong exposure through the superposition effect of the double exposure technology and the single exposure focusing enhancement technology, and superposes the projections of the two exposures together to finally form the photoetching pattern with the ultrahigh depth-to-width ratio.

Drawings

FIG. 1 is a cross-sectional micrograph of a high aspect ratio feature in a CIS process.

FIG. 2 is a graph illustrating that the larger the aspect ratio at different process nodes.

Fig. 3 is a schematic diagram of the double exposure technique DET.

FIG. 4 is a schematic diagram of using a shrink material to obtain ultra high aspect ratio features.

FIG. 5 is a schematic diagram of the operation of the present invention for performing a pattern exposure by integrating the double exposure technology DET with the single exposure focus enhancement EFESE technology.

FIG. 6 is a schematic block diagram of the present invention for pattern exposure using the dual exposure technique DET integrated with the single exposure focus enhancement EFESE technique.

Detailed Description

The double exposure technique refers to performing two exposures on a wafer covered with a photoresist, respectively. The two exposures were performed on the same photoresist, but using different reticles. After the two exposures, the wafer is baked and developed. The process flow is abbreviated as follows: photoresist spin coating-exposure 1-exposure 2-development-etching. Therefore, the double exposure is to expose twice on the same layer of photoresist, and the superposition of the light intensity of the two exposures generates the required pattern.

For example, a double exposure is used to achieve a 50nm 1:1 line: trenches realized by first exposure (period is 200 nm); the same pattern was exposed a second time, but the exposure pattern was shifted 100nm overall. After baking and development, a dense pattern of 50n/50nm will be obtained. The scheme has the advantages that each exposure only needs a pattern with a resolution period of 200nm, and the illumination condition of each exposure can be optimized according to the mask pattern; moreover, the same photoresist layer is used twice, and the process is simple. Since the wafer does not move on the workpiece table between exposures, the alignment error between exposures is small. However, double exposure also has the disadvantage that if the spatial contrast of the two-exposure image is low or the scattered light (flare) is very strong, the total intensity received for the areas not to be exposed will likely be higher than the resist protection threshold E0, resulting in all resist being developed. Therefore, the exposure system needs to provide a higher aerial image contrast. In addition, the reaction of the photoresist to the exposure energy must be highly nonlinear, and the superposition effect is almost zero, that is, when the exposure energy is less than a certain value, the loss of the photoresist is almost zero.

The double exposure technique enables patterns with a maximum aspect ratio of 16: 1.

Single exposure focus enhances the EFESE technique for improving the depth of field DOF, but at the same time sacrifices exposure latitude.

The photolithography technique of the pattern with ultra-high aspect ratio of the invention, as shown in fig. 5 and fig. 6, adopts double exposure technology as the basis for the photolithography pattern, and adopts single exposure focusing enhancement technology to expose the pattern, and finally forms the pattern with ultra-high aspect ratio.

The double exposure technology comprises two steps of projection, the double exposure technology of each step is superposed with the single exposure focusing enhancement technology, each step is based on the double exposure technology, and the single exposure focusing enhancement technology is superposed on the double exposure technology of each step, so that each projection graph of the double exposure technology is elongated again on the basis of the technical parameter characteristics of the double exposure. The aspect ratio of the finally formed pattern is the superposition of two projections.

And after the photoetching pattern is subjected to two exposures, baking after the exposure is carried out. The baking is carried out by combining the single exposure focusing enhancement technology EFESE function of the machine platform, namely tilting the wafer bearing platform around an X axis, carrying out twice tilting tilt-X exposure, and fusing the two projections together through a strong post-exposure baking process, so as to finally obtain the pattern with the depth-to-width ratio not less than 20:1 and the ultrahigh depth-to-width ratio.

The above are merely preferred embodiments of the present invention, and are not intended to limit the present invention. Various modifications and alterations to this invention will become apparent to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.