阅读说明：本技术 一种多频带的单刀双掷开关 (Multiband single-pole double-throw switch ) 是由 康凯 黄趾维 吴韵秋 赵晨曦 刘辉华 余益明 于 2020-12-16 设计创作，主要内容包括：本发明属于无线通信技术领域,提供一种多频带的单刀双掷开关,用以克服传统串并式开关结构存在的芯片版图面积大、插入损耗高等问题。本发明在传统串并结构的基础上,将片上电感并联在开关管所在支路上,片上电感与关断的晶体管所产生的寄生电容形成谐振在不同频段的并联谐振腔,实现单刀双掷开关功能的同时能够实现工作频段的多频带复用,不仅能够覆盖5G通信的所有频带,还能够实现工作频段的自由切换；同时,相较于传统串并式开关结构,本发明中两个通道间共用1个片上电感,大大减小片上电感的数量,显著的减小芯片版图面积、降低插入损耗。(The invention belongs to the technical field of wireless communication, and provides a multiband single-pole double-throw switch which is used for solving the problems of large chip layout area, high insertion loss and the like of a traditional series-parallel switch structure. On the basis of a traditional serial-parallel structure, an on-chip inductor is connected in parallel to a branch circuit where a switching tube is located, the on-chip inductor and a parasitic capacitor generated by a turned-off transistor form a parallel resonant cavity which resonates at different frequency bands, the single-pole double-throw switch can realize the multi-band multiplexing of the working frequency bands, not only can cover all frequency bands of 5G communication, but also can realize the free switching of the working frequency bands; meanwhile, compared with the traditional series-parallel switch structure, 1 on-chip inductor is shared between two channels, so that the number of the on-chip inductors is greatly reduced, the chip layout area is obviously reduced, and the insertion loss is reduced.)

1. A multi-band, single pole, double throw switch comprising: a transistor M1, a transistor M2, a transistor M3, a transistor M4, a transistor M5, a transistor M6 and a double-turn octagonal on-chip inductor; the power supply circuit is characterized in that the source electrode of the transistor M1 is connected with the source electrode of the transistor M2 and is used as a third port P3 of the single-pole double-throw switch, the drain electrode of the transistor M1 is connected with the drain electrode of the transistor M3 and is used as a first port P1 of the single-pole double-throw switch, the drain electrode of the transistor M2 is connected with the drain electrode of the transistor M4 and is used as a second port P2 of the single-pole double-throw switch, and the gate electrodes of the transistor M1 and the transistor M4 are connected with a control voltage V_cThe gate of the transistor M2 and the gate of the transistor M3 are connected to control voltageThe drains of the transistor M3 and the transistor M4 are grounded; the double-circle octagonal on-chip inductor is characterized in that two ends of the double-circle octagonal on-chip inductor are respectively connected to drains of the transistor M1 and the transistor M2 and formed by connecting an inner-circle octagonal on-chip inductor and an outer-circle octagonal on-chip inductor in parallel, openings are respectively formed in the inner-circle octagonal on-chip inductor and the outer-circle octagonal on-chip inductor, the opening end of the inner-circle octagonal on-chip inductor is respectively connected with a source electrode and a drain electrode of the transistor M5, the opening end of the outer-circle octagonal on-chip inductor is respectively connected with a source electrode and a drain electrode of the transistor M6, and grid electrodes of the transistor.

2. The multiple band single pole double throw switch of claim 1 wherein said switch is a single pole double throw switchThe control voltage V_cAt a high level, a control voltageWhen the voltage is low, the first port P1 to the third port P3 of the single-pole double-throw switch are turned on, and the second port P2 to the third port P3 of the single-pole double-throw switch are turned off; when controlling the voltage V_cAt a low level, a control voltageWhen the voltage level is high, the second port P2 to the third port P3 of the single-pole double-throw switch are turned on, and the first port P1 to the third port P3 are turned off.

3. The multiple band single pole double throw switch of claim 1 wherein the single pole double throw switch operates at a low frequency when both of the control voltages V _ SW1 and V _ SW2 are low; when the control voltage V _ SW1 is at high level and V _ SW2 is at low level, the single-pole double-throw switch works at intermediate frequency; when the control voltages V _ SW1 and V _ SW2 are both high, the single pole double throw switch operates in a high frequency state.

4. The multiple band single pole double throw switch of claim 1 wherein the inner octagonal patch inductor and the outer octagonal patch inductor have openings at the midpoint of the inductors.

5. The multi-band single pole double throw switch of claim 1 wherein transistors M1-M4 are all ac floating gate floating body technology.

Technical Field

The invention belongs to the technical field of wireless communication, relates to broadband and multiband millimeter wave technologies, and particularly relates to a multiband single-pole double-throw switch.

Background

With the popularization of wireless communication in our daily lives, the application of broadband and multiband millimeter wave technologies attracts more and more researchers' attention. In wireless communication, different communication standards specify different frequency bands for use, and broadband and multiband systems can enable multiple communication standards to use the same hardware to reduce costs. The ever-increasing demand for millimeter wave systems requires that front-end transceiver modules must be able to provide good RF performance and high integration at affordable cost; in general, most rf transceiver front-ends with a single antenna use a single-pole double-throw switch to switch the transmission and reception modes; the rf switch is a key module of the whole rf front end, and its insertion loss, isolation and linearity affect the whole performance of the rf link.

In order to realize a switch chip of broadband millimeter waves, many studies have been made in recent years. Most commonly used are series-parallel switch configurations with a series inductance as the matching element, as shown in fig. 1 (a); the circuit comprises four transistors and three inductors, wherein the transistor M₁And M₃Is a series switch tube, by adding a transistor M₂And M₄The isolation degree of the circuit is improved; however, the return loss and the insertion loss increase while the isolation is improved, which results in the bandwidth of the switching circuit being narrowed, and the inductor L is used to achieve the broadband matching effect₁、L₂、L₃Are added at three ports. Assume control voltage V_cAt low level, when the transistor M is at₁、M₄Off, equivalent to a capacitance C_off(ii) a Transistor M₂、M₃On, it is equivalent to a small resistance R_on(ii) a The circuit equivalent model at this time is shown in FIG. 1(b), ignoring the resistance R_on_M₁And a resistor R_on_M₂Then capacitance C_off_M₁And C_off_M₄Parallel connection is equivalent to a capacitor C₀(ii) a At this time, the inductance L₁Capacitor C₀Inductor L₂An L-C-L T-shaped matching network is formed, and the switch chip can realize higher bandwidth through the matching network. However, in the switch coreThe use of on-chip inductors for three ports of a chip also causes the following problems:

1) in order to realize broadband matching, on-chip inductors are added at three ports of a switch chip at the same time, the inductors are passive devices occupying the largest area in an integrated circuit, and the three inductors greatly increase the layout area of the chip and are not beneficial to cost control; in the front radio frequency transceiving section, if the occupied area of the switch is too large, the whole layout of the system is not facilitated;

2) compared with the III-V group compound process, the Q value of the passive device is lower, and the insertion loss of the switch can be increased by using more inductors in the standard silicon-based process; for a radio frequency transmitter, excessive insertion loss can reduce output power and affect efficiency; for the receiver, too large insertion loss introduces extra noise, affecting the system sensitivity.

Disclosure of Invention

The invention aims to solve the problems of the existing series-parallel single-pole double-throw switch with series inductance, and provides a novel multiband single-pole double-throw switch structure. The structure provided by the invention can cover all frequency bands of 5G communication, and meanwhile, compared with the traditional structure, the chip occupation area is smaller by sharing the inductor.

In order to achieve the purpose, the invention adopts the technical scheme that:

a multi-band, single pole, double throw switch comprising: a transistor M1, a transistor M2, a transistor M3, a transistor M4, a transistor M5, a transistor M6 and a double-turn octagonal on-chip inductor; the power supply circuit is characterized in that the source electrode of the transistor M1 is connected with the source electrode of the transistor M2 and is used as a third port P3 of the single-pole double-throw switch, the drain electrode of the transistor M1 is connected with the drain electrode of the transistor M3 and is used as a first port P1 of the single-pole double-throw switch, and the drain electrode of the transistor M2 is connected with the drain electrode of the transistor M4 and is used as a single-pole double-throw switchThe second port P2 of the throw switch, the transistor M1 and the gate of the transistor M4 are connected with a control voltage V_cThe gate of the transistor M2 and the gate of the transistor M3 are connected to control voltageThe drains of the transistor M3 and the transistor M4 are grounded; the double-circle octagonal on-chip inductor is characterized in that two ends of the double-circle octagonal on-chip inductor are respectively connected to drains of the transistor M1 and the transistor M2 and formed by connecting an inner-circle octagonal on-chip inductor and an outer-circle octagonal on-chip inductor in parallel, openings are respectively formed in the inner-circle octagonal on-chip inductor and the outer-circle octagonal on-chip inductor, the opening end of the inner-circle octagonal on-chip inductor is respectively connected with a source electrode and a drain electrode of the transistor M5, the opening end of the outer-circle octagonal on-chip inductor is respectively connected with a source electrode and a drain electrode of the transistor M6, and grid electrodes of the transistor.

Further, when the control voltage V is_cAt a high level, a control voltageWhen the voltage is low, the first port P1 to the third port P3 of the single-pole double-throw switch are turned on, and the second port P2 to the third port P3 of the single-pole double-throw switch are turned off; when controlling the voltage V_cAt a low level, a control voltageWhen the voltage level is high, the second port P2 to the third port P3 of the single-pole double-throw switch are turned on, and the first port P1 to the third port P3 are turned off.

Further, when the control voltages V _ SW1 and V _ SW2 are both low, the single-pole double-throw switch operates in a low-frequency state; when the control voltage V _ SW1 is at high level and V _ SW2 is at low level, the single-pole double-throw switch works at intermediate frequency; when the control voltages V _ SW1 and V _ SW2 are both high, the single pole double throw switch operates in a high frequency state.

Furthermore, the inner ring octagonal chip inductor and the outer ring octagonal chip inductor are provided with openings which are opened at the midpoint of the inductors.

Furthermore, the transistors M1-M4 all adopt an alternating current floating gate floating body technology.

The invention has the beneficial effects that:

the invention provides a multiband single-pole double-throw switch, which is structurally characterized in that an on-chip inductor is connected in parallel to a branch circuit where a switch tube is arranged on the basis of a traditional series-parallel structure, and the on-chip inductor and a parasitic capacitor generated by a turned-off transistor form a parallel resonant cavity which resonates at different frequency bands, so that the multiband multiplexing of working frequency bands can be realized while the function of the single-pole double-throw switch is realized; compared with the traditional series-parallel switch structure, the two channels share 1 on-chip inductor, so that the number of the on-chip inductors is greatly reduced, and the chip layout area and the insertion loss are obviously reduced; meanwhile, the double-circle octagonal on-chip inductor is obtained through the innovative design of the on-chip inductor, the on-off of the inner/outer circle octagonal on-chip inductor is controlled through the transistor, the inductance value of the on-chip inductor is further adjusted, the free switching of high/medium/low frequency bands is realized, namely, the multiplexing of a plurality of frequency bands is realized, and the design complexity of the radio frequency front-end circuit is greatly reduced.

In summary, the present invention provides a multiband single-pole double-throw switch, which not only can cover all frequency bands of 5G communication, but also can realize free switching of working frequency bands; meanwhile, the chip layout area is smaller, and the insertion loss is smaller.

Drawings

Fig. 1 is a schematic diagram of a conventional series-parallel single-pole double-throw switch with a series inductor, wherein (a) is a schematic circuit diagram and (b) is an equivalent circuit diagram.

Fig. 2 is a schematic diagram of a multi-band single pole double throw switch circuit according to the present invention.

Fig. 3 is an equivalent circuit diagram of the multi-band single pole double throw switch proposed by the present invention.

Fig. 4 is a diagram of simulation results of low frequency of the spdt switch according to the embodiment of the present invention, wherein (a) is insertion loss and (b) is return loss.

Fig. 5 is a diagram showing simulation results of the if of the spdt switch according to the embodiment of the present invention, wherein (a) is insertion loss and (b) is return loss.

Fig. 6 is a diagram of simulation results of high frequency of the spdt switch according to the embodiment of the present invention, wherein (a) is insertion loss and (b) is return loss.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples.

The embodiment provides a novel multiband single-pole double-throw switch structure, which can be switched to different use frequency bands through different switch signals; compared with the traditional series-parallel single-pole double-throw switch with the series inductor, the series-parallel single-pole double-throw switch has smaller chip area and insertion loss.

A schematic circuit diagram of the multiband single-pole double-throw switch is shown in fig. 2, and specifically includes: transistors M1-M6 and a double-turn octagonal on-chip inductor; the transistor M1 and the transistor M2 are used as switching tubes for selecting signal paths, namely selecting the communication from the port P1 to the port P3 or the communication from the port P2 to the port P3; the transistor M3 and the transistor M4 are parallel transistors and are used for improving the isolation between the ports of the switch circuit which are not conducted with each other; the transistor M5 and the transistor M6 are used for controlling the double-turn octagonal on-chip inductor formed by the top metal and selecting different working frequency bands;

more specifically: the source of the transistor M1 is connected with the source of the transistor M2 and is used as the third port P3 of the single-pole double-throw switch, the drain of the transistor M1 is connected with the drain of the transistor M3 and is used as the first port P1 of the single-pole double-throw switch, the drain of the transistor M2 is connected with the drain of the transistor M4 and is used as the second port P2 of the single-pole double-throw switch, and the gate of the transistor M1 and the gate of the transistor M4 are connected with the control voltage V_cThe gate of the transistor M2 and the gate of the transistor M3 are connected to control voltageThe drains of the transistor M3 and the transistor M4 are grounded; the double-circle octagonal on-chip inductor is formed by connecting a large octagonal on-chip inductor and a small octagonal on-chip inductor in parallel, namely the inner circle octagonal on-chip inductor (small) is connected with the outer circle octagonal on-chip inductor (large) in parallel, and two ends of the inductor are respectively connected with the drains of the transistor M1 and the transistor M2 after the inductor is connected in parallel; the inner ring octagonal sheetThe upper inductor and the outer ring of octagonal on-chip inductor are respectively provided with an opening, the opening ends of the inner ring of octagonal on-chip inductor are respectively connected with the source electrode and the drain electrode of the transistor M5, the opening ends of the outer ring of octagonal on-chip inductor are respectively connected with the source electrode and the drain electrode of the transistor M6, and the gates of the transistor M5 and the transistor M6 are respectively connected with control voltages V _ SW1 and V _ SW 2.

In this embodiment, the openings of the inner octagonal chip inductor and the outer octagonal chip inductor are both opened at the midpoint of the inductors, but the positions of the openings are not necessarily located at the midpoint. The transistors M1-M4 all adopt an alternating current floating gate floating body technology, namely, a grid is connected with control voltage through a resistor, and a substrate is grounded through a resistor. The transistors M1-M6 are all NMOS transistors.

In terms of working principle:

1) single-pole double-throw switch

When controlling the voltage V_cIs at a high level,When the voltage is low, the transistors M1 and M4 are turned on and equivalent to small resistors, the transistors M2 and M3 are turned off, and the transistors M2 and M3 are equivalent to capacitors due to the parasitic capacitance of the transistors; at this time, the port P1 is turned on to the port P3, the port P2 is turned off to the port P3, and the equivalent circuit schematic diagram is shown in FIG. 3; the signal flows from P1 through small resistor R_onM1 into port P3; and between the port P1 and the port P2, a capacitor C_offThe working frequency of a resonant cavity formed by the M2 and the inductor L forms a high impedance state to block a signal from flowing into the port P2; even if there is signal leakage to the port P2, it passes through the on-resistance R_onM4 flows into ground plane. Similarly, when the control voltage V_cIs at a low level,At high level, the transistors M2 and M3 are turned on and are equivalently small resistors, the transistors M1 and M4 are turned off and are equivalently capacitors, and at this time, the port P2 to the port P3 are turned on, and the port P1 to the port P3 are turned off.

Meanwhile, the structure has the advantages that the inductor is connected between the transistor M1 and the transistor M2 in parallel, so that the switch can share the same inductor L when two channels are switched, the layout area of a chip is effectively reduced, and the cost is saved.

2) Multiband selection

As can be seen from the schematic circuit diagram of the single-pole double-throw switch shown in fig. 2, the circuit can select different operating frequency bands by controlling the voltage V _ SW1 and the voltage V _ SW 2; the method comprises the following specific steps:

when the control voltages V _ SW1 and V _ SW2 are both at low level, the transistors M5 and M6 are turned off, the inductor is turned off, the circuit operates in a low frequency state, and the capacitance generated by the turned-off transistors is negligible; the insertion loss of the single-pole double-throw switch circuit, the return loss of the P1 port and the return loss of the P2 port are shown in figure 4, and it can be seen from the figure that the insertion loss of the single-pole double-throw switch is less than 0.8dB and the return loss of the port is more than 12dB within the frequency range of 0-10 GHz;

when the control voltage V _ SW1 is high level and V _ SW2 is low level, the transistor M5 is turned on and the transistor M6 is turned off, at this time, the inductance value of the double-coil octagonal switch circuit is large and is represented as an inner-coil inductor, and the single-pole double-throw switch circuit works near 28GHz, namely, in an intermediate frequency state; at this time, the insertion loss of the single-pole double-throw switch circuit, the return loss of the P1 port and the return loss of the P2 port are shown in FIG. 5, and it can be seen from the figure that the insertion loss of the single-pole double-throw switch is less than 1.9dB, the minimum insertion loss is 1.6dB, and the return loss of the port is greater than 12dB in the frequency range of 22-32 GHz;

when the control voltages V _ SW1 and V _ SW2 are both high level, the transistors M5 and M6 are simultaneously conducted, at the moment, the double-coil octagonal inductor is formed by connecting an inner coil and an outer coil in parallel, the inductance value is small, a resonant cavity formed by a switch-off capacitor and the octagonal inductor resonates near high frequency 38GHz, namely, the circuit works in a high-frequency state; at this time, the insertion loss of the single-pole double-throw switch circuit, the return loss of the P1 port and the return loss of the P2 port are shown in FIG. 6, and it can be seen from the figure that the insertion loss of the single-pole double-throw switch is less than 2dB and the return loss of the port is greater than 12dB in the frequency range of 36-42 GHz;

therefore, the on-off of the inductor on the inner/outer ring octagon chip is controlled by the transistor, the inductance value of the on-chip inductor can be adjusted, and further, the free switching of high/medium/low frequency bands is realized, namely, the multiplexing of a plurality of frequency bands is realized, and the design complexity of the radio frequency front-end circuit is greatly reduced.

While the invention has been described with reference to specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise; all of the disclosed features, or all of the method or process steps, may be combined in any combination, except mutually exclusive features and/or steps.