阅读说明：本技术 M3c的控制方法及终端设备 (M3C control method and terminal equipment ) 是由 宋文乐 王磊 郝翔宇 苏嘉成 宫宁 于 2020-12-30 设计创作，主要内容包括：本发明适用于变换器技术领域,公开了一种M3C的控制方法及终端设备,M3C包括3个子变换器,每个子变换器包括3个桥臂,每个桥臂包括多个H桥；上述方法包括：针对每个子变换器的每个桥臂,获取桥臂的每个H桥的电容电压；针对每个子变换器的每个桥臂,确定桥臂的期望电压,并根据桥臂的期望电压和桥臂的每个H桥的电容电压控制桥臂的每个H桥的通断。本发明通过上述方法来对M3C进行控制,控制方法比较简单。(The invention is suitable for the technical field of converters, and discloses a control method and terminal equipment of M3C, wherein M3C comprises 3 sub-converters, each sub-converter comprises 3 bridge arms, and each bridge arm comprises a plurality of H bridges; the method comprises the following steps: acquiring the capacitance voltage of each H bridge of the bridge arms aiming at each bridge arm of each sub-converter; and determining the expected voltage of each bridge arm aiming at each bridge arm of each sub-converter, and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms. The invention controls M3C by the method, and the control method is relatively simple.)

1. A control method of M3C, wherein the M3C includes 3 sub-converters, each sub-converter includes 3 legs, each leg includes a plurality of H-bridges; the control method of the M3C comprises the following steps:

for each bridge arm of each sub-converter, acquiring the capacitance voltage of each H bridge of the bridge arms;

and determining the expected voltage of each bridge arm of each sub-converter, and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms.

2. The M3C control method according to claim 1, wherein the controlling the on/off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms comprises:

sequencing the capacitor voltage of each H bridge of the bridge arms to obtain sequenced capacitor voltages;

calculating the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages of the sorted capacitor voltages;

if the expected voltage of the bridge arm is between the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages, controlling the H bridges corresponding to the first M capacitor voltages to be on, controlling the H bridges corresponding to the (M + 2) th to the (N) th capacitor voltages to be off, determining the duty ratio of a control signal of the H bridge corresponding to the (M + 1) th capacitor voltage according to the expected voltage of the bridge arm and the (M + 2) th to the (N) th capacitor voltages, and controlling the H bridge corresponding to the (M + 1) th capacitor voltage to be on or off according to the duty ratio; wherein N is the number of H bridges of the bridge arm, and M is more than or equal to 1 and less than N.

3. The M3C control method according to claim 2, wherein the determining the duty ratio of the control signal of the H bridge corresponding to the M +1 th capacitor voltage according to the desired voltage of the bridge arm and the M +2 th to N capacitor voltages includes:

according toDetermining the duty ratio a of a control signal of an H bridge corresponding to the M +1 th capacitor voltage;

wherein u is_armThe expected voltage of the bridge arm; u. of_c(M+1)The voltage of the M +1 capacitor; u. of_ckIs the kth capacitor voltage.

4. The M3C control method of any one of claims 1-3, wherein the determining the desired voltage for the leg includes:

acquiring an input voltage value of the bridge arm;

acquiring the three-phase output current value of the M3C, and determining the output voltage reference value of the bridge arm according to the three-phase output current value of the M3C;

acquiring the three-phase input current of the sub-converter to which the bridge arm belongs and the input current reference value of the M3C, and determining the input voltage reference value of the bridge arm according to the three-phase input current of the sub-converter to which the bridge arm belongs and the input current reference value of the M3C;

acquiring a target voltage reference value;

and determining the expected voltage of the bridge arm according to the input voltage value of the bridge arm, the output voltage reference value of the bridge arm, the input voltage reference value of the bridge arm and the target voltage reference value.

5. The M3C control method according to claim 4, wherein the determining the desired voltage of the leg according to the input voltage value of the leg, the output voltage reference value of the leg, the input voltage reference value of the leg, and the target voltage reference value comprises:

and subtracting the output voltage reference value of the bridge arm, the input voltage reference value of the bridge arm and the target voltage reference value from the input voltage value of the bridge arm in sequence to obtain the expected voltage of the bridge arm.

6. A control apparatus of M3C, wherein the M3C includes 3 sub-converters, each sub-converter includes 3 bridge arms, each bridge arm includes a plurality of H-bridges;

the control device of the M3C comprises:

the acquisition module is used for acquiring the capacitance voltage of each H bridge of each bridge arm aiming at each bridge arm of each sub-converter;

and the control module is used for determining the expected voltage of each bridge arm of each sub-converter and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms.

7. The M3C control device of claim 6, wherein the control module is further configured to:

sequencing the capacitor voltage of each H bridge of the bridge arms to obtain sequenced capacitor voltages;

calculating the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages of the sorted capacitor voltages;

if the expected voltage of the bridge arm is between the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages, controlling the H bridges corresponding to the first M capacitor voltages to be on, controlling the H bridges corresponding to the (M + 2) th to the (N) th capacitor voltages to be off, determining the duty ratio of a control signal of the H bridge corresponding to the (M + 1) th capacitor voltage according to the expected voltage of the bridge arm and the (M + 2) th to the (N) th capacitor voltages, and controlling the H bridge corresponding to the (M + 1) th capacitor voltage to be on or off according to the duty ratio; wherein N is the number of H bridges of the bridge arm, and M is more than or equal to 1 and less than N.

8. The M3C control device of claim 7, wherein the control module is further configured to:

according toDetermining the duty ratio a of a control signal of an H bridge corresponding to the M +1 th capacitor voltage;

wherein u is_armThe expected voltage of the bridge arm; u. of_c(M+1)The voltage of the M +1 capacitor; u. of_ckIs the kth capacitor voltage.

9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the control method of M3C according to any one of claims 1 to 5 when executing the computer program.

10. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program which, when executed by one or more processors, implements the steps of the control method of M3C according to any one of claims 1 to 5.

Technical Field

The invention belongs to the technical field of converters, and particularly relates to a control method of M3C and terminal equipment.

Background

The topology of M3C (modular multilevel matrix converters) is shown in fig. 1. The main structure of M3C is a novel H-bridge cascade matrix converter, a 3 x 3 structure of 9 bridge arms is arranged between three-phase input and three-phase output, and the circuit parameters of each bridge arm are equal and are symmetrical and independent. M3C is as the novel converter based on power electronics, is used for the core equipment of the convertor station of marine low frequency transmission, and the electric current of high pressure low frequency converts the electric current of high pressure power frequency into and merges the electric current of high pressure power frequency into the electric wire netting. M3C has the frequency conversion more freely with the converter of traditional transistor and semi-controlled device, is not restricted to the multiple of power frequency, and the ripple that produces is few advantage.

At present, various methods for controlling M3C exist, but the existing methods for controlling M3C are all relatively complex.

Disclosure of Invention

In view of this, embodiments of the present invention provide a control method of M3C and a terminal device, so as to solve the problem that the control method of M3C in the prior art is relatively complex.

A first aspect of the embodiments of the present invention provides a control method of M3C, where M3C includes 3 sub-converters, each sub-converter includes 3 bridge arms, and each bridge arm includes multiple H bridges; the control method of M3C includes:

acquiring the capacitance voltage of each H bridge of the bridge arms aiming at each bridge arm of each sub-converter;

and determining the expected voltage of each bridge arm aiming at each bridge arm of each sub-converter, and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms.

A second aspect of an embodiment of the present invention provides a control apparatus of M3C, where M3C includes 3 sub-converters, each sub-converter includes 3 bridge arms, and each bridge arm includes multiple H-bridges;

the control device of M3C includes:

the acquisition module is used for acquiring the capacitance voltage of each H bridge of the bridge arms aiming at each bridge arm of each sub-converter;

and the control module is used for determining the expected voltage of each bridge arm of each sub-converter and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms.

A third aspect of the embodiments of the present invention provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the control method of M3C according to the first aspect when executing the computer program.

A fourth aspect of embodiments of the present invention provides a computer-readable storage medium storing a computer program, which when executed by one or more processors implements the steps of the control method of M3C as described in the first aspect.

Compared with the prior art, the embodiment of the invention has the following beneficial effects: according to the embodiment of the invention, the capacitance voltage of each H bridge of the bridge arms is obtained by aiming at each bridge arm of each sub-converter; and determining the expected voltage of each bridge arm of each sub-converter, and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms to control M3C, wherein the control method is simple.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

FIG. 1 is a schematic of the topology of M3C;

fig. 2 is a schematic flow chart illustrating an implementation of a control method of M3C according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a topology of a sub-converter according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of determining a desired voltage for a bridge leg according to one embodiment of the present invention;

FIG. 5 is a schematic diagram of determining an output voltage reference of a bridge arm according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of determining an input voltage reference value of a bridge arm according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of horizontal balancing control of a sub-converter provided in accordance with an embodiment of the present invention;

FIG. 8 is a schematic diagram of vertical balance control of a sub-converter provided in accordance with an embodiment of the present invention;

FIG. 9 is a schematic diagram illustrating the calculation of the unbalance amount and the average value of the bridge arm capacitor voltage according to an embodiment of the present invention;

fig. 10 is a schematic diagram of a control device of M3C according to an embodiment of the present invention;

fig. 11 is a schematic block diagram of a terminal device according to an embodiment of the present invention.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

In order to explain the technical means of the present invention, the following description will be given by way of specific examples.

Fig. 2 is a schematic flow chart of an implementation of the M3C control method according to an embodiment of the present invention, and for convenience of description, only the parts related to the embodiment of the present invention are shown. The execution main body of the embodiment of the invention can be terminal equipment.

Referring to fig. 1, M3C includes 3 sub-converters, each including 3 legs, each leg including a plurality of H-bridges.

Referring to fig. 2, the method may include the steps of:

s101: and acquiring the capacitance voltage of each H bridge of the bridge arms aiming at each bridge arm of each sub-converter.

S102: and determining the expected voltage of each bridge arm aiming at each bridge arm of each sub-converter, and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms.

In fig. 1, the 3 sub-transformers are subselector 1, subselector 2, and subselector 3, respectively; the cell is an H bridge. Fig. 1 shows an M3C topology with bridge arm inductances, each bridge arm can be regarded as a controllable current source because of the inductance, and two three-phase systems are connected across the bridge arm. The structure of three legs connected to the same output node or input point is called a sub-converter, and M3C is divided into the three sub-converters shown for ease of analysis. Each of the three sub-converters of M3C is a static synchronous compensator formed by cascading N H-bridges and is connected to a central point. Connecting two connecting points N in M3C topology_eAnd N_aAfter connection, the three sub-transducers are independent of each other, so that one sub-transducer can be analyzed independently, as shown in fig. 3, and fig. 3 shows a structural schematic diagram of subconverter 1. Subresolver 1 will be referred to as a first sub-transformer in the following process.

In fig. 3, the input-side inductance L is omitted_eAnd according to symmetry, an output current i flows in each bridge arm_a1One third of the above, the current relationship of each bridge arm is:

wherein i₁₁、i₂₁And i₃₁Actual values of input currents respectively corresponding to three bridge arms in the first sub-converter; i.e. i_e11、i_e21And i_e31Actual values of output currents respectively corresponding to three bridge arms in the first sub-converter; i is_e11、I_e21And I_e31Effective values of output currents respectively corresponding to three bridge arms in the first sub-converter; omega_e、Are respectively i_e11Angular frequency and phase angle of; i.e. i_a1Is the output current of the first sub-converter.

Converting input and output currents to α β 0 coordinates, i_e1α，i_e1β，i_a1Input currents i respectively corresponding to three bridge arms₁₁，i₂₁And i₃₁α β 0 component of (a):

T_1,3→αβ0for the transformation matrix, specifically:

from the above formula, the output current i_a1Is a three bridge arm current i₁₁，i₂₁And i₃₁Thus the output current and input current component i_e1αAnd i_e1βIs linearly independent. The expressions of the three voltage loops are:

wherein L is bridge arm inductance; l is_aIs a load inductance; r_aIs a load resistor;is bridge arm current u_a1Is the output voltage of the voltage source,is the load inductor current i_aLoad resistance current, u_q1Is the equivalent voltage source voltage.

And converting the voltage loop expression by alpha beta 0 to obtain:

the output current expression can be obtained through the formula:

according to the formula, the input current can be controlled by adjusting the inductance of each bridge arm, and the output current can be controlled by adjusting the load inductance. The same holds for the other two sub-converter equations, so that the output current i can be controlled in the α β 0 coordinate system_a1，i_a2And i_a3。

The M3C bridge arm comprises N cascaded H-bridge units, and each unit is provided with an energy storage capacitor. The energy storage capacitor does not provide energy, so the bridge arm can only transmit reactive power, and the energy of the bridge arm needs to maintain a constant average value. The instantaneous power of one bridge arm in a steady state is as follows:

wherein, U_eAnd ω_eRespectively representing the effective value and angular frequency of the input voltage of the bridge arm; u shape_a、ω_aAnd gamma is the effective value, angular frequency and phase angle of the bridge arm output voltage respectively; i is_eAndrespectively the effective value and phase angle, I, of the input current of the bridge arm_aAndrespectively is the effective value and phase angle of the output current of the bridge arm, and the input reactive power isOutput reactive power ofWhen the output frequency f_aWhen the value is 0, the added reactive power isThe reactive power of the three sub-converters is different and only related to the angle gamma of the output space vector. The unbalance of reactive power does not affect the converter control and only the thermal design.

In an embodiment of the present invention, the controlling the on/off of each H-bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitor voltage of each H-bridge of the bridge arms includes:

sequencing the capacitor voltage of each H bridge of the bridge arms to obtain sequenced capacitor voltages;

calculating the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages of the sorted capacitor voltages;

if the expected voltage of the bridge arm is between the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages, controlling the H bridges corresponding to the first M capacitor voltages to be on, controlling the H bridges corresponding to the (M + 2) th to the (N) th capacitor voltages to be off, determining the duty ratio of a control signal of the H bridge corresponding to the (M + 1) th capacitor voltage according to the expected voltage of the bridge arm and the (M + 2) th to the (N) th capacitor voltages, and controlling the H bridge corresponding to the (M + 1) th capacitor voltage to be on or off according to the duty ratio; wherein N is the number of H bridges of bridge arms, and M is more than or equal to 1 and less than or equal to M.

In an embodiment of the present invention, the determining the duty ratio of the control signal of the H-bridge corresponding to the M +1 th capacitor voltage according to the expected voltage of the bridge arm and the M +2 th to N th capacitor voltages includes:

according toDetermining the duty ratio a of a control signal of an H bridge corresponding to the M +1 th capacitor voltage;

wherein u is_armIs the desired voltage of the bridge arm; u. of_c(M+1)The voltage of the M +1 capacitor; u. of_ckIs the kth capacitor voltage.

Specifically, the bridge arm voltage of each bridge arm is generated by superposing capacitor voltages of the H-bridge, and each sub-converter can control the voltage of each bridge arm by one modulation module.

When the voltage and the current of the bridge arms are in the same direction, sorting the capacitor voltage of each H bridge of the bridge arms according to an ascending order to obtain sorted capacitor voltages; and when the voltage and the current of the bridge arms are opposite, sequencing the capacitor voltage of each H bridge of the bridge arms according to a descending order to obtain the sequenced capacitor voltage. The voltage and the current are in the same direction, namely, the current flows into the bridge arm from the high-voltage end of the bridge arm.

In order to make the superposed voltages of the H-bridge capacitors exactly equal to the expected voltages of the bridge arms, it is necessary to control the on-off of each H-bridge according to the expected voltages of the bridge arms, so that the H-bridge capacitors appear to participate in the establishment of the bridge arm voltages and do not participate in the establishment of the voltages on the circuit, and logically represent the participating establishment of the voltages as 1 and do not participate in the establishment of the voltages as 0.

Specifically, setting an M initial value to be 1, and calculating the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages; and if the expected voltage of the bridge arm is not between the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages, adding 1 to M, and continuously calculating the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages until the expected voltage of the bridge arm is between the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages. At this time, it can be determined that all the H bridges corresponding to the first M capacitor voltages in the sorted capacitor voltages are turned on, all the H bridges corresponding to the M +2 th to N capacitor voltages are turned off, and the access condition of the M +1 th capacitor voltage is controlled by controlling the duty ratio of the control signal of the H bridge corresponding to the M +1 th capacitor voltage, so that the capacitor voltages of the H bridges are superposed to be exactly equal to the expected voltage of the bridge arms. The calculation formula of the duty ratio is shown as the above formula.

When a capacitor with smaller voltage is connected, the current of a bridge arm is input to charge the connected capacitor, and the voltage of the capacitor which does not participate in voltage establishment is unchanged; when a capacitor with larger voltage is connected, the current input into the bridge arm is opposite to the direction of the voltage of the bridge arm, and the connected capacitor is reversely charged, so that the voltage of the capacitor is reduced. Therefore, the voltage balance between the bridge arms H-bridge can be maintained using the above method.

In an embodiment of the present invention, the determining the desired voltage of the bridge arm includes:

acquiring an input voltage value of a bridge arm;

acquiring a three-phase output current value of M3C, and determining an output voltage reference value of a bridge arm according to the three-phase output current value of M3C;

acquiring three-phase input current of a sub-converter to which a bridge arm belongs and an input current reference value of M3C, and determining an input voltage reference value of the bridge arm according to the three-phase input current of the sub-converter to which the bridge arm belongs and the input current reference value of M3C;

acquiring a target voltage reference value;

and determining the expected voltage of the bridge arm according to the input voltage value of the bridge arm, the output voltage reference value of the bridge arm, the input voltage reference value of the bridge arm and the target voltage reference value.

In an embodiment of the present invention, the determining the expected voltage of the bridge arm according to the input voltage value of the bridge arm, the output voltage reference value of the bridge arm, the input voltage reference value of the bridge arm, and the target voltage reference value includes:

and subtracting the output voltage reference value of the bridge arm, the input voltage reference value of the bridge arm and the target voltage reference value from the input voltage value of the bridge arm in sequence to obtain the expected voltage of the bridge arm.

In particular, referring to fig. 4, fig. 4 shows a calculation process of the desired voltages of the individual legs of the first sub-converter. The first sub-converter subconverter 1 comprises three bridge arms, arm11, arm21 and arm31, u_cx1jThe capacitance voltage of the jth H bridge of the xth bridge arm is 1, 2, 3; j ═ 1, 2, …, N;the expected voltage of the x bridge arm; g_x1jIs the on-off condition of the jth H bridge of the xth bridge arm, g_x1j1 denotes on, g_x1j0 indicates open. u. of_e1，u_e2And u_e3The input voltage values of the three bridge arms can be obtained by measurement, and as can be seen from fig. 1 and 3, u_e1，u_e2And u_e3Also the three-phase input voltage value of M3C.The reference value of the output voltage of the bridge arm;andinput voltage reference values of three bridge arms are respectively obtained;is the target voltage reference value.

Referring to fig. 4, the expected voltage of the bridge arms may be determined according to the input voltage value, the output voltage reference value, the input voltage reference value, and the target voltage reference value of each bridge arm.

The specific process of determining the output voltage reference value of the bridge arm according to the three-phase output current value of M3C can be seen in fig. 5. As shown in FIG. 5, the three-phase output current value i for M3C_a1、i_a1And i_a1Simultaneously, the three sub-converters respectively perform corresponding output current values to perform coordinate transformation, specifically, the three-phase static coordinate system is transformed to the two-phase static coordinate system, and then the two-phase static coordinate system is transformed to the two-phase synchronous rotating coordinate system to obtain an output current d-axis component i_adAnd an output current q-axis component i_aq. Then, the d-axis component reference value of the output current is calculatedSubtract i_adThe obtained first difference value inputThe PI controller obtains a first control value; reference value of q-axis component of output currentSubtract i_aqAnd inputting the obtained second difference value into the PI controller to obtain a second control value.Inputting the obtained first product value into a filter L to obtain a third control value;the obtained second product value is input to the filter L to obtain a fourth control value. Subtracting the fourth control value from the first control value to obtain the reference value of the d-axis component of the output voltageThe second control value is added with the third control value to obtain the reference value of the q-axis component of the output voltageTo pairAndrespectively carrying out conversion from a two-phase synchronous rotating coordinate system to a two-phase static coordinate system and conversion from the two-phase static coordinate system to a three-phase static coordinate system to obtain output voltage reference values of three bridge armsAnd

three-phase output current i_a1，i_a2And i_a3Firstly, converting the data into fixed dq coordinates through two times of conversion, then eliminating cross coupling through a pair of PI controllers with feedforward, and finally, performing two times of conversionAnd inverse transformation is carried out to obtain an output voltage reference value to control the bridge arm voltage.

The specific process of acquiring the three-phase input current of the sub-converter to which the bridge arm belongs and the input current reference value of M3C, and determining the input voltage reference value of the bridge arm according to the three-phase input current of the sub-converter to which the bridge arm belongs and the input current reference value of M3C is shown in fig. 6.

In fig. 6, the input currents of the three sub-converters are independently controlled by the three controllers, and are firstly converted to the α β 0 coordinate and then controlled by the proportional controller. The required inputs to the controller are: and the three-phase input current of the sub-converter with the bridge arm and the input current reference value of M3C. Three-phase input current of the sub-converter, i.e. input current of each leg of the sub-converter is i_x1. The input current reference value of M3C comprises a positive sequence input d-axis reference current valuePositive sequence input q-axis reference current valueNegative sequence input d-axis reference current valueAnd negative sequence input q-axis reference current value

Specifically, a d-axis reference current value is input in a positive sequencePositive sequence input q-axis reference current valueTransformed into α β 0 coordinates by the following equation:

andcan be derived from a horizontal balance control loop, see in particular fig. 7.

Negative sequence input d-axis reference current valueAnd negative sequence input q-axis reference current valueVertical balancing for the sub-transducers, to α β 0 coordinates via the following equation:

converting three-phase input current of the sub-converter into alpha beta 0 coordinate to obtain i_e1αAnd i_e1β。

As shown in figure 6 of the drawings,inputting the obtained value into a proportional controller to obtain a fifth control value;inputting the obtained value into a proportional controller to obtain a sixth control value; and converting the fifth control value and the sixth control value from a two-phase static coordinate system to a three-phase static coordinate system to obtain the output voltage reference value of each bridge arm.

Fig. 8 shows a schematic diagram of the vertical balance control of the sub-converter. The fourth component three-phase output voltage sum of the expected voltage of the calculated bridge arm in the figure 4 is generated at the same time in the vertical balance control link

In fig. 7 and 8, the filter represents a filter, and the block following the filter represents a PI controller.

The horizontal balance control and the vertical balance control are performed on bridge arm voltages, and the process is to obtain an average value u after two times of alpha and beta decoupling transformation are performed on nine-arm voltages_c00And eight unbalance amounts for horizontal and vertical control. Each α β 0 transform is similar to the following formula, and the transformation process can be seen in fig. 9.

After transformation, the following four types of unbalance are obtained:

(1)u_c0αand u_c0βThe amount of unbalance between the bridge arm voltages of each row between the three sub-converters is described.

(2)u_cααAnd u_cαβThe α component of the vertical unbalance amount is described.

(3)u_cβαAnd u_cββThe β component of the vertical unbalance is described.

(4)u_cα0And u_cβ0The zero sequence component of the vertical unbalance is described.

The advantage of using the dual α β 0 decoupled transform approach to control M3C is that the average energy control only needs to control the dc component when the converter is in steady state operation. In the course of the converter reaching equilibrium, only a small number of frequencies are input frequencies f_eThe alternating current component needs to be filtered, and the high dynamic range and the steady-state stability of the PI controller can be guaranteed. For horizontal balance control, only the double output frequency 2 needs to be filtered_aBy applying a positive sequence component current i_e1dp，i_e2dpAnd i_e3dpDistributed to its corresponding sub-converter to hold u_c0αAnd u_c0βIs 0. For vertical balance control, a special method is needed to maintain the input current i_e1，i_e2And i_e3Only the positive sequence component is included. The four controllers shown in fig. 5-8 generate the offset for three sub-controllersThe converter is vertically unbalanced with negative sequence current.

As can be seen from the above description, in the embodiments of the present invention, the capacitance voltage of each H-bridge of the bridge arms is obtained for each bridge arm of each sub-converter; and determining the expected voltage of each bridge arm of each sub-converter, and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms to control M3C, wherein the control method is simple.

It should be noted that the voltage value described in the embodiment of the present invention may be a voltage signal, the current value may be a current signal, and the reference value may be a reference signal.

It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.

Corresponding to the control method of M3C, an embodiment of the present invention further provides a control apparatus of M3C, which has the same beneficial effects as the control method of M3C. Fig. 9 is a schematic block diagram of a control device of M3C according to an embodiment of the present invention, and only the parts related to the embodiment of the present invention are shown for convenience of description.

In an embodiment of the present invention, M3C includes 3 sub-converters, each sub-converter including 3 legs, each leg including a plurality of H-bridges; control device 30 of M3C may include an acquisition module 301 and a control module 302.

The obtaining module 301 is configured to obtain, for each bridge arm of each sub-converter, a capacitance voltage of each H-bridge of the bridge arm;

and the control module 302 is configured to determine an expected voltage of each bridge arm for each sub-converter, and control on/off of each H-bridge of the bridge arms according to the expected voltage of the bridge arm and a capacitor voltage of each H-bridge of the bridge arms.

Optionally, the control module 302 is further configured to:

sequencing the capacitor voltage of each H bridge of the bridge arms to obtain sequenced capacitor voltages;

calculating the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages of the sorted capacitor voltages;

if the expected voltage of the bridge arm is between the sum of the first M capacitor voltages and the sum of the first M +1 capacitor voltages, controlling the H bridges corresponding to the first M capacitor voltages to be on, controlling the H bridges corresponding to the (M + 2) th to the (N) th capacitor voltages to be off, determining the duty ratio of a control signal of the H bridge corresponding to the (M + 1) th capacitor voltage according to the expected voltage of the bridge arm and the (M + 2) th to the (N) th capacitor voltages, and controlling the H bridge corresponding to the (M + 1) th capacitor voltage to be on or off according to the duty ratio; wherein N is the number of H bridges of a bridge arm, and M is more than or equal to 1 and less than N.

Optionally, the control module 302 is further configured to:

according toDetermining the duty ratio a of a control signal of an H bridge corresponding to the M +1 th capacitor voltage;

wherein u is_armIs the desired voltage of the bridge arm; u. of_c(M+1)The voltage of the M +1 capacitor; u. of_ckIs the kth capacitor voltage.

Optionally, the control module 302 is further configured to:

acquiring an input voltage value of a bridge arm;

acquiring a three-phase output current value of M3C, and determining an output voltage reference value of a bridge arm according to the three-phase output current value of M3C;

acquiring three-phase input current of a sub-converter to which a bridge arm belongs and an input current reference value of M3C, and determining an input voltage reference value of the bridge arm according to the three-phase input current of the sub-converter to which the bridge arm belongs and the input current reference value of M3C;

acquiring a target voltage reference value;

and determining the expected voltage of the bridge arm according to the input voltage value of the bridge arm, the output voltage reference value of the bridge arm, the input voltage reference value of the bridge arm and the target voltage reference value.

Optionally, the control module 302 is further configured to:

and subtracting the output voltage reference value of the bridge arm, the input voltage reference value of the bridge arm and the target voltage reference value from the input voltage value of the bridge arm in sequence to obtain the expected voltage of the bridge arm.

It will be clear to those skilled in the art that, for convenience and simplicity of description, the foregoing functional units and modules are merely illustrated in terms of division, and in practical applications, the foregoing functional allocation may be performed by different functional units and modules as needed, that is, the internal structure of the control device of M3C is divided into different functional units or modules to perform all or part of the above described functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the above-mentioned apparatus may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

Fig. 10 is a schematic block diagram of a terminal device according to an embodiment of the present invention. As shown in fig. 10, the terminal device 40 of this embodiment includes: one or more processors 401, a memory 402, and a computer program 403 stored in the memory 402 and executable on the processors 401. The processor 401, when executing the computer program 403, implements the steps in the above-described respective control method embodiments of M3C, such as steps S101 to S102 shown in fig. 1. Alternatively, the processor 401, when executing the computer program 403, implements the functions of the modules/units in the control device embodiment of M3C, such as the functions of the modules 301 to 302 shown in fig. 9.

Illustratively, the computer program 403 may be partitioned into one or more modules/units that are stored in the memory 402 and executed by the processor 401 to accomplish the present application. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used for describing the execution process of the computer program 403 in the terminal device 40. For example, the computer program 403 may be divided into an acquisition module and a control module, and the specific functions of each module are as follows:

the first determining module is used for determining a low-frequency side voltage reference value and a power-frequency side voltage reference value;

the acquisition module is used for acquiring the capacitance voltage of each H bridge of the bridge arms aiming at each bridge arm of each sub-converter;

and the control module is used for determining the expected voltage of each bridge arm of each sub-converter and controlling the on-off of each H bridge of the bridge arms according to the expected voltage of the bridge arms and the capacitance voltage of each H bridge of the bridge arms.

Other modules or units can refer to the description of the embodiment shown in fig. 9, and are not described again here.

The terminal device 40 may be a computing device such as a desktop computer, a notebook, a palm computer, and a cloud server. The terminal device 40 includes, but is not limited to, a processor 401 and a memory 402. Those skilled in the art will appreciate that fig. 10 is only one example of a terminal device 40, and does not constitute a limitation to the terminal device 40, and may include more or less components than those shown, or combine some components, or different components, for example, the terminal device 40 may further include an input device, an output device, a network access device, a bus, etc.

The Processor 401 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The storage 402 may be an internal storage unit of the terminal device 40, such as a hard disk or a memory of the terminal device 40. The memory 402 may also be an external storage device of the terminal device 40, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 40. Further, the memory 402 may also include both an internal storage unit of the terminal device 40 and an external storage device. The memory 402 is used for storing the computer program 403 and other programs and data required by the terminal device 40. The memory 402 may also be used to temporarily store data that has been output or is to be output.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the embodiments provided in the present application, it should be understood that the disclosed control apparatus and method of M3C may be implemented in other ways. For example, the above-described control device embodiment of M3C is merely illustrative, and for example, the division of the modules or units is only one logical function division, and there may be other divisions when the actual implementation is performed, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated modules/units, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow in the method of the embodiments described above can be realized by a computer program, which can be stored in a computer-readable storage medium and can realize the steps of the embodiments of the methods described above when the computer program is executed by a processor. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain other components which may be suitably increased or decreased as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media which may not include electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.