阅读说明：本技术 避免过零检测电路中过零信号检测时间偏差的方法及装置 (Method and device for avoiding zero-crossing signal detection time deviation in zero-crossing detection circuit ) 是由 唐秀康 宋洪业 张兴辉 钟峰 于 2020-12-07 设计创作，主要内容包括：本发明公开了避免过零检测电路中过零信号检测时间偏差的方法及装置,方法包括：调节过零检测电路参数,使过零信号超前交流电源过零点第一时间；判断过零信号是否为上升沿；若过零信号为上升沿,则判断是否需要开启可控硅；若需要开启可控硅,则控制可控硅导通。本发明根据硬件具体信号情况,选择超前的过零信号上升沿或下降沿单边沿控制可控硅,可以避免过零信号滞后引起的时间控制偏差,进而使得时间偏差小输出负载功率准确。(The invention discloses a method and a device for avoiding zero-crossing signal detection time deviation in a zero-crossing detection circuit, wherein the method comprises the following steps: adjusting the parameters of a zero-crossing detection circuit to lead a zero-crossing signal to lead the zero-crossing point of the alternating-current power supply to be the first time; judging whether the zero-crossing signal is a rising edge or not; if the zero-crossing signal is a rising edge, judging whether the silicon controlled rectifier needs to be started or not; and if the silicon controlled rectifier needs to be started, controlling the conduction of the silicon controlled rectifier. According to the invention, the single edge of the rising edge or the falling edge of the over-front zero-crossing signal is selected to control the controllable silicon according to the specific signal condition of hardware, so that the time control deviation caused by the lag of the zero-crossing signal can be avoided, and the output load power is accurate when the time deviation is small.)

1. A method of avoiding zero crossing signal detection time offset in a zero crossing detection circuit, the method comprising:

adjusting the parameters of a zero-crossing detection circuit to lead a zero-crossing signal to lead the zero-crossing point of the alternating-current power supply to be the first time;

judging whether the zero-crossing signal is a rising edge or not;

if the zero-crossing signal is a rising edge, judging whether the silicon controlled rectifier needs to be started or not;

and if the silicon controlled rectifier needs to be started, controlling the conduction of the silicon controlled rectifier.

2. A method for avoiding zero-crossing signal detection time offset in a zero-crossing detection circuit as claimed in claim 1, wherein the step of adjusting the parameters of the zero-crossing detection circuit to make the zero-crossing signal lead the zero-crossing point of the ac power by a first time, the first time is 20-150 uS.

3. A method for avoiding zero crossing signal detection time offset in a zero crossing detection circuit as claimed in claim 1, wherein said step of determining whether the zero crossing signal is a rising edge is followed by further comprising:

judging whether the commercial power frequency is 50 Hz or 60 Hz;

if the commercial power frequency is 50 Hz, judging whether the rising edge duration time reaches a second time;

and if the duration time of the rising edge reaches the second time, outputting a high level to control the silicon controlled rectifier to be cut off in advance.

4. A method for avoiding zero crossing signal detection time drift in a zero crossing detection circuit as set forth in claim 3 wherein said step of determining whether the duration of the rising edge reaches a second time, said second time being 12 mS.

5. A method for avoiding zero crossing signal detection time drift in a zero crossing detection circuit as set forth in claim 3, wherein the step of determining whether the utility power frequency is 50 hz or 60 hz further comprises:

if the commercial power frequency is 60 Hz, judging whether the rising edge duration time reaches a third time;

and if the rising edge duration reaches the third time, entering the step of outputting high level to control the pre-cut-off of the controllable silicon.

6. A method for avoiding zero crossing signal detection time drift in a zero crossing detection circuit as set forth in claim 5 wherein said step of determining if the duration of the rising edge reaches a third time, said third time is 9 mS.

7. The device for avoiding the zero-crossing signal detection time deviation in the zero-crossing detection circuit is characterized by comprising an adjusting module, a first judging module, a second judging module and a first control module;

the adjusting module is used for adjusting the parameters of the zero-crossing detecting circuit to lead the zero-crossing signal to lead the zero-crossing point of the alternating-current power supply for the first time;

the first judging module is used for judging whether the zero-crossing signal is a rising edge or not;

the second judgment module is used for judging whether the silicon controlled rectifier needs to be started or not;

the first control module outputs low level to control the conduction of the controlled silicon.

8. An apparatus for avoiding zero-crossing signal detection time offset in a zero-crossing detection circuit as claimed in claim 7, further comprising a third judging module, a fourth judging module and a second control module;

the third judging module is used for judging whether the commercial power frequency is 50 Hz or 60 Hz;

the fourth judging module is used for judging whether the duration time of the rising edge reaches the second time or not;

and the second control module is used for outputting high level to control the silicon controlled rectifier to be cut off in advance.

9. An apparatus for avoiding zero-crossing signal detection time offset in a zero-crossing detection circuit as claimed in claim 8, further comprising a fifth judgment module;

and the fifth judging module is used for judging whether the duration time of the rising edge reaches the third time.

Technical Field

The invention relates to the field of circuit detection, in particular to a method and a device for avoiding zero-crossing signal detection time deviation in a zero-crossing detection circuit.

Background

In some household appliances such as a water dispenser and a coffee machine at present, a non-isolated zero-crossing signal is added with a capacitor to prevent a switching circuit from high-frequency interference, and the non-isolated zero-crossing signal and an optical coupling isolation zero-crossing signal are required to be power consumed, so that the zero-crossing detection circuit is difficult to be accurate and error-free in zero-crossing time with an alternating current power supply, and the problems of power inaccuracy, conduction test failure and the like caused by time deviation of elements such as a silicon controlled rectifier controlled by an MCU chip are solved.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provides a method and a device for avoiding the detection time deviation of a zero-crossing signal in a zero-crossing detection circuit.

In order to achieve the purpose, the invention adopts the following technical scheme:

in a first aspect, a method of avoiding zero crossing signal detection time offset in a zero crossing detection circuit, the method comprising:

adjusting the parameters of a zero-crossing detection circuit to lead a zero-crossing signal to lead the zero-crossing point of the alternating-current power supply to be the first time;

judging whether the zero-crossing signal is a rising edge or not;

if the zero-crossing signal is a rising edge, judging whether the silicon controlled rectifier needs to be started or not;

and if the silicon controlled rectifier needs to be started, controlling the conduction of the silicon controlled rectifier.

The further technical scheme is as follows: and in the step of adjusting the parameters of the zero-crossing detection circuit to lead the zero-crossing signal to lead the zero-crossing point of the alternating-current power supply by a first time, the first time is 20-150 uS.

The further technical scheme is as follows: after the step of judging whether the zero-crossing signal is a rising edge, the method further comprises the following steps:

judging whether the commercial power frequency is 50 Hz or 60 Hz;

if the commercial power frequency is 50 Hz, judging whether the rising edge duration time reaches a second time;

and if the duration time of the rising edge reaches the second time, outputting a high level to control the silicon controlled rectifier to be cut off in advance.

The further technical scheme is as follows: in the step of judging whether the duration of the rising edge reaches a second time, the second time is 12 mS.

The further technical scheme is as follows: after the step of determining whether the commercial power frequency is 50 hz or 60 hz, the method further includes:

if the commercial power frequency is 60 Hz, judging whether the rising edge duration time reaches a third time;

and if the rising edge duration reaches the third time, entering the step of outputting high level to control the pre-cut-off of the controllable silicon.

The further technical scheme is as follows: in the step of judging whether the duration of the rising edge reaches a third time, the third time is 9 mS.

In a second aspect, an apparatus for avoiding a zero-crossing signal detection time offset in a zero-crossing detection circuit includes an adjustment module, a first judgment module, a second judgment module, and a first control module;

the adjusting module is used for adjusting the parameters of the zero-crossing detecting circuit to lead the zero-crossing signal to lead the zero-crossing point of the alternating-current power supply for the first time;

the first judging module is used for judging whether the zero-crossing signal is a rising edge or not;

the second judgment module is used for judging whether the silicon controlled rectifier needs to be started or not;

and the first control module is used for controlling the conduction of the controllable silicon.

The further technical scheme is as follows: the device also comprises a third judging module, a fourth judging module and a second control module;

the third judging module is used for judging whether the commercial power frequency is 50 Hz or 60 Hz;

the fourth judging module is used for judging whether the duration time of the rising edge reaches the second time or not;

and the second control module is used for outputting high level to control the silicon controlled rectifier to be cut off in advance.

The further technical scheme is as follows: the device also comprises a fifth judgment module;

and the fifth judging module is used for judging whether the duration time of the rising edge reaches the third time.

Compared with the prior art, the invention has the beneficial effects that: according to the invention, the single edge of the rising edge or the falling edge of the over-front zero-crossing signal is selected to control the controllable silicon according to the specific signal condition of hardware, so that the time control deviation caused by the lag of the zero-crossing signal can be avoided, and the output load power is accurate when the time deviation is small.

The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more apparent, the following detailed description will be given of preferred embodiments.

Drawings

FIG. 1 is a flow chart of an embodiment of a method of avoiding zero crossing signal detection time offset in a zero crossing detection circuit according to the present invention;

FIG. 2 is a schematic block diagram of an embodiment of an apparatus for avoiding zero crossing signal detection time offset in a zero crossing detection circuit according to the present invention;

FIG. 3 is a simulation diagram of the MCU detecting the change of the ZC zero-crossing signal to directly control the SCR according to the embodiment of the invention;

FIG. 4 is a simulation diagram of an embodiment of the present invention;

fig. 5 is a circuit diagram of zero crossing detection according to an embodiment of the present invention.

Detailed Description

In order to more fully understand the technical content of the present invention, the technical solution of the present invention will be further described and illustrated with reference to the following specific embodiments, but not limited thereto.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

The invention is mainly applied to a zero-crossing signal detection circuit with larger time deviation, and selects the rising edge or the falling edge of the over-front zero-crossing signal to control the controllable silicon according to the specific signal condition of hardware, thereby avoiding the time control deviation caused by the lag of the zero-crossing signal and further ensuring the small time deviation and accurate output load power. The invention is described below by means of specific examples.

Referring to fig. 1, a method for avoiding a zero-crossing signal detection time offset in a zero-crossing detection circuit includes the following steps:

s10, adjusting the parameters of the zero-crossing detection circuit to lead the zero-crossing signal to lead the zero-crossing point of the alternating current power supply to be 100uS, and executing the step S20;

s20, judging whether the zero-crossing signal is a rising edge, if so, executing a step S30, and if not, executing a step S50;

s30, judging whether the controllable silicon needs to be started, if so, executing a step S40, and if not, executing a step S20;

s40, controlling the conduction of the controlled silicon;

s50, judging whether the commercial power frequency is 50 Hz or 60 Hz, if so, executing a step S60, and if so, executing a step S70;

s60, judging whether the rising edge duration time reaches 12mS, if so, executing a step S80, and if not, executing a step S20;

and S70, judging whether the rising edge duration time reaches 9mS, if so, executing a step S80, and if not, executing a step S20.

And S80, outputting a high level to control the pre-cut-off of the controllable silicon.

Referring to fig. 3-5, referring to steps S10-S80, the ZC-OUT leads the ac power supply by 100uS through adjusting the hardware circuit parameters, and certainly, the circuit parameters may be adjusted according to the actual situation to lead the zero-cross signal by 20-150 uS. As shown in the waveform of fig. 4, when the MCU detects that ZC-OUT is a rising edge, the TRIAC outputs a low level to turn on the thyristor TR1, the ac is at a zero position, and the thyristor is turned on and then supplies a low level to the TRIAC, if the thyristor TR1 still has a current passing (ACL to OUT), the thyristor TR1 is still turned on, and when the ac is at a zero position, the thyristor TR1 has no current passing, and the thyristor TR1 is turned off, so in fig. 3, the thyristor keeps a low level for a while when the thyristor is turned on to the negative half cycle, so that the thyristor TR1 is turned on in the negative half cycle, and then the TRIAC is pulled high, and the thyristor TR1 keeps the on state to the zero position, thereby reducing the power consumption problem caused by the control signal.

It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.

Corresponding to the method for avoiding the zero-crossing signal detection time deviation in the zero-crossing detection circuit, the specific embodiment of the invention also provides a device for avoiding the zero-crossing signal detection time deviation in the zero-crossing detection circuit.

Referring to fig. 2, the apparatus for avoiding the zero-crossing signal detection time deviation in the zero-crossing detection circuit includes an adjustment module 1, a first determination module 2, a second determination module 3, a first control module 4, a third determination module 5, a fourth determination module 6, a second control module 7, and a fifth determination module 8;

the adjusting module 1 is used for adjusting the parameters of the zero-crossing detecting circuit to lead the zero-crossing signal to lead the zero-crossing point of the alternating-current power supply for the first time;

the first judging module 2 is used for judging whether the zero-crossing signal is a rising edge or not;

the second judgment module 3 is used for judging whether the controllable silicon needs to be started or not;

the first control module 4 is used for controlling the conduction of the controllable silicon;

the third judging module 5 is used for judging whether the commercial power frequency is 50 Hz or 60 Hz;

a fourth judging module 6, configured to judge whether the rising edge duration reaches the second time;

the second control module 7 is used for outputting a high level to control the pre-cut-off of the controllable silicon;

and a fifth judging module 8, configured to judge whether the duration of the rising edge reaches the third time.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present invention may be implemented in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, a network device, or the like) or a processor (processor) to execute all or part of the steps of the methods according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

It will be clear to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely illustrated, and in practical applications, the above function distribution may be performed by different functional modules according to needs, that is, the internal structure of the apparatus is divided into different functional modules to perform all or part of the above described functions. Each functional module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional modules are only used for distinguishing one functional module from another, and are not used for limiting the protection scope of the application. The specific working process of the modules in the apparatus may refer to the corresponding process in the foregoing method embodiment, and is not described herein again.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, and for example, the division of the modules is only one logical functional division, and other divisions may be realized in practice, for example, multiple units or components may be combined or integrated into another device, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

The technical contents of the present invention are further illustrated by the examples only for the convenience of the reader, but the embodiments of the present invention are not limited thereto, and any technical extension or re-creation based on the present invention is protected by the present invention. The protection scope of the invention is subject to the claims.