阅读说明：本技术 电力变换系统 (Power conversion system ) 是由 野中贵文 村田信二 伊泽文仁 铃木规央 于 2019-08-07 设计创作，主要内容包括：电力变换系统(100)具备：多个电力变换装置(1、2),分别设置有通过被施加栅极电压而成为导通状态的开关元件(11、21),并且以能够向同一负载供给交流电力的方式相互并联连接；以及栅极电压调整电路(3),通过生成使施加到多个开关元件(11、21)中的至少1个的栅极电压的电平变化的反馈信号,进行使从多个电力变换装置(1、2)的各个电力变换装置输出的平均电力均等的调整。(A power conversion system (100) is provided with: a plurality of power conversion devices (1, 2) each provided with a switching element (11, 21) that is turned on by application of a gate voltage, and connected in parallel to each other so as to be able to supply alternating-current power to the same load; and a gate voltage adjusting circuit (3) that generates a feedback signal that changes the level of the gate voltage applied to at least 1 of the plurality of switching elements (11, 21), thereby adjusting the average power output from each of the plurality of power conversion devices (1, 2) to be uniform.)

1. A power conversion system is characterized by comprising:

a plurality of power conversion devices each provided with a switching element that is turned on by application of a gate voltage, and connected in parallel to each other so as to be able to supply ac power to the same load; and

and a gate voltage adjusting circuit configured to generate a feedback signal for changing a level of the gate voltage applied to at least 1 of the plurality of switching elements, thereby performing adjustment for equalizing average power output from each of the plurality of power conversion devices.

2. The power conversion system according to claim 1,

the control device is provided with a control device for sending a common gate signal for controlling the gate voltage to each of the plurality of switching elements.

3. The power conversion system according to claim 1 or 2,

each of the plurality of power conversion devices has a gate voltage circuit that changes a level of the gate voltage applied to the plurality of switching elements.

4. The power conversion system according to any one of claims 1 to 3,

the gate voltage adjusting circuit performs the adjustment based on a result of comparing output currents from the plurality of power conversion devices.

5. The power conversion system according to any one of claims 1 to 3,

the gate voltage adjusting circuit performs the adjustment based on a result of comparing output voltages from the plurality of power conversion devices.

Technical Field

The present invention relates to a power conversion system including a plurality of power conversion devices.

Background

A power conversion system is known in which, by parallel operation of a plurality of power conversion devices, the power capacity can be increased as compared with a case where a single power conversion device is operated. The plurality of power conversion devices are connected in parallel to each other so as to be able to output an ac current to the same load. The power conversion system temporarily converts an ac current into a dc current, and further converts the dc current into an ac current by each power conversion device, thereby changing the frequency of an ac voltage or the level of the ac voltage.

When a plurality of power conversion devices are operated in parallel, a difference occurs in the output voltage of each power conversion device, and a load of any one of the plurality of power conversion devices is higher than that of the other power conversion devices. Further, a circulating current, which is a current circulating through a loop circuit between the power conversion devices, may be generated due to a difference in output voltages of the power conversion devices. The circulating current is also referred to as cross current. Since the lateral current does not contribute to driving of the device as a load, the power conversion efficiency of the power conversion system is lowered due to the generation of the lateral current.

Patent document 1 discloses a power conversion system capable of synchronizing gate signals in power conversion devices. The gate signal is input to the gate of the switching element provided in each power conversion device. According to patent document 1, each power conversion device receives a voltage command and a synchronization signal for synchronization of a gate signal through communication with a control device, and generates the gate signal. The power conversion system can suppress the deviation of the timing of the output of the ac current by each power conversion device and reduce the difference in the output voltage by synchronizing the gate signals in each power conversion device. The power conversion system can equalize the average power supplied from each power conversion device by reducing the difference in output voltage.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open No. 2008-228548

Disclosure of Invention

The conventional power conversion system of patent document 1 has a configuration similar to that of an existing power conversion device that operates independently in accordance with a gate signal from a control device, and is further provided with a communication function for transmitting and receiving a synchronization signal and a processing function for synchronizing the gate signal. Since a conventional power conversion system has a configuration for realizing the above-described functions, the configuration of the conventional power conversion system needs to be largely changed from that of the conventional power conversion system including an existing power conversion device, and the configuration becomes complicated.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a power conversion system having a simple configuration and capable of controlling a plurality of power conversion devices so that average power output from each power conversion device becomes uniform.

In order to solve the above problems and achieve the object, a power conversion system according to the present invention includes: a plurality of power conversion devices each provided with a switching element that is turned on by application of a gate voltage, and connected in parallel to each other so as to be able to supply ac power to the same load; and a gate voltage adjusting circuit that generates a feedback signal for changing a level of a gate voltage applied to at least 1 of the plurality of switching elements, thereby performing adjustment for equalizing average power output from each of the plurality of power conversion devices.

The power conversion system according to the present invention has a simple configuration, and is advantageous in that it can control a plurality of power conversion devices so that the average power output from each power conversion device becomes uniform.

Drawings

Fig. 1 is a diagram showing a power conversion system according to embodiment 1 of the present invention.

Fig. 2 is a diagram showing a waveform of a gate signal generated by the control device included in the power conversion system shown in fig. 1 and a waveform of an output voltage output by the power conversion device.

Fig. 3 is a diagram showing a hardware configuration in a case where the functions of the control device shown in fig. 1 are realized by dedicated hardware.

Fig. 4 is a diagram showing a hardware configuration in a case where the functions of the control apparatus shown in fig. 1 are realized by a processor executing a program stored in a memory.

Fig. 5 is a diagram showing an example of a relationship between a collector current and a collector-emitter voltage in a switching element included in the power conversion system shown in fig. 1.

Fig. 6 is a diagram showing a gate voltage adjusting circuit according to embodiment 2 of the present invention.

Fig. 7 is a diagram showing a power conversion system according to embodiment 3 of the present invention.

Fig. 8 is a diagram showing a configuration example of a gate voltage adjusting circuit included in the power conversion system shown in fig. 7.

Fig. 9 is a diagram showing a power conversion system according to embodiment 4 of the present invention.

(symbol description)

1. 2: a power conversion device; 3. 33: a gate voltage adjusting circuit; 4: a control device; 5: a rectifying element; 6: a commercial power supply; 7: a motor; 8a, 8 b: a P terminal; 8 c: a positive terminal; 9a, 9 b: an N terminal; 9 c: a negative terminal; 10. 10a, 10b, 10c, 10d, 17, 20a, 20b, 20c, 20d, 27: a gate voltage circuit; 11. 11a, 11b, 11c, 11d, 21a, 21b, 21c, 21 d: a switching element; 12. 12a, 12b, 12c, 12d, 22a, 22b, 22c, 22 d: a gate drive circuit; 13A, 13B, 23A, 23B: a current sensor; 14A, 14B, 24A, 24B: a connection point; 15A, 15B, 25A, 25B: an output line; 16A, 16B, 26A, 26B: a current detection resistor; 31. 32, 34, 35: a comparator; 36. 37: an arithmetic circuit; 40: a processing circuit; 41: a processor; 42: a memory; 100. 101, 102: provided is a power conversion system.

Detailed Description

Hereinafter, a power conversion system according to an embodiment of the present invention will be described in detail with reference to the drawings. Further, the present invention is not limited to this embodiment.

Embodiment 1.

Fig. 1 is a diagram showing a power conversion system 100 according to embodiment 1 of the present invention. The power conversion system 100 includes power conversion devices 1 and 2 as a plurality of power conversion devices, a gate voltage adjustment circuit 3 for adjusting a gate voltage, a control device 4 for controlling the power conversion devices 1 and 2, and a rectifier device 5.

The power conversion system 100 temporarily converts an ac current from the commercial power supply 6 into a dc current by the rectifier device 5, and further converts the dc current into an ac current by the power conversion devices 1 and 2. The power conversion system 100 supplies the converted ac current to the motor 7 as a load device. The power conversion devices 1 and 2 are connected in parallel to each other so that ac current can be supplied to the motors 7 as the same load. The number of power conversion devices provided in the power conversion system 100 is not limited to 2. The power conversion system 100 may include 3 or more power conversion devices connected in parallel with each other.

The control device 4 generates gate signals G1 and G2, which are common gate signals for controlling the output voltages of the power conversion devices 1 and 2 so that the output voltage of the power conversion system 100 becomes a target value. The control device 4 sends the generated gate signal G1 to the power conversion device 1, and sends the generated gate signal G2 to the power conversion device 2. The gate signals G1 and G2 are Pulse Width Modulation (PWM) signals. The current value of the current applied to the motor 7 varies due to the variation in the pulse width of the gate signals G1, G2. Specifically, the smaller the pulse width, the smaller the current value becomes, and the larger the pulse width, the larger the current value becomes.

The rectifier element 5 is a semiconductor rectifier element such as a diode bridge. The positive terminal 8c of the rectifier element 5 is connected to the P terminal 8a of the power conversion device 1 and the P terminal 8b of the power conversion device 2. The negative terminal 9c of the rectifier device 5 is connected to the N terminal 9a of the power conversion device 1 and the N terminal 9b of the power conversion device 2. The rectifier device 5 converts an ac current from the commercial power supply 6 into a dc current, and supplies the dc current to the power conversion device 1 and the power conversion device 2.

The power conversion device 1 includes gate voltage circuits 10a, 10b, 10c, and 10d that generate gate voltages, switching elements 11a, 11b, 11c, and 11d, and gate drive circuits 12a, 12b, 12c, and 12d that drive the switching elements 11a, 11b, 11c, and 11 d. The gate drive circuits 12a, 12b, 12c, and 12d drive the switching elements 11a, 11b, 11c, and 11d by applying the gate voltages generated by the gate voltage circuits 10a, 10b, 10c, and 10d to the switching elements 11a, 11b, 11c, and 11 d. The switching elements 11a, 11b, 11c, and 11d are turned on by the gate voltage being applied. The gate voltage circuits 10 are collectively referred to as gate voltage circuits 10a, 10b, 10c, and 10d, respectively, without distinction. The switching elements 11 are collectively referred to as switching elements 11a, 11b, 11c, and 11d, which are not distinguished from one another. The gate driving circuits 12 are collectively referred to as the gate driving circuits 12a, 12b, 12c, and 12d without distinction. The switching element 11 is an IGBT (Insulated Gate Bipolar Transistor) as a semiconductor element. The switching element 11 may be a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) or a Transistor.

The gate voltage circuit 10a outputs the generated gate voltage to the gate drive circuit 12 a. The gate voltage circuit 10b outputs the generated gate voltage to the gate drive circuit 12 b. The gate voltage circuit 10c outputs the generated gate voltage to the gate drive circuit 12 c. The gate voltage circuit 10d outputs the generated gate voltage to the gate drive circuit 12 d. The gate voltage circuits 10a, 10b, 10c, and 10d can change the level of the gate voltage in accordance with the feedback signal FB1 from the gate voltage adjustment circuit 3.

The gate drive circuit 12 outputs the gate voltage while the pulse of the gate signal G1 is on, and stops outputting the gate voltage while the pulse of the gate signal G1 is off. The gate drive circuit 12 switches the output of the gate voltage and stops the output in accordance with the gate signal G1. The gate drive circuit 12a outputs a gate voltage to the gate electrode of the switching element 11 a. The gate drive circuit 12b outputs a gate voltage to the gate electrode of the switching element 11 b. The gate drive circuit 12c outputs a gate voltage to the gate electrode of the switching element 11 c. The gate drive circuit 12d outputs a gate voltage to the gate electrode of the switching element 11 d. The gate drive circuit 12 functions as a switch that switches between a closed state in which the gate voltage is output and an open state in which the output of the gate voltage is stopped.

The switching element 11 is in an on state in which a current flows between the collector and the emitter by application of a gate voltage, and is in an off state in which a current does not flow between the collector and the emitter by stopping application of the gate voltage.

The collector terminal of the switching element 11a and the collector terminal of the switching element 11c are connected to the P terminal 8 a. The emitter terminal of the switching element 11b and the emitter terminal of the switching element 11d are connected to the N terminal 9 a. The switching element 11a and the switching element 11b are connected in series between the P terminal 8a and the N terminal 9 a. The switching element 11c and the switching element 11d are connected in series between the P terminal 8a and the N terminal 9 a.

A connection point 14A between the emitter terminal of the switching element 11a and the collector terminal of the switching element 11b is connected to the motor 7 via an output line 15A. The current sensor 13A detects a current flowing through the output line 15A. A connection point 14B between the emitter terminal of the switching element 11c and the collector terminal of the switching element 11d is connected to the motor 7 via an output line 15B. The current sensor 13B detects a current flowing through the output line 15B. The power conversion device 1 applies an output voltage, which is the difference between the voltage L1A at the connection point 14A and the voltage L1B at the connection point 14B, to the motor 7.

The switching elements 11a and 11c connected to the P terminal 8a are P-side switching elements provided on the positive side among the switching elements 11 of the power conversion device 1. The switching elements 11b and 11d connected to the N terminal 9a are N-side switching elements provided on the negative side of the switching elements 11 of the power conversion device 1. The configuration of the power conversion device 1 is divided into components on the P side and components on the N side. The gate voltage circuits 10a and 10c, the switching elements 11a and 11c, and the gate drive circuits 12a and 12c are components on the P side. The gate voltage circuits 10b and 10d, the switching elements 11b and 11d, and the gate drive circuits 12b and 12d are N-side components. The P side is a portion of the circuit between the P terminal 8a and the N terminal 9a closer to the P terminal 8a than the connection points 14A and 14B. The N side is a portion of the circuit between the P terminal 8a and the N terminal 9a closer to the N terminal 9a than the connection points 14A and 14B.

The configuration of the power conversion device 1 is divided into a phase 1-side component on the side of the applied voltage L1A in the circuit between the P terminal 8a and the N terminal 9a, and a phase 2-side component on the side of the applied voltage L1B in the circuit between the P terminal 8a and the N terminal 9 a. The gate voltage circuits 10a and 10b, the switching elements 11a and 11b, and the gate drive circuits 12a and 12b are components on the phase 1 side. The gate voltage circuits 10c and 10d, the switching elements 11c and 11d, and the gate drive circuits 12c and 12d are components on the phase 2 side.

The power conversion device 2 has the same configuration as the power conversion device 1. The power conversion device 2 includes gate voltage circuits 20a, 20b, 20c, and 20d that generate gate voltages, switching elements 21a, 21b, 21c, and 21d, and gate drive circuits 22a, 22b, 22c, and 22d that drive the switching elements 21a, 21b, 21c, and 21 d. The gate drive circuits 22a, 22b, 22c, and 22d drive the switching elements 21a, 21b, 21c, and 21d by applying the gate voltages generated by the gate voltage circuits 20a, 20b, 20c, and 20d to the switching elements 21a, 21b, 21c, and 21 d. The switching elements 21a, 21b, 21c, and 21d are turned on by the gate voltage being applied thereto. The gate voltage circuits 20 are collectively referred to as gate voltage circuits 20a, 20b, 20c, and 20d, respectively, without distinction. The switching elements 21 are collectively referred to as switching elements without distinguishing the switching elements 21a, 21b, 21c, and 21d from each other. The gate driver circuits 22 are collectively referred to as the gate driver circuits 22a, 22b, 22c, and 22d, without distinction. The switching element 21 is an IGBT as a semiconductor element. The switching element 21 may be a MOSFET or a transistor.

The gate voltage circuit 20a outputs the generated gate voltage to the gate drive circuit 22 a. The gate voltage circuit 20b outputs the generated gate voltage to the gate drive circuit 22 b. The gate voltage circuit 20c outputs the generated gate voltage to the gate drive circuit 22 c. The gate voltage circuit 20d outputs the generated gate voltage to the gate drive circuit 22 d. The gate voltage circuits 20a, 20b, 20c, and 20d can change the level of the gate voltage in accordance with the feedback signal FB2 from the gate voltage adjustment circuit 3.

The gate drive circuit 22 outputs the gate voltage while the pulse of the gate signal G2 is on, and stops the output of the gate voltage while the pulse of the gate signal G2 is off. The gate drive circuit 22 switches the output of the gate voltage and stops the output in accordance with the gate signal G2. The gate drive circuit 22a outputs a gate voltage to the gate electrode of the switching element 21 a. The gate drive circuit 22b outputs a gate voltage to the gate electrode of the switching element 21 b. The gate drive circuit 22c outputs a gate voltage to the gate electrode of the switching element 21 c. The gate drive circuit 22d outputs a gate voltage to the gate electrode of the switching element 21 d. The gate drive circuit 22 functions as a switch that switches between a closed state in which the gate voltage is output and an open state in which the output of the gate voltage is stopped.

The switching element 21 is in an on state in which a current flows between the collector and the emitter by application of a gate voltage, and is in an off state in which a current does not flow between the collector and the emitter by stopping application of the gate voltage.

The collector terminal of the switching element 21a and the collector terminal of the switching element 21c are connected to the P terminal 8 b. The emitter terminal of the switching element 21b and the emitter terminal of the switching element 21d are connected to the N terminal 9 b. The switching element 21a and the switching element 21b are connected in series between the P terminal 8b and the N terminal 9 b. The switching element 21c and the switching element 21d are connected in series between the P terminal 8b and the N terminal 9 b.

A connection point 24A between the emitter terminal of the switching element 21a and the collector terminal of the switching element 21b is connected to the motor 7 via an output line 25A. The current sensor 23A detects a current flowing through the output line 25A. A connection point 24B between the emitter terminal of the switching element 21c and the collector terminal of the switching element 21d is connected to the motor 7 via an output line 25B. Current sensor 23B detects a current flowing through output line 25B. The power conversion device 2 applies an output voltage, which is the difference between the voltage L2A at the connection point 24A and the voltage L2B at the connection point 24B, to the motor 7.

The switching elements 21a and 21c connected to the P terminal 8b are P-side switching elements that are provided on the positive side among the switching elements 21 of the power conversion device 2. The switching elements 21b and 21d connected to the N terminal 9b are N-side switching elements provided on the negative side of the switching elements 21 of the power conversion device 2. The configuration of the power conversion device 2 is divided into a P-side component and an N-side component. The gate voltage circuits 20a and 20c, the switching elements 21a and 21c, and the gate drive circuits 22a and 22c are components on the P side. The gate voltage circuits 20b and 20d, the switching elements 21b and 21d, and the gate drive circuits 22b and 22d are N-side components. The P side is a portion of the circuit between the P terminal 8B and the N terminal 9B closer to the P terminal 8B than the connection points 24A and 24B. The N side is a portion of the circuit between the P terminal 8B and the N terminal 9B closer to the N terminal 9B than the connection points 24A and 24B.

The configuration of the power conversion device 2 is divided into a phase 1-side component on the side of the applied voltage L2A in the circuit between the P terminal 8b and the N terminal 9b, and a phase 2-side component on the side of the applied voltage L2B in the circuit between the P terminal 8b and the N terminal 9 b. The gate voltage circuits 20a and 20b, the switching elements 21a and 21b, and the gate drive circuits 22a and 22b are components on the phase 1 side. The gate voltage circuits 20c and 20d, the switching elements 21c and 21d, and the gate drive circuits 22c and 22d are phase 2-side components.

The gate voltage adjusting circuit 3 generates the feedback signals FB1 and FB2 that change the level of the gate voltage applied to at least 1 of the switching elements 11 and 21 included in the power conversion devices 1 and 2, thereby adjusting the output voltages of the power conversion devices 1 and 2 to the target values of the output power output from the power conversion devices 1 and 2, respectively.

The gate voltage adjusting circuit 3 performs adjustment to make the output voltages of the power conversion devices 1 and 2 equal to target values, thereby making the average powers output from the power conversion devices 1 and 2 uniform. The average power is power per unit time, for example, every 1 second, and is obtained by multiplying the effective value of the power voltage and the effective value of the current. The equalization of the average power output from each power conversion device 1, 2 is not limited to the case where the average power output from each power conversion device 1, 2 is the same, that is, the case where 50% of the power supplied to the motor 7 is borne by each power conversion device 1, 2. Even when the average power output from each of the power conversion devices 1 and 2 is different, the average power output from each of the power conversion devices 1 and 2 is considered to be equal when the power applied to each of the power conversion devices 1 and 2 is in the range of 40% to 60% of the power supplied to the motor 7.

The current sensor 13A measures the current flowing through the output line 15A, and outputs an electric signal indicating the measurement result to the control device 4. The current sensor 13B measures the current flowing through the output line 15B, and outputs an electric signal indicating the measurement result to the control device 4. In fig. 1, the electric signals output from the current sensors 13A and 13B to the control device 4 are not shown. The control device 4 generates a gate signal G1 for adjusting the pulse width so that the output voltage output from the power conversion device 1 becomes a target value, based on the measurement results of the current sensors 13A and 13B. The control device 4 sends the generated gate signal G1 to the gate drive circuit 12. The control device 4 also sends a gate signal G2, which is the same gate signal as the gate signal G1, to the gate driver circuit 22. The controller 4 may be provided with a connector that can output the gate signal G2 to the power conversion device 2 by branching the gate signal G1 output to the power conversion device 1. When the gate signal G2, which is the same gate signal as the gate signal G1, is input to the power conversion device 2, the target value of the output voltage output from the power conversion device 2 becomes the same value as the target value of the output voltage output from the power conversion device 1.

Fig. 2 is a diagram showing a waveform of a gate signal G1 generated by the control device 4 included in the power conversion system 100 shown in fig. 1 and a waveform of an output voltage output from the power conversion devices 1 and 2. The PWM signals G1 and G2 are rectangular waves whose pulse widths change to indicate signal levels. The voltage corresponding to the PMW signal is smoothed by the inductor component of the motor 7, thereby obtaining an output voltage as a smooth sine wave. The waveform of the gate signal G1 shown in fig. 2 is a waveform schematically shown, and the number of pulses of the gate signal G1 included in the cycle of the output voltage is arbitrary. The waveform of the gate signal G2 is the same as that of the gate signal G1.

When the gate signal G1 is input to the power conversion device 1, the gate drive circuit 12 outputs the gate voltage while the pulse of the gate signal G1 is on, and the gate drive circuit 12 stops outputting the gate voltage while the pulse of the gate signal G1 is off. In the period T1, the switching element 11a on the P-side and 1 st phase side and the switching element 11d on the N-side and 2 nd phase side perform switching to switch between an on state based on application of the gate voltage and an off state based on stop of application of the gate voltage. In addition, during the period T1, the switching element 11c on the P-side and 2-phase side and the switching element 11b on the N-side and 1-phase side stop switching.

In the period T1, when the switching element 11a is in the on state, the current supplied from the rectifier element 5 flows between the collector and the emitter of the switching element 11 a. Thereby, the voltage of the P terminal 8a is applied to the output line 15A, and a current flows through the motor 7. When the switching element 11d is in the on state, the current flowing from the motor 7 flows between the collector and the emitter of the switching element 11 d. Thereby, the voltage of the N terminal 9a is applied to the output line 15B, and a current flows through the motor 7. An output voltage is applied to the motor 7 as a difference between the voltage L1A of the output line 15A and the voltage L2A of the output line 15B. In this way, in the period T1, the power conversion device 1 turns on the switching elements 11a and 11d, and applies the output voltage to the motor 7. In the period T1, an output voltage is applied to both ends of the motor 7, whereby a current flows through the motor 7.

In a period T2 subsequent to the period T1, the switching element 11b and the switching element 11c perform switching, and the switching element 11a and the switching element 11d stop switching. In the period T2, when the switching element 11c is in the on state, the current supplied from the rectifier element 5 flows between the collector and the emitter of the switching element 11 c. Thereby, the voltage of the P terminal 8a is applied to the output line 15B, and a current flows through the motor 7. When the switching element 11b is in the on state, the current flowing from the motor 7 flows between the collector and the emitter of the switching element 11 b. Thereby, the voltage of the N terminal 9a is applied to the output line 15A, and a current flows through the motor 7. An output voltage is applied to the motor 7 as a difference between the voltage L1A of the output line 15A and the voltage L2A of the output line 15B. In this way, in the period T2, the power conversion device 1 turns on the switching elements 11b and 11c, and applies the output voltage to the motor 7. In the period T2, an output voltage is applied to both ends of the motor 7, whereby a current flows through the motor 7.

The positive and negative voltages of the voltage L1A and the voltage L2A are inverted between the period T1 and the period T2 at both ends of the motor 7. The voltage corresponding to the PMW signal is smoothed by the inductor component of the motor 7. Thereby, the power conversion device 1 applies an output voltage as a sine wave to the motor 7. After the period T2, the control device 4 alternately repeats the period in which the switching elements 11a and 11d are switched and the period in which the switching elements 11b and 11c are switched, and controls the power conversion device 1.

The control device 4 controls the power conversion device 2 in the same manner as the power conversion device 1. When the switching element 21a is in the on state, the voltage of the P terminal 8b is applied to the output line 25A. When the switching element 21d is in the on state, the voltage of the N terminal 9B is applied to the output line 25B. When the switching element 21c is in the on state, the voltage of the P terminal 8B is applied to the output line 25B. When the switching element 21b is in the on state, the voltage of the N terminal 9b is applied to the output line 25A. The control device 4 alternately repeats the period during which the switching elements 21a and 21d are switched and the period during which the switching elements 21b and 21c are switched. An output voltage that is the difference between the voltage L2A of the output line 25A and the voltage L2B of the output line 25B is applied to the motor 7. The power converter 2 applies an output voltage as a sine wave to the motor 7, as in the power converter 1. An output voltage is applied to both ends of the motor 7 by the power conversion device 2, and a current flows through the motor 7.

The function of the control device 4 is realized by a processing circuit. The processing circuit is dedicated hardware mounted on the control device 4. The processing circuit may also be a processor executing a program stored in a memory.

Fig. 3 is a diagram showing a hardware configuration in a case where the functions of the control device 4 shown in fig. 1 are realized by dedicated hardware. The processing Circuit 40 as dedicated hardware is a single Circuit, a composite Circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof.

Fig. 4 is a diagram showing a hardware configuration in a case where the functions of the control device 4 shown in fig. 1 are realized by the processor 41 executing a program stored in the memory 42. The processor 41 and the memory 42 are communicatively connected to each other. The Processor 41 is a CPU (Central Processing Unit), a Processing device, an arithmetic device, a microprocessor, a microcomputer, or a DSP (Digital Signal Processor). The functions of the control device 4 are implemented by the processor 41 and software, firmware or a combination of software and firmware. The software or firmware is described as a program and is stored in the memory 42. The Memory 42 is a built-in Memory such as a nonvolatile or volatile semiconductor Memory, for example, a RAM (Random Access Memory), a ROM (Read Only Memory), a flash Memory, an EPROM (Erasable Programmable Read Only Memory), an EEPROM (registered trademark) (Electrically Erasable Programmable Read-Only Memory), or the like.

Part of the functions of the control device 4 may be implemented by dedicated hardware, and the other parts of the functions of the control device 4 may be implemented by software or firmware. In this way, the functions of the control device 4 can be realized by hardware, software, firmware, or a combination thereof.

When a difference occurs between the output voltage of the power conversion device 1 and the output voltage of the power conversion device 2, the higher one of the output voltages of the power conversion devices 1 and 2 supplies a larger amount of current to the motor 7 than the other. In the following description, the above state is sometimes referred to as load imbalance. Due to the occurrence of the load imbalance, either one of the power conversion devices 1 and 2 becomes a high load. When the power conversion device 1 is under a higher load than the power conversion device 2, the power conversion device 1 cannot supply power exceeding the power when the power output from the power conversion device 1 reaches the limit of the power that can be supplied. When such power limitation occurs in the power conversion device 1, the power conversion device 2 is controlled by the same gate signal as the power conversion device 1, and therefore, cannot supply power higher than the power supplied when the power limitation occurs in the power conversion device 1.

Further, since a difference occurs between the output voltage of the power conversion device 1 and the output voltage of the power conversion device 2, a lateral current may be generated between the power conversion device 1 and the power conversion device 2. When the power conversion device 1 is under a higher load than the power conversion device 2, a lateral current flows from the power conversion device 1 to the power conversion device 2. For example, when the output of both the power conversion device 1 and the power conversion device 2 is 10kW, if a difference is not generated in the output voltages of the power conversion devices 1 and 2 in the power conversion system 100, the power factor is assumed to be 100%, and 20kW of power can be supplied to the motor 7. When a transverse current of 4kW is generated, 4kW of 20kW of the electric power that can be supplied to the motor 7 is consumed between the power conversion devices 1 and 2, and the electric power supplied to the motor 7 is reduced to 16 kW. Thus, the power conversion system 100 reduces the efficiency of power conversion due to the occurrence of the lateral current.

A difference between the output voltage of the power conversion device 1 and the output voltage of the power conversion device 2 may be generated by a difference between the collector-emitter saturation voltages of the switching elements 11 and 21. The collector-emitter saturation voltage is a voltage between the collector and the emitter in a state where the switching elements 11 and 21 are saturated. The difference between the output voltage of the power conversion device 1 and the output voltage of the power conversion device 2 may occur due to a difference in voltage drop of the gate drive circuits 12 and 22, an error in the pulse width of the gate signals G1 and G2, or an error in the gate voltage, in addition to a difference in the collector-emitter saturation voltage.

The power conversion system 100 according to embodiment 1 performs adjustment to match the output voltages output from the power conversion devices 1 and 2 by changing the level of the gate voltage applied to at least 1 of the power conversion devices 1 and 2 using the gate voltage adjustment circuit 3 shown in fig. 1. For example, in the power conversion system 100, when the total of the power that can be supplied by the power conversion devices 1 and 2 is 100%, it is targeted that each of the power conversion devices 1 and 2 is charged with 50% of the power supply. In the power conversion system 100, the load of power supply can be made uniform so that the load of power supply supplied from each of the power conversion devices 1 and 2 can be made to fall within a range of about 40% to 60%. In this way, the power conversion system 100 can drive the load devices by controlling the plurality of power conversion devices 1 and 2 so that the average power output from each of the plurality of power conversion devices 1 and 2 becomes uniform.

Fig. 5 is a diagram showing an example of a relationship between a collector current and a collector-emitter voltage in the switching elements 11 and 21 included in the power conversion system 100 shown in fig. 1. The vertical axis of the graph shown in FIG. 5 represents I as the collector current_C. The horizontal axis of the graph represents V as the collector-emitter voltage_CE. In FIG. 5, V is shown as the gate voltage_GEI in the case of 8V, 10V, 12V, 15V and 20V_CAnd V_CEA graph of the relationships of (1).

According to the graph shown in fig. 5, in the switching elements 11 and 21, there is a step V_GEBecome low, V_CEBecomes higher and follows V_GEBecome high, V_CEA lowered characteristic. In addition, in the switching elements 11 and 21, there is a step V_GEBecome low, I_CBecomes lower and follows V_GEBecome high, I_CHigh in the dielectric constant. The gate voltage adjusting circuit 3 changes the level of the gate voltage of the switching elements 11 and 21 by using the above-described characteristics, thereby adjusting the output voltage of the switching elements 11 and 21.

Although the current sensors 13A, 13B, 23A, and 23B normally measure instantaneous values of currents, in embodiment 1, for convenience, the current sensors 13A, 13B, 23A, and 23B output effective values of currents. When the current sensors 13A, 13B, 23A, and 23B output the effective values as the measurement results, the current sensors 13A, 13B, 23A, and 23B are provided with circuits for converting the instantaneous values into the effective values or arithmetic means for calculating the effective values from the instantaneous values. Such a circuit and arithmetic means may be provided in the gate voltage adjusting circuit 3 or the control device 4. The power conversion system 100 according to embodiment 1 is intended to control so that the average power output by each of the plurality of power conversion devices 1 and 2 becomes uniform. Therefore, performing control to match instantaneous values of currents and performing control to match effective values of currents have the same meaning as a result.

The current sensor 13A measures an effective value of the output current flowing through the output line 15A. The current sensor 13B measures an effective value of the output current flowing through the output line 15B. Thus, the current sensors 13A and 13B measure the effective value of the output current I1 output from the power conversion device 1, and output an electric signal indicating the measurement result to the gate voltage adjustment circuit 3.

The current sensor 23A measures an effective value of the output current flowing through the output line 25A. The current sensor 23B measures an effective value of the output current flowing through the output line 25B. Thus, the current sensors 23A and 23B measure the effective value of the output current I2 output from the power conversion device 2, and output an electric signal indicating the measurement result to the gate voltage adjustment circuit 3.

The gate voltage adjusting circuit 3 obtains a difference between the effective value of the output current I1 and the effective value of the output current I2. The gate voltage adjusting circuit 3 generates a feedback signal FB1 of the power converter 1 and a feedback signal FB2 of the power converter 2 based on the obtained difference. The gate voltage adjustment circuit 3 outputs a feedback signal FB1 to the power conversion device 1 and outputs a feedback signal FB2 to the power conversion device 2. The gate voltage adjusting circuit 3 generates feedback signals FB1 and FB2 for changing the levels of the gate signals G1 and G2 based on the result of comparing the output currents I1 and I2 from the plurality of power conversion devices 1 and 2, and adjusts the output voltages output from the plurality of power conversion devices 1 and 2 so as to match each other. Thus, the gate voltage adjusting circuit 3 performs adjustment to equalize the average voltages output from the power conversion devices 1 and 2. The adjustment for matching the output voltages output from the respective power conversion devices 1 and 2 includes not only the adjustment for making the voltage values of the output voltages of the power conversion devices 1 and 2 the same but also the adjustment for making the voltage values of the output voltages of the power conversion devices 1 and 2 close to each other.

When the effective value of the output current I1 is higher than the effective value of the output current I2, the output voltage of the power conversion device 1 is higher than the output voltage of the power conversion device 2. In this case, the gate voltage adjusting circuit 3 generates the feedback signal FB1 for lowering the level of the gate voltage circuit 10. The gate voltage adjustment circuit 3 outputs the generated feedback signal FB1 to each gate voltage circuit 10 of the power conversion device 1. The gate voltage circuit 10 reduces the level of the gate voltage by an amount corresponding to the level of the feedback signal FB 1. According to the relationship shown in fig. 5, the level of the gate voltage of the switching element 11 is lowered, and the collector current is reduced. The output voltage output by the switching element 11 decreases due to the decrease in the collector current. Thus, the gate voltage adjusting circuit 3 adjusts the level of the output voltage of the power conversion device 1 to be lower.

Alternatively, when the effective value of the output current I1 is higher than the effective value of the output current I2, the gate voltage adjustment circuit 3 generates the feedback signal FB2 for raising the level of the gate voltage circuit 20. Thus, the gate voltage adjusting circuit 3 adjusts the level of the output voltage of the power conversion device 2 to be higher.

In the case where the effective value of the output current I1 is lower than that of the output current I2, the gate voltage adjustment circuit 3 generates the feedback signal FB1 for raising the level of the gate voltage circuit 10 or the feedback signal FB2 for lowering the level of the gate voltage circuit 20. In this way, the gate voltage adjusting circuit 3 changes the gate voltage of the power conversion device 1 or the gate voltage of the power conversion device 2, thereby reducing the difference between the output voltages output from the power conversion devices 1 and 2. The gate voltage adjusting circuit 3 repeats a change in the gate voltage corresponding to a result of comparing the effective value of the output current I1 with the effective value of the output current I2, thereby converging the difference in the levels of the output voltages of the power conversion devices 1 and 2.

Each of the gate voltage circuits 10a, 10b, 10c, 10d adjusts the gate voltage in accordance with the feedback signal FB 1. Each of the gate voltage circuits 20a, 20b, 20c, 20d adjusts the gate voltage in accordance with the feedback signal FB 2. Thus, the gate voltage adjusting circuit 3 adjusts the output voltages output from the power conversion devices 1 and 2 to be equal to each other, thereby equalizing the average voltages output from the power conversion devices 1 and 2.

In addition, when the effective value of the output current I1 is higher than the effective value of the output current I2 or when the effective value of the output current I1 is lower than the effective value of the output current I2, the gate voltage adjustment circuit 3 may generate both the feedback signal FB1 for changing the level of the gate voltage circuit 10 and the feedback signal FB2 for changing the level of the gate voltage circuit 20. In this case, the gate voltage adjusting circuit 3 changes the output voltage of the power conversion device 1 and the output voltage of the power conversion device 2, thereby reducing the difference between the output voltages output from the power conversion devices 1 and 2. Thus, the gate voltage adjusting circuit 3 can adjust the output voltages output from the power conversion devices 1 and 2 to be equal to each other.

The power conversion system 100 can reduce the occurrence of a lateral current by adjusting the output voltages output from the power conversion devices 1 and 2 to be equal to each other. The power conversion system 100 can efficiently perform power conversion by reducing the occurrence of a lateral current. The power conversion system 100 can equalize the load of power supply supplied from each of the power conversion devices 1 and 2, and therefore, it is possible to reduce a situation in which one of the power conversion devices 1 and 2 becomes overloaded. This makes it possible for the power conversion system 100 to suppress the concentration of aged deterioration in one of the power conversion devices 1 and 2.

The power conversion system 100 can be configured similarly to the case where an existing power conversion device that is operated by a gate signal from the control device 4 alone is provided, except that the gate voltage adjustment circuit 3 is provided and the level of the gate voltage can be changed in the gate voltage circuits 10 and 20 by the feedback signals FB1 and FB 2. The addition or modification of the configuration for adjusting the output voltage of each of the power conversion devices 1 and 2 is not required to be performed for the software configuration of the control device 4. The control device 4 can be configured in the same manner as in the case of controlling the existing power conversion devices, except that it can output the gate signals G1 and G2 to the plurality of power conversion devices 1 and 2. The power conversion devices 1 and 2 can be configured in the same manner as existing power conversion devices, except that the level of the gate voltage can be changed. Thus, the power conversion system 100 can reduce addition to and change from an existing configuration. The power conversion system 100 can be configured to be simple and reduce the manufacturing cost by reducing the addition to and the change from the existing configuration.

According to embodiment 1, the power conversion system 100 includes the gate voltage adjusting circuit 3 that adjusts the output voltages output from the plurality of power conversion devices 1 and 2 to be equal to each other by changing the level of the gate voltage, and thus can reduce the difference in the output voltages of the power conversion devices 1 and 2 with a simple configuration. The power conversion system 100 reduces the difference in the output voltages of the power conversion devices 1 and 2, and adjusts the output currents flowing from the power conversion devices 1 and 2 to the load device so that the values of the output currents are close to each other, thereby making it possible to equalize the average powers output from the power conversion devices 1 and 2. Thus, the power conversion system 100 has an advantage that the plurality of power conversion devices 1 and 2 can be controlled so that the average power output from the power conversion devices 1 and 2 becomes uniform with a simple configuration.

The gate voltage adjusting circuit 3 may be configured to be any circuit as long as it can adjust the output voltages output from the plurality of power conversion devices 1 and 2 to be equal to each other by changing the level of the gate voltage applied to at least 1 of the plurality of power conversion devices 1 and 2. In embodiment 2, a configuration example of the gate voltage adjusting circuit 3 will be described.

Embodiment 2.

Fig. 6 is a diagram showing the gate voltage adjusting circuit 3 according to embodiment 2 of the present invention. The gate voltage adjusting circuit 3 receives an electric signal indicating an effective value of the output current I1 from the power conversion device 1 and an electric signal indicating an effective value of the output current I2 from the power conversion device 2. The gate voltage adjusting circuit 3 includes comparators 31 and 32.

An electric signal indicating an effective value of the output current I1 is input to the inverting input terminal of the comparator 31 and the non-inverting input terminal of the comparator 32. An electric signal indicating an effective value of the output current I2 is input to the non-inverting input terminal of the comparator 31 and the inverting input terminal of the comparator 32. The comparator 31 generates a feedback signal FB1 according to the difference between the effective value of the output current I1 and the effective value of the output current I2. The comparator 32 generates a feedback signal FB2 according to the difference between the effective value of the output current I1 and the effective value of the output current I2.

The gate voltage adjustment circuit 3 outputs a feedback signal FB1 to the power conversion device 1 and outputs a feedback signal FB2 to the power conversion device 2. Thus, the gate voltage adjusting circuit 3 can adjust the output voltages output from the respective power conversion devices 1 and 2 to be equal to each other based on the result of comparing the effective values of the output currents I1 and I2.

According to embodiment 2, since the power conversion system 100 adjusts the output voltages output from the power conversion devices 1 and 2 so that the output currents flowing from the power conversion devices 1 and 2 to the load device are also adjusted so that the values of the output currents are close to each other, the average powers output from the power conversion devices 1 and 2 can be equalized. Thus, the power conversion system 100 has an advantage that the plurality of power conversion devices 1 and 2 can be controlled so that the average power output from the power conversion devices 1 and 2 becomes uniform with a simple configuration.

Embodiment 3.

Fig. 7 is a diagram showing a power conversion system 101 according to embodiment 3 of the present invention. The gate voltage adjusting circuit 33 of the power conversion system 101 performs adjustment to match the output voltages output from the power conversion devices 1 and 2, based on the result of comparison between the output voltages V1 and V2 from the power conversion devices 1 and 2. In embodiment 3, the same components as those in embodiments 1 and 2 are denoted by the same reference numerals, and configurations different from those in embodiments 1 and 2 will be mainly described.

The power conversion device 1 includes current detection resistors 16A and 16B. The current detection resistor 16A is connected to the output line 15A. Current detection resistor 16B is connected to output line 15B. The power conversion device 2 includes current detection resistors 26A and 26B. Current detection resistor 26A is connected to output line 25A. Current detection resistor 26B is connected to output line 25B.

When a current flows through the current detection resistor 16A, a voltage drop occurs across the current detection resistor 16A. When a current flows through the current detection resistor 16B, a voltage drop occurs across the current detection resistor 16B. The control device 4 measures the currents flowing through the output lines 15A and 15B based on the voltage drops generated in the current detection resistors 16A and 16B and the resistance values of the current detection resistors 16A and 16B. The control device 4 generates a gate signal G1 for adjusting the pulse width so that the output voltage output from the power conversion device 1 becomes a target value, based on the measurement result of the current. The control device 4 sends the generated gate signal G1 to the gate drive circuit 12. The control device 4 also sends a gate signal G2, which is the same gate signal as the gate signal G1, to the gate driver circuit 22.

Both ends of the current detection resistors 16A and 16B are connected to a gate voltage adjusting circuit 33. The gate voltage adjusting circuit 33 detects the output voltage V1 of the power conversion device 1 from the voltage drop generated in the current detection resistors 16A and 16B. Both ends of the current detection resistors 26A and 26B are connected to a gate voltage adjusting circuit 33. The gate voltage adjusting circuit 33 detects the output voltage V2 of the power conversion device 2 based on the voltage drop generated in the current detection resistors 26A and 26B.

The gate voltage adjusting circuit 33 adjusts output voltages output from the power conversion devices 1 and 2 to be equal to each other by changing the level of the gate voltage applied to at least 1 of the power conversion devices 1 and 2. The gate voltage adjusting circuit 33 may be configured as desired, as long as the adjustment can be performed.

Fig. 8 is a diagram showing a configuration example of the gate voltage adjusting circuit 33 included in the power conversion system 101 shown in fig. 7. The gate voltage adjusting circuit 33 has comparators 34, 35 and arithmetic circuits 36, 37.

The arithmetic circuit 36 detects a voltage drop occurring across the current detection resistor 16A and a voltage drop occurring across the current detection resistor 16B. The arithmetic circuit 36 detects the output voltage V1 of the power conversion device 1 from the voltage drop generated in the current detection resistors 16A and 16B, and obtains an effective value of the output voltage V1. The arithmetic circuit 36 outputs an electric signal representing the effective value of the output voltage V1. The arithmetic circuit 37 detects a voltage drop occurring across the current detection resistor 26A and a voltage drop occurring across the current detection resistor 26B. The arithmetic circuit 37 detects the output voltage V2 of the power conversion device 2 from the voltage drop generated in the current detection resistors 26A and 26B, and obtains an effective value of the output voltage V2. The arithmetic circuit 37 outputs an electric signal indicating the effective value of the output voltage V2.

An electric signal indicating the effective value of the output voltage V1 is input to the inverting input terminal of the comparator 34 and the non-inverting input terminal of the comparator 35. An electric signal indicating the effective value of the output voltage V2 is input to the non-inverting input terminal of the comparator 34 and the inverting input terminal of the comparator 35. The comparator 34 generates the feedback signal FB1 according to the difference between the effective value of the output voltage V1 and the effective value of the output voltage V2. The comparator 35 generates the feedback signal FB2 according to the difference between the effective value of the output voltage V1 and the effective value of the output voltage V2.

The gate voltage adjustment circuit 33 outputs a feedback signal FB1 to the power conversion device 1 and outputs a feedback signal FB2 to the power conversion device 2. Thus, the gate voltage adjusting circuit 33 can adjust the output voltages output from the respective power conversion devices 1 and 2 so as to match each other, based on the result of comparing the effective values of the output voltages V1 and V2.

According to embodiment 3, the power conversion system 101 includes the gate voltage adjusting circuit 33 that adjusts the output voltages output from the plurality of power conversion devices 1 and 2 to be equal to each other by changing the level of the gate voltage, and thus can reduce the difference in the output voltages of the power conversion devices 1 and 2 with a simple configuration. The power conversion system 101 reduces the difference in the output voltages of the power conversion devices 1 and 2, and adjusts the output currents flowing from the power conversion devices 1 and 2 to the load device so that the values of the output currents are close to each other, thereby making it possible to equalize the average powers output from the power conversion devices 1 and 2. Thus, the power conversion system 101 has a simple configuration, and can control the plurality of power conversion devices 1 and 2 so that the average power output from the power conversion devices 1 and 2 is equalized.

Embodiment 4.

Fig. 9 is a diagram showing a power conversion system 102 according to embodiment 4 of the present invention. The power conversion system 102 includes gate voltage circuits 17 and 27. In embodiment 4, the same components as those in embodiments 1 to 3 are denoted by the same reference numerals, and configurations different from those in embodiments 1 to 3 will be mainly described.

The power conversion system 100 according to embodiment 1 performs adjustment to match the output voltages output from the respective power conversion devices of the plurality of power conversion devices 1 and 2 by adjusting the gate voltage by inputting the feedback signal FB1 to the respective gate voltage circuits of the gate voltage circuits 10a, 10b, 10c, and 10d and adjusting the gate voltage by inputting the feedback signal FB2 to the respective gate voltage circuits of the gate voltage circuits 20a, 20b, 20c, and 20 d. In embodiment 4, the power conversion device 1 is provided with a gate voltage circuit 17 instead of the gate voltage circuits 10a, 10b, 10c, and 10 d. In embodiment 4, the power conversion device 2 is provided with a gate voltage circuit 27 instead of the gate voltage circuits 20a, 20b, 20c, and 20 d.

The gate voltage circuits 17 and 27 are multi-output switching power supplies. The gate voltage circuit 17 outputs the gate voltage generated in accordance with the feedback signal FB1 to the gate drive circuits 12a, 12b, 12c, 12 d. The gate voltage circuit 27 outputs the gate voltage generated in accordance with the feedback signal FB2 to the gate drive circuits 22a, 22b, 22c, 22 d.

The gate voltage circuits 17 and 27 control 1 of the multiple outputs, and change the level of the gate voltage with respect to the control target. The gate voltage circuits 17 and 27 change the gate voltages for outputs other than the control target among the multi-outputs in conjunction with the change of the gate voltage for the control target. The gate voltage circuits 17 and 27 are configured to cause the gate voltage to be interlocked with the gate voltage of the control target by the same configuration of each output other than the control target as that of the output to be the control target, for example, by the same number of turns of the transformer. The power conversion system 102 may also include the same gate voltage adjustment circuit 3 as in embodiment 2 or the same gate voltage adjustment circuit 33 as in embodiment 3.

According to embodiment 4, the power conversion system 102 changes the gate voltage by the gate voltage circuits 17 and 27 in accordance with the feedback signals FB1 and FB2, and performs adjustment to match the output voltages output from the power conversion devices 1 and 2. The power conversion system 102 adjusts the output voltages output from the power conversion devices 1 and 2 so that the output currents flowing from the power conversion devices 1 and 2 to the load device are close to each other by adjusting the output voltages to be matched, and thus the average powers output from the power conversion devices 1 and 2 can be equalized. Thus, the power conversion system 102 has a simple configuration, and can control the plurality of power conversion devices 1 and 2 so that the average power output from the power conversion devices 1 and 2 is equalized.

The configuration described in the above embodiment is an example of the content of the present invention, and may be combined with other known techniques, or a part of the configuration may be omitted or modified within a range not departing from the gist of the present invention.