阅读说明：本技术 一种空间用太阳阵分流调节尖峰电流抑制电路 (Solar array shunting adjustment peak current suppression circuit for space ) 是由 熊友 王国军 孙清文 曹成荣 宋俊超 王腾 卢兴军 杨磊 李旭评 许祺峰 于 2020-10-26 设计创作，主要内容包括：本发明提供了一种空间用太阳阵分流调节尖峰电流抑制电路,其包括与分流调整功率管Q3连接的分流电流采样电路和驱动控制电路,所述分流电流采样电路采集流过所述分流功率管Q3的电流,当太阳电池阵寄生结电容不放电,通过分流调整功率管的电流小于尖峰电流设定阈值I时,分流调节尖峰电流抑制电路不工作,分流调整功率管Q3的驱动电压不受影响,分流调整功率管Q3正常工作；当太阳电池阵寄生结电容放电,通过分流调整功率管Q3的电流大于尖峰电流设定阈值I时,所述驱动控制电路会控制降低分流调整功率驱动电压,从而降低通过分流调整功率管Q3的尖峰电流。本发明的电路可适用于不同型号的分流调整功率管和不同串并联数目的太阳电池阵,调节方式简便。(The invention provides a solar array shunt regulation peak current suppression circuit for a space, which comprises a shunt current sampling circuit and a drive control circuit, wherein the shunt current sampling circuit is connected with a shunt regulation power tube Q3, the shunt current sampling circuit collects current flowing through a shunt power tube Q3, when parasitic junction capacitance of a solar cell array is not discharged and the current passing through the shunt regulation power tube is smaller than a peak current setting threshold value I, the shunt regulation peak current suppression circuit does not work, the drive voltage of the shunt regulation power tube Q3 is not influenced, and the shunt regulation power tube Q3 normally works; when the parasitic junction capacitance of the solar cell array discharges and the current passing through the shunt regulation power tube Q3 is larger than the peak current setting threshold I, the driving control circuit controls to reduce the shunt regulation power driving voltage, so that the peak current passing through the shunt regulation power tube Q3 is reduced. The circuit of the invention is suitable for shunt regulation power tubes of different models and solar cell arrays of different series-parallel numbers, and the regulation mode is simple and convenient.)

1. A solar array shunting regulation peak current suppression circuit for a space is characterized by comprising a shunting current sampling circuit and a driving control circuit, wherein the shunting current sampling circuit is connected with a shunting regulation power tube Q3, the shunting current sampling circuit collects current flowing through a shunting power tube Q3, when parasitic junction capacitance of a solar cell array is not discharged, and the current passing through the shunting regulation power tube is smaller than a peak current setting threshold value I, the driving control circuit does not work, the driving voltage of the shunting regulation power tube Q3 is not influenced, and the shunting regulation power tube Q3 works normally; when the parasitic junction capacitance of the solar cell array discharges and the current passing through the shunt regulation power tube Q3 is larger than the peak current setting threshold I, the driving control circuit controls to reduce the shunt regulation power driving voltage, so that the peak current passing through the shunt regulation power tube Q3 is reduced.

2. The spatial solar array shunt regulation peak current suppression circuit according to claim 1, wherein the peak current setting threshold I is determined by a shunt regulation power transistor Q3 model and a solar array parasitic junction capacitance value.

3. The solar array shunting regulation peak current suppression circuit for the space as set forth in claim 1, wherein the shunting peak current suppression value I is adjusted according to the rated current value of the drain-source electrode DS of the shunting regulation power tube Q3 of different models or according to the shunting regulation peak current suppression requirement for meeting different numbers of the solar arrays in series and parallel.

4. The solar array shunting regulation spike current suppression circuit for space use according to claim 1, wherein the shunting current sampling circuit comprises a secondary power supply Vc, a resistor R1, a resistor R2, a resistor R3, a mirroring triode Q1 and a current sampling resistor R4, the driving control circuit comprises a control triode Q2, a collector electrode of the control triode Q2 is connected with a grid electrode of the shunting regulation power tube Q3,

an input end TY of the solar cell array is connected with a drain electrode of the shunt adjusting power tube Q3, a source electrode of the shunt adjusting power tube Q3 is connected with a power end of the current sampling resistor R4, the other power end of the current sampling resistor R4 is connected with an input loop of the solar cell array, the current sampling resistor R4 is provided with two sampling ends,

the secondary power supply Vc is connected with one end of the resistor R1, the other end of the resistor R1 is connected with a collector at one side of the mirroring triode Q1 and is also connected with a base electrode of the control triode Q2, and an emitter at the side of the mirroring triode Q1 is connected with a sampling end of the current sampling resistor R4; the secondary power supply Vc is further connected with one end of the resistor R2, the other end of the resistor R2 is connected with a collector on the other side of the mirroring triode Q1, the collector on the other side of the mirroring triode Q1 is further connected with a base of the mirroring triode Q1, an emitter on the other side of the mirroring triode Q1 is connected with one end of the resistor R3, and the other end of the resistor R3 is connected with the other sampling end of the current sampling resistor R4.

5. The spatial solar array shunt regulation spike current suppression circuit as claimed in claim 4, wherein the shunt regulation spike current suppression circuit reduces the shunt regulation spike current value by reducing a resistance value of a resistor R3.

6. The spatial solar array shunt regulation peak current suppression circuit according to claim 4, wherein the type of the mirroring triode Q1 is 2N2920, the type of the current sampling resistor R4 is RX906-3W-0.01 Ω, and the secondary power supply Vc is 12V.

7. The spatial solar array shunt regulation spike current suppression circuit of claim 4, wherein the drive control circuit further comprises: a resistor R5, a resistor R6,

the PWM drive signal is connected to resistance R5 one end, the other end with the collecting electrode of control triode Q2 links to each other, the collecting electrode of control triode Q2 still simultaneously with the grid of reposition of redundant personnel adjustment power tube Q3 links to each other, the projecting pole of control triode Q2 with the one end of resistance R6 links to each other, the other end of resistance R6 links to each other with generating line ground.

8. The spatial solar array shunt regulation peak current suppression circuit of claim 7, wherein the control transistor Q2 is of type 2N 3700.

9. The solar array shunt regulation peak current suppression circuit for the space, according to claim 7, wherein the driving voltage of the shunt regulation power transistor Q3 is less than 3V, and the resistor R5 is 100-200 ohms.

10. The spatial solar array shunt regulation peak current suppression circuit according to claim 1, wherein when a current passing through the shunt regulation power transistor Q3 is greater than the shunt regulation peak current setting threshold I, the shunt regulation peak current is reduced to a shunt peak current suppression value, and the shunt peak current suppression value is controlled within a range from 17A to 21A.

Technical Field

The invention relates to the technical field of aerospace power supply control, in particular to a solar array shunting regulation peak current suppression circuit for a space.

Background

At present, most satellite working power supplies are mainly provided by electric energy generated by the photoelectric effect of a solar cell array. The three-junction GaAs cell has high photoelectric conversion efficiency (26-32%), and is widely applied to the monolithic fabrication of satellite solar cell arrays at present.

The solar cell array mainly comprises solar cells, and in order to obtain stable bus voltage and meet the power requirement of the whole satellite load, solar cell single sheets need to be connected in series and in parallel. Wherein the required bus voltage is obtained by connecting the solar cell single sheets in series, and the required load power is obtained by connecting the solar cell single sheets in parallel.

Because the basic structure of the solar cell slice is a PN junction, and the capacitance effect is the basic characteristic of the PN junction, the parasitic junction capacitance of the solar cell array can be increased when the solar cell slices are connected in parallel. At present, a satellite power supply controller mainly adopts a sequential shunt regulation method to realize the regulation of the power of a solar cell array, namely, the solar cell array is divided into a plurality of shunt regulation sub-arrays, and each shunt regulation sub-array is controlled by a sequential shunt regulation sub-circuit. Fig. 1 is a schematic diagram of the generation of shunt regulation spike current in the prior art. When the shunt regulator subcircuit shunts, due to the existence of parasitic junction capacitance of the solar cell array, the power tube is conducted at the moment of shunt regulation, as shown in fig. 1It will generate a shunt regulation peak current i on the shunt regulation power tube_aShunting regulation of peak current i_aExpressed by the formula: i.e. i_a＝i_c+i_SAWherein i_SAThe output current of the solar cell array is shown, and ic is the junction capacitance instantaneous discharge current. Because parasitic junction capacitance discharges instantaneously and can produce great shunt regulation peak current, the shunt regulation peak current can be far greater than the shunt capacity of the shunt circuit, even exceeds the rated current value of the shunt regulation power tube. If the instantaneous shunt regulation peak current is larger than the current-tolerant value which can be borne by the shunt regulation power tube, the shunt regulation peak current is not inhibited, the risk of overcurrent breakdown is brought to the shunt regulation power tube, the shunt regulation power tube is impacted or even damaged along with the lapse of time, the series disorder of a shunt regulation circuit of the satellite power supply controller occurs, the peak value and the frequency of bus ripple waves are increased, the heat loss of the power supply controller is increased, the stability of a power supply bus is influenced, and the influence of the parasitic junction capacitance of the solar cell array on the shunt regulation circuit is paid high attention.

In order to ensure that the shunt regulation circuit can operate durably and reliably, the solar array shunt regulation peak current suppression circuit is an indispensable key technology.

Disclosure of Invention

In order to solve the technical problem, the invention provides a solar array shunting regulation peak current suppression circuit for a space, which comprises a shunting current sampling circuit and a driving control circuit, wherein the shunting current sampling circuit and the driving control circuit are connected with a shunting regulation power tube Q3, the shunting current sampling circuit collects current flowing through a shunting power tube Q3, when parasitic junction capacitance of a solar cell array is not discharged, and the current passing through the shunting regulation power tube is smaller than a peak current setting threshold value I, the driving control circuit does not work, the driving voltage of the shunting regulation power tube Q3 is not influenced, and the shunting regulation power tube Q3 normally works; when the parasitic junction capacitance of the solar cell array discharges and the current passing through the shunt regulation power tube Q3 is larger than the peak current setting threshold I, the driving control circuit controls to reduce the shunt regulation power driving voltage, so that the peak current passing through the shunt regulation power tube Q3 is reduced. The driving control circuit controls to reduce the shunt regulation power driving voltage, so that the on-resistance of the shunt regulation power tube Q3 is increased, and the shunt regulation peak current is consumed by the shunt regulation power tube Q3, thereby reducing the peak current passing through the shunt regulation power tube Q3.

The peak current setting threshold I may be determined by the shunt regulation power transistor Q3 model and the capacitance of the parasitic junction capacitor of the solar array.

The shunt peak current suppression value I may be adjusted according to the rated current value of the drain-source electrode DS of the shunt regulation power transistor Q3 of different models or according to the shunt regulation peak current suppression requirement that meets different numbers of series-parallel solar arrays.

The shunt current sampling circuit may include a secondary power source Vc, a resistor R1, a resistor R2, a resistor R3, a mirroring transistor Q1, and a current sampling resistor R4, the driving control circuit includes a control transistor Q2, a collector of the control transistor Q2 is connected to a gate of the shunt regulation power transistor Q3,

an input end TY of the solar cell array is connected with a drain electrode of the shunt adjusting power tube Q3, a source electrode of the shunt adjusting power tube Q3 is connected with a power end of the current sampling resistor R4, the other power end of the current sampling resistor R4 is connected with an input loop of the solar cell array, the current sampling resistor R4 is provided with two sampling ends,

the secondary power supply Vc is connected with one end of the resistor R1, the other end of the resistor R1 is connected with a collector at one side of the mirroring triode Q1 and is also connected with a base electrode of the control triode Q2, and an emitter at the side of the mirroring triode Q1 is connected with a sampling end of the current sampling resistor R4; the secondary power supply Vc is further connected with one end of the resistor R2, the other end of the resistor R2 is connected with a collector on the other side of the mirroring triode Q1, the collector on the other side of the mirroring triode Q1 is further connected with a base of the mirroring triode Q1, an emitter on the other side of the mirroring triode Q1 is connected with one end of the resistor R3, and the other end of the resistor R3 is connected with the other sampling end of the current sampling resistor R4.

It is possible that the shunt regulation spike current suppression circuit reduces the shunt regulation spike current value by reducing the resistance value of the resistor R3.

The model of the mirroring triode Q1 is 2N2920, the model of the current sampling resistor R4 is RX906-3W-0.01 Ω, and the secondary power supply Vc is 12V.

It may be that the drive control circuit further includes: the PWM driving circuit comprises a resistor R5 and a resistor R6, wherein one end of the resistor R5 is connected with a PWM driving signal, the other end of the resistor R5 is connected with a collector of a control triode Q2, the collector of the control triode Q2 is also connected with a grid of a shunt adjusting power tube Q3, an emitter of the control triode Q2 is connected with one end of the resistor R6, and the other end of the resistor R6 is connected with a bus ground.

The control transistor Q2 may be of the type 2N 3700.

The driving voltage of the shunt regulation power tube Q3 is less than 3V, and the resistance R5 is 100-200 ohms.

When the current passing through the shunt regulation power transistor Q3 is greater than the shunt regulation peak current setting threshold I, the shunt regulation peak current may be reduced to a shunt peak current suppression value, and the shunt peak current suppression value may be controlled to be in a range of 17A to 21A.

Compared with the existing suppression mode of series inductance, the suppression circuit has the advantages of simple structure, small volume, light weight, high reliability and small influence by space environment, and is suitable for shunt regulation power tubes of different models and solar cell arrays of different series-parallel numbers; the shunt regulation peak current value is controllable, the shunt peak current suppression value can be adjusted according to actual needs, and the regulation mode is simple and convenient.

In addition, when the triode pair transistor 2N2920 is adopted in the circuit to replace two discrete triodes, the triode has the characteristics of small volume, good output parameter symmetry, good temperature characteristic and the like, and can effectively avoid the problems that the peak suppression value is unstable and the influence of temperature influence change is caused by individual performance difference and the change of amplification factor influenced by temperature when the discrete triodes are adopted.

Drawings

Fig. 1 is a schematic diagram of the generation of shunt regulation spike current in the prior art.

Fig. 2 is a schematic diagram of the solar array shunt regulation spike current suppression circuit for space of the invention.

Fig. 3 is a control waveform diagram of the spatial solar array shunt regulation peak current suppression circuit of the invention.

Detailed Description

The spatial solar array shunt regulation spike current suppression circuit of the present invention will be described in further detail with reference to fig. 2 to 3.

The principle of the solar array shunting regulation peak current suppression circuit for the space is as follows: a method of adopting a regulation control loop for restraining shunt regulation peak current of a shunt regulation power tube is characterized in that the characteristic of the relation between the driving voltage (voltage between a grid source electrode GS) of the shunt regulation power tube and the current flowing through a drain source electrode DS is utilized, namely the higher the driving voltage of the shunt regulation power tube is, the larger the current flowing through the drain source electrode DS is, the smaller the driving voltage of the shunt regulation power tube is, the smaller the current flowing through the drain source electrode DS is, and the magnitude of the driving voltage of the shunt regulation power tube is regulated to restrain the shunt regulation peak current flowing through the drain source electrode DS.

Fig. 2 is a schematic diagram of the solar array shunt regulation spike current suppression circuit for space of the invention. As shown in fig. 2, the solar array shunting regulation spike current suppression circuit for space provided by the invention comprises a shunting current sampling circuit and a driving control circuit, wherein the shunting current sampling circuit is connected with a shunting regulation power tube Q3 and comprises a resistor R1, a resistor R2, a resistor R3, a mirror triode Q1 and a current sampling resistor R4; the drive control circuit includes: a resistor R5, a resistor R6, a control triode Q2 and a secondary power supply Vc. The secondary power source Vc may be selected according to actual conditions, and is, for example, 12V.

A secondary power supply Vc is connected with one end of a resistor R1, the other end of the resistor R1 is connected with a collector at one side of a mirroring triode Q1 and is also connected with a base electrode of a control triode Q2, and an emitter at the side of the mirroring triode Q1 is connected with a sampling end of a current sampling resistor R4; the secondary power supply Vc is also connected with one end of a resistor R2, the other end of the resistor R2 is connected with the collector of the other side of the mirroring triode Q1, the collector of the mirroring triode Q1 is connected with the base of the mirroring triode Q1, the emitter of the mirroring triode Q1 is connected with one end of a resistor R3, and the other end of the resistor R3 is connected with the sampling end of the current sampling resistor R4.

One end of the resistor R5 is connected with the PWM driving signal, the other end is connected with the collector of the control triode Q2, the collector of the control triode Q2 is also connected with the grid of the shunt regulation power tube Q3, the emitter of the control triode Q2 is connected with one end of the resistor R6, and the other end of the resistor R6 is connected with the bus ground.

An input end TY of the solar cell array is connected with a drain electrode D of a shunt adjusting power tube Q3, a source electrode S of a shunt adjusting power tube Q3 is connected with a power end of a current sampling resistor R4, and the other power end of the current sampling resistor R4 is connected with an input return wire of the solar cell array.

The main working principle is as follows:

when the parasitic junction capacitance of the solar cell array is not discharged, when the current passing through the shunt regulation power tube Q3 is smaller than a shunt regulation peak current setting threshold (the threshold is a variable and is mainly determined by factors such as the model of the shunt regulation power tube Q3 and the capacitance value of the parasitic junction capacitance of the solar cell array), the driving control circuit does not work, the driving voltage of the shunt regulation power tube Q3 is not influenced, and the shunt regulation power tube Q3 works normally.

When the parasitic junction capacitor of the solar cell array discharges, if the current passing through the shunt regulation power tube Q3 is larger than a shunt regulation peak current setting threshold (the threshold is a variable and is mainly determined by factors such as the model of the shunt regulation power tube Q3 and the capacitance value of the parasitic junction capacitor of the solar cell array), the shunt regulation peak current suppression circuit increases the conduction impedance of the shunt regulation power tube Q3 by controlling the driving voltage of the shunt regulation power tube, the shunt regulation peak current is controlled to be the shunt regulation peak current setting threshold, and the shunt regulation peak current is consumed on the shunt regulation power tube, so that the aim of reducing the shunt regulation peak current is fulfilled.

When the current passing through the shunt regulation power tube Q3 is larger than the shunt regulation peak current setting threshold, the triode Q2 is controlled to be switched on, the PWM high level for providing the drive voltage for the shunt regulation power tube Q3 enables the drive voltage of the shunt regulation power tube Q3 to be reduced due to the voltage division effect of the resistor R5 and the resistor R6, and then the current between the drain and the source of the shunt regulation power tube Q3 is reduced, so that the shunt regulation peak current is restrained. The value of the resistor R3 is related to the magnitude of the shunt peak current suppression value, and when the shunt regulation peak current is larger than the shunt regulation peak current setting threshold, the aim of reducing the shunt regulation peak current value can be achieved by reducing the resistance value of the resistor R3. Similarly, when the shunt regulation peak current is smaller than the shunt regulation peak current setting threshold, the shunt regulation peak current value can be increased by increasing the resistance value of the resistor R3. Therefore, the shunt regulation peak current setting threshold can be adjusted according to actual needs, and the regulation mode is simple and convenient.

The solar array shunting regulation peak current suppression circuit for the space has wider applicability, and has the main applicability characteristics that:

the drain-source (DS) rated current values of the shunt regulator power transistors Q3 of different models are also different, and in order to ensure that the shunt regulator power transistor Q3 operates normally, the shunt peak current suppression value is required to be smaller than the drain-source rated current value of the shunt regulator power transistor Q3. The invention is suitable for shunt regulation power tubes Q3 of different models, and the shunt peak current suppression value can be regulated according to the Drain Source (DS) rated current value of the shunt regulation power tube Q3 of different models.

The power requirements of different models are different, the serial and parallel connection numbers of the solar cell arrays of different models are different, the capacitance values of parasitic junctions of the solar cell arrays are different, and the shunt regulation peak current values are different.

In the solar array shunting regulation peak current suppression circuit for the space, the triode pair transistor 2N2920 is adopted to replace two discrete triodes, the triode has the characteristics of small volume, good output parameter symmetry, good temperature characteristic and the like, and the instability of a peak suppression value and the influence of temperature-influenced change caused by individual performance difference and temperature-influenced amplification factor change due to the adoption of the discrete triodes can be effectively avoided. The mirror transistor Q1 is preferably of the type 2N 2920. In addition, the control transistor Q2 is preferably 2N3700 in size. The current sampling resistor R4 is of the type RX906-3W-0.01 omega. The shunt peak current suppression value of each shunt circuit in the space power supply is controlled within a range of 17A to 21A.

In order to obtain a good shunt regulation spike current suppression effect, it is generally required that when the transistor Q2 is turned on, the driving voltage VGS of the shunt regulation power transistor Q3 is less than 3V (Vm × R6)/(R5+ R6), where Vm is a PWM high level. Because the resistor R5 is connected with the grid S of the shunt regulation power tube Q3, and the resistor R5 can directly influence the switching speed of the shunt regulation power tube Q3, the value of the resistor R5 is not suggested to be too large, and 100-200 ohms is generally recommended.

In order to prevent the shunt regulation peak current from damaging the shunt regulation power tube Q3, it is generally required that the smaller the shunt peak current suppression value is, the better the shunt regulation power tube Q3 is, but if the shunt peak current suppression value is smaller, the heat consumption of the shunt regulation power tube Q3 during operation is increased, and in order to avoid the over-heating of the shunt regulation power tube due to the too small shunt peak current suppression value, the shunt peak current suppression value of each shunt circuit in the space power supply is required to be controlled within a range of 17A to 21A.

Verification example

Ground verification is carried out on the suppression condition of the shunt regulation peak current, and the setting conditions are as follows: the solar array simulator outputs current 8A, the output end of the solar array simulator is connected with a 600nF capacitor in parallel, and load current is set to be 4A. Fig. 3 is a control waveform diagram of the spatial solar array shunt regulation peak current suppression circuit of the invention. Wherein the upper waveform is the drive voltage waveform between the gate and the source (i.e., G and S) of the shunt regulator power transistor Q3, and the lower waveform is the current waveform through the drain-source (DS) of the shunt regulator power transistor Q3; as can be seen from fig. 3, when the current is not shunted, the driving voltage (the voltage between G and S) between the gate and the source (GS) of the shunt regulator Q3 is 0V, the drain and the source (DS) are not turned on, and the operation of the shunt regulator Q3 is not affected by the shunt regulation peak current suppression circuit; during shunting, in the switching-on process of a Drain Source (DS) of a shunting adjusting power tube Q3, a shunting adjusting peak current suppression circuit works, the shunting adjusting peak current of the shunting adjusting power tube Q3 is controlled within 17.6A, the shunting adjusting peak current is well controlled, and the driving voltage (voltage between G and S) of the shunting adjusting power tube Q3 is stable in the switching-on process; after the shunt regulation power tube Q3 is switched on, the driving voltage is stabilized at 11.8V and is not influenced by the shunt regulation peak current suppression circuit, and the shunt regulation power tube Q3 works normally.

It can be seen through verification that when the current flowing through the shunt regulation power tube reaches the shunt regulation peak current setting threshold (the threshold is a variable and is mainly determined by factors such as the model of the shunt regulation power tube Q3 and the capacitance value of the parasitic junction capacitor of the solar array), the driving voltage of the shunt regulation power tube is reduced, the current passing through the shunt regulation power tube can be limited within a certain range, and the driving voltage of the shunt regulation power tube is recovered to a normal driving value along with the gradual reduction of the shunt regulation peak current. Verification results show that the shunt regulation peak current suppression circuit can well play a role in suppressing shunt regulation peak current.

Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make variations and modifications of the present invention without departing from the spirit and scope of the present invention by using the methods and technical contents disclosed above.