阅读说明：本技术 一种适用于刷脸终端自适应电源输入的多功能底座及方法 (Multifunctional base and method suitable for face-brushing terminal self-adaptive power input ) 是由 林荣 李宗宇 邱文庆 丘春碧 林元宁 卢建旭 于 2020-10-16 设计创作，主要内容包括：本发明提供了一种适用于刷脸终端自适应电源输入的多功能底座及方法,所述多功能底座用于连接适配器,包括一CPU,所述CPU连接至所述适配器；一PMOS开关电路,所述PMOS开关电路分别连接所述CPU以及适配器,用于给外设供电；以及一DCDC电路,所述DCDC电路分别连接所述CPU以及适配器,用于给外设供电,多功能底座自适应不同电压电源输入,适配不同电源需求的刷脸终端。(The invention provides a multifunctional base and a method suitable for self-adaptive power input of a face brushing terminal, wherein the multifunctional base is used for connecting an adapter and comprises a CPU (central processing unit), and the CPU is connected to the adapter; the PMOS switch circuit is respectively connected with the CPU and the adapter and is used for supplying power to peripheral equipment; and the DCDC circuit is respectively connected with the CPU and the adapter and used for supplying power to external equipment, and the multifunctional base is adaptive to different voltage power supplies for input and is adaptive to face brushing terminals with different power supply requirements.)

1. The utility model provides a multifunctional base suitable for brush face terminal self-adaptation power input for connect the adapter, its characterized in that: the system comprises a CPU, a data processing unit and a data processing unit, wherein the CPU is connected to the adapter;

the PMOS switch circuit is respectively connected with the CPU and the adapter and is used for supplying power to peripheral equipment;

and the DCDC circuit is respectively connected with the CPU and the adapter and used for supplying power to external equipment.

2. The multifunctional base for the face-brushing terminal adaptive power input of claim 1, wherein: the PMOS switch circuit comprises a PMOS transistor U2, a capacitor C13, a capacitor C14, a capacitor C19, a resistor R11, a resistor R12, a resistor R13, a resistor R14 and a triode Q3, wherein the adapter is respectively connected with one end of the capacitor C13, one end of the capacitor C14, one end of the capacitor C19, one end of the resistor R11, a pin S1 of a PMOS transistor U2, a pin S2 of the PMOS transistor U2 and a pin S3 of the PMOS transistor U2; a pin D1 of the PMOS transistor U2, a pin D2 of the PMOS transistor U2, a pin D3 of the PMOS transistor U2 and a pin D4 of the PMOS transistor U2 are connected in parallel and then supply power to the external equipment; the other end of the capacitor C19, the other end of the resistor R11 and a pin G of the PMOS transistor U2 are connected in parallel to one end of the resistor R12, the resistor R12 is connected to the C electrode of the transistor Q3, the CPU is connected to the B electrode of the transistor Q3 and one end of the resistor R14 through a resistor R13, and the other end of the resistor R14 and the E electrode of the transistor Q3 are both grounded.

3. The multifunctional base for the face-brushing terminal adaptive power input of claim 2, wherein: the PMOS switch circuit further comprises a capacitor C15, a capacitor C16, a capacitor C17 and a capacitor C18, wherein a pin D1 of the PMOS transistor U2, a pin D2 of the PMOS transistor U2, a pin D3 of the PMOS transistor U2 and a pin D4 of the PMOS transistor U2 are connected in parallel and then respectively connected with one end of the capacitor C15, one end of the capacitor C16, one end of the capacitor C17 and one end of the capacitor C18; the other end of the capacitor C15, the other end of the capacitor C16, the other end of the capacitor C17, and the other end of the capacitor C18 are all grounded.

4. The multifunctional base for the face-brushing terminal adaptive power input of claim 1, wherein: the DCDC circuit comprises a DCDC chip, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C12, an inductor L2, a resistor R7, a resistor R8, a resistor R9 and a resistor R10, the adapter is respectively connected with one end of the capacitor C6, one end of the capacitor C7 and a pin IN of the DCDC chip, the CPU is connected to one end of a pin EN and one end of an electron R10 of the DCDC chip through a resistor R9, a pin BS of the DCDC chip is connected with a pin LX of the DCDC chip IN parallel through a capacitor C5 and then connected to one end of an inductor L1, a pin FB of the DCDC chip is respectively connected with one end of the resistor R8, one end of the resistor R7 and one end of the capacitor C12, and the other end of the resistor R3642, the other end of the capacitor C12 and the other end; the other end of the resistor R10, the pin GND of the DCDC chip and the other end of the resistor R8 are all grounded.

5. The multifunctional base for the face-brushing terminal adaptive power input of claim 4, wherein: the DCDC circuit further comprises a capacitor C8, a capacitor C9, a capacitor C10 and a capacitor C11, the other end of the resistor R7, the other end of the capacitor C12 and the other end of the inductor L1 are connected in parallel and then respectively connected with one end of the capacitor C8, one end of the capacitor C9, one end of the capacitor C10 and one end of the capacitor C11, and the other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10 and the other end of the capacitor C11 are all grounded.

6. A method for a multifunctional base adapted for a face-brushing terminal adaptive power input, for connecting an adapter, said method providing said multifunctional base of any one of claims 1 to 5; the method specifically comprises the following steps:

the CPU judges the input voltage of the adapter through ADC sampling, and if the voltage of the adapter is lower than 4V or greater than 16V, the CPU judges that the adapter has errors; if the voltage of the adapter is more than or equal to 4V and less than or equal to 5.4V, the CPU controls the PMOS switch circuit to be started, the DCDC circuit is closed, and the voltage is output to supply power to the peripheral equipment; if the voltage of the adapter is more than 5.4V and less than or equal to 16V, the PMOS switch circuit is controlled to be closed, the DCDC circuit is controlled to be opened, and the DCDC circuit is controlled to output voltage to supply power to the peripheral equipment.

Technical Field

The invention relates to a multifunctional base and a method suitable for self-adaptive power input of a face brushing terminal.

Background

With the arrival of the face brushing payment era, face brushing terminals in the market are generally emerged like bamboo shoots in spring after rain; the face brushing terminal is matched with the multifunctional base to be the most competitive selling point at present. A multifunctional base carrying different face brushing devices rarely appears in the market, and besides the incompatibility of the structures, the requirements of the face brushing terminal on power supply input voltage are different and are also important reasons. The design of a multifunctional base means that the authentication cost and the design cost are doubled.

Disclosure of Invention

The invention aims to solve the technical problem of providing a multifunctional base and a method suitable for the face brushing terminal to be self-adaptive to power supply input.

One of the present invention is realized by: a multifunctional base suitable for a face-brushing terminal self-adaptive power supply input is used for connecting an adapter and comprises a CPU (central processing unit), wherein the CPU is connected to the adapter;

the PMOS switch circuit is respectively connected with the CPU and the adapter and is used for supplying power to peripheral equipment;

and the DCDC circuit is respectively connected with the CPU and the adapter and used for supplying power to external equipment.

Further, the PMOS switch circuit includes a PMOS transistor U2, a capacitor C13, a capacitor C14, a capacitor C19, a resistor R11, a resistor R12, a resistor R13, a resistor R14, and a transistor Q3, wherein the adaptor is respectively connected to an end of the capacitor C13, an end of the capacitor C14, an end of the capacitor C19, an end of the resistor R11, a pin S1 of the PMOS transistor U2, a pin S2 of the PMOS transistor U2, and a pin S3 of the PMOS transistor U2; a pin D1 of the PMOS transistor U2, a pin D2 of the PMOS transistor U2, a pin D3 of the PMOS transistor U2 and a pin D4 of the PMOS transistor U2 are connected in parallel and then supply power to the external equipment; the other end of the capacitor C19, the other end of the resistor R11 and a pin G of the PMOS transistor U2 are connected in parallel to one end of the resistor R12, the resistor R12 is connected to the C electrode of the transistor Q3, the CPU is connected to the B electrode of the transistor Q3 and one end of the resistor R14 through a resistor R13, and the other end of the resistor R14 and the E electrode of the transistor Q3 are both grounded.

The PMOS switch circuit further includes a capacitor C15, a capacitor C16, a capacitor C17, and a capacitor C18, wherein a pin D1 of the PMOS transistor U2, a pin D2 of the PMOS transistor U2, a pin D3 of the PMOS transistor U2, and a pin D4 of the PMOS transistor U2 are connected in parallel and then respectively connected to an end of the capacitor C15, an end of the capacitor C16, an end of the capacitor C17, and an end of the capacitor C18; the other end of the capacitor C15, the other end of the capacitor C16, the other end of the capacitor C17, and the other end of the capacitor C18 are all grounded.

Further, the DCDC circuit includes a DCDC chip, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C12, an inductor L2, a resistor R7, a resistor R8, a resistor R9 and a resistor R10, the adaptor is respectively connected to one end of the capacitor C6, one end of the capacitor C7 and a pin IN of the DCDC chip, the CPU is connected to one end of a pin EN and one end of an electron R10 of the DCDC chip through a resistor R9, the pin BS of the DCDC chip is connected IN parallel with a pin LX of the DCDC chip through a capacitor C5 and then connected to one end of an inductor L1, the pin FB of the DCDC chip is respectively connected to one end of the resistor R8, one end of the resistor R7 and one end of the capacitor C12, and the other end of the resistor R7, the other end of the capacitor C12 and the other end of the; the other end of the resistor R10, the pin GND of the DCDC chip and the other end of the resistor R8 are all grounded.

The DCDC circuit further includes a capacitor C8, a capacitor C9, a capacitor C10, and a capacitor C11, wherein the other end of the resistor R7, the other end of the capacitor C12, and the other end of the inductor L1 are connected in parallel and then respectively connected to the one end of the capacitor C8, the one end of the capacitor C9, the one end of the capacitor C10, and the one end of the capacitor C11, and the other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10, and the other end of the capacitor C11 are all.

The second invention is realized by the following steps: a method for a multifunctional base suitable for a face brushing terminal self-adaptive power input needs to provide the multifunctional base in any one of the invention; the method specifically comprises the following steps:

the CPU judges the input voltage of the adapter through ADC sampling, and if the voltage of the adapter is lower than 4V or greater than 16V, the CPU judges that the adapter has errors; if the voltage of the adapter is more than or equal to 4V and less than or equal to 5.4V, the CPU controls the PMOS switch circuit to be started, the DCDC circuit is closed, and the voltage is output to supply power to the peripheral equipment; if the voltage of the adapter is more than 5.4V and less than or equal to 16V, the PMOS switch circuit is controlled to be closed, the DCDC circuit is controlled to be opened, and the DCDC circuit is controlled to output voltage to supply power to the peripheral equipment.

The invention has the advantages that: the multifunctional base of the face brushing terminal is adaptive to different voltage adapters, and can be compatible with face brushing terminals with different voltage inputs, so that great convenience is provided for enterprises with the requirements; not only does not need to worry about the smooth damage of the multifunctional base caused by using a wrong adapter, but also can greatly reduce the time cost and the money cost of development; and the loss of a terminal, peripheral damage and the like caused by the wrong use of the adapter by a client can be prevented.

Drawings

The invention will be further described with reference to the following examples with reference to the accompanying drawings.

Fig. 1 is a schematic diagram of a multifunctional base suitable for the face-brushing terminal adaptive power input according to the present invention.

Fig. 2 is a voltage dividing circuit diagram of a multifunctional base suitable for the face-brushing terminal adaptive power input according to the present invention.

Fig. 3 is a circuit diagram of a multifunctional base suitable for the face-brushing terminal adaptive power input according to the present invention.

Detailed Description

The general idea of the invention is as follows:

the method is mainly completed by 2 stages: ADC sampling phase, voltage conversion phase

An ADC sampling stage: after the adapter is connected, 3.3V voltage is configured through the voltage reduction DCDC to supply power to the CP U, and after the CPU works, the input voltage of the adapter is detected through the function of the ADC; the adapter voltage at this time must be processed by appropriate voltage division, as shown in fig. 2, R1/R2 voltage division, Vadc ═ Vdc ═ R1/(R1+ R2); the R1/R2 resistance value design requires that when the maximum voltage adapter is inserted, Vadc is smaller than the maximum voltage sampled by the CPU.

And (3) voltage conversion stage: the standard peripheral power supply voltage is 5V, and the conventional adapters of the face brushing terminal are 5V, 9V, 12V and the like. When the CPU samples and judges that the 5V adapter is inserted, the power can be directly supplied to the peripheral equipment through the PMOS switch circuit; when the CPU samples and judges that a 9V/12V adapter is inserted, 5V voltage is output to supply power to the peripheral through the voltage reduction DCDC design.

Example one

Referring to fig. 1 and 3, a multifunctional base for a face-brushing terminal adaptive power input according to the present invention is used for connecting an adapter, and includes a CPU connected to the adapter;

the PMOS switch circuit is respectively connected with the CPU and the adapter and is used for supplying power to peripheral equipment;

and the DCDC circuit is respectively connected with the CPU and the adapter and used for supplying power to external equipment.

The PMOS switch circuit comprises a PMOS transistor U2, a capacitor C13, a capacitor C14, a capacitor C19, a resistor R11, a resistor R12, a resistor R13, a resistor R14 and a triode Q3, wherein the adapter is respectively connected with one end of the capacitor C13, one end of the capacitor C14, one end of the capacitor C19, one end of the resistor R11, a pin S1 of a PMOS transistor U2, a pin S2 of the PMOS transistor U2 and a pin S3 of the PMOS transistor U2; a pin D1 of the PMOS transistor U2, a pin D2 of the PMOS transistor U2, a pin D3 of the PMOS transistor U2 and a pin D4 of the PMOS transistor U2 are connected in parallel and then supply power to the external equipment; the other end of the capacitor C19, the other end of the resistor R11 and a pin G of the PMOS transistor U2 are connected in parallel to one end of the resistor R12, the resistor R12 is connected to the C electrode of the transistor Q3, the CPU is connected to the B electrode of the transistor Q3 and one end of the resistor R14 through a resistor R13, and the other end of the resistor R14 and the E electrode of the transistor Q3 are both grounded.

The PMOS switch circuit further comprises a capacitor C15, a capacitor C16, a capacitor C17 and a capacitor C18, wherein a pin D1 of the PMOS transistor U2, a pin D2 of the PMOS transistor U2, a pin D3 of the PMOS transistor U2 and a pin D4 of the PMOS transistor U2 are connected in parallel and then respectively connected with one end of the capacitor C15, one end of the capacitor C16, one end of the capacitor C17 and one end of the capacitor C18; the other end of the capacitor C15, the other end of the capacitor C16, the other end of the capacitor C17, and the other end of the capacitor C18 are all grounded.

The DCDC circuit comprises a DCDC chip, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C12, an inductor L2, a resistor R7, a resistor R8, a resistor R9 and a resistor R10, the adapter is respectively connected with one end of the capacitor C6, one end of the capacitor C7 and a pin IN of the DCDC chip, the CPU is connected to one end of a pin EN and one end of an electron R10 of the DCDC chip through a resistor R9, a pin BS of the DCDC chip is connected with a pin LX of the DCDC chip IN parallel through a capacitor C5 and then connected to one end of an inductor L1, a pin FB of the DCDC chip is respectively connected with one end of the resistor R8, one end of the resistor R7 and one end of the capacitor C12, and the other end of the resistor R3642, the other end of the capacitor C12 and the other end; the other end of the resistor R10, the pin GND of the DCDC chip and the other end of the resistor R8 are all grounded.

The DCDC circuit further comprises a capacitor C8, a capacitor C9, a capacitor C10 and a capacitor C11, the other end of the resistor R7, the other end of the capacitor C12 and the other end of the inductor L1 are connected in parallel and then respectively connected with one end of the capacitor C8, one end of the capacitor C9, one end of the capacitor C10 and one end of the capacitor C11, and the other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10 and the other end of the capacitor C11 are all grounded.

Example two

The invention relates to a method for a multifunctional base suitable for a face brushing terminal to be self-adaptive to power input, which needs to provide the multifunctional base in the first embodiment; the method specifically comprises the following steps:

the CPU judges the input voltage of the adapter through ADC sampling, and if the voltage of the adapter is lower than 4V or greater than 16V, the CPU judges that the adapter has errors; if the voltage of the adapter is more than or equal to 4V and less than or equal to 5.4V, the CPU controls the PMOS switch circuit to be started, the DCDC circuit is closed, and the voltage is output to supply power to the peripheral equipment; if the voltage of the adapter is more than 5.4V and less than or equal to 16V, the PMOS switch circuit is controlled to be closed, the DCDC circuit is controlled to be opened, and the DCDC circuit is controlled to output voltage to supply power to the peripheral equipment.

Although specific embodiments of the invention have been described above, it will be understood by those skilled in the art that the specific embodiments described are illustrative only and are not limiting upon the scope of the invention, and that equivalent modifications and variations can be made by those skilled in the art without departing from the spirit of the invention, which is to be limited only by the appended claims.