阅读说明：本技术 多相变换器及其控制电路 (Multiphase converter and control circuit thereof ) 是由 邓扬扬 易新敏 王宇 于 2019-08-22 设计创作，主要内容包括：本申请公开了一种多相变换器及其控制电路,多相变换器包括并联在输入端和输出端之间的第一相功率级电路和第二相功率级电路,第一相功率级电路的主开关管的导通和关断受控于第一开关信号,第二相功率级电路的主开关管的导通和关断受控于第二开关信号,其中,控制电路包括：相位控制电路,根据第一开关信号和第二开关信号的相位差产生调节信号,用于调节第一开关信号或者第二开关信号的无效电平时间,以使得第一开关信号和第二开关信号之间具有预定相移,使得两相变换器在固定的相移下工作,减小输出电压的纹波。(The application discloses multiphase converter and control circuit thereof, multiphase converter include parallelly connected first phase power level circuit and the second phase power level circuit between input and output, the switching on and off of the main switch pipe of first phase power level circuit is controlled by first switching signal, the switching on and off of the main switch pipe of second phase power level circuit is controlled by second switching signal, wherein, control circuit includes: and the phase control circuit generates an adjusting signal according to the phase difference of the first switching signal and the second switching signal, and is used for adjusting the invalid level time of the first switching signal or the second switching signal so as to enable the first switching signal and the second switching signal to have a preset phase shift, enable the two-phase converter to work under the fixed phase shift and reduce the ripple of the output voltage.)

1. A control circuit for a multiphase converter including a first phase power stage circuit and a second phase power stage circuit connected in parallel between an input terminal and an output terminal, wherein turning on and off of a main switch of the first phase power stage circuit is controlled by a first switching signal, and turning on and off of a main switch of the second phase power stage circuit is controlled by a second switching signal, the control circuit comprising:

and the phase control circuit generates an adjusting signal according to the phase difference of the first switching signal and the second switching signal, and is used for adjusting the invalid level time of the first switching signal or the second switching signal so that the first switching signal and the second switching signal have a preset phase shift.

2. The control circuit of claim 1, further comprising:

a turn-off timing circuit for generating a first timing signal and a second timing signal; and

and the switch control circuit is used for determining the invalid level time of the first switch signal according to the first timing signal and determining the invalid level time of the second switch signal according to the second timing signal.

3. The control circuit of claim 1, wherein the adjustment signal adjusts the inactive level time of the first or second switching signal by adjusting a slope of a change of the first or second timing signal.

4. The control circuit of claim 1, wherein the turn-off timing circuit comprises:

a first charging and discharging unit for generating the first timing signal according to an output voltage and the first switching signal; and

and the second charging and discharging unit is used for generating the second timing signal according to the output voltage and the second switching signal.

5. The control circuit of claim 4, wherein the first and second charge and discharge units each comprise:

the first voltage-controlled current source is used for providing a charging current according to the output voltage;

a first capacitor connected to the first voltage controlled current source at a first node for receiving the charging current and providing a corresponding timing signal at the first node; and

and the first switch is connected to two ends of the first capacitor in parallel and is used for providing a short-circuit path from the first node to the ground when the first switch is switched on.

6. The control circuit of claim 5, wherein the switching signal of each phase power stage circuit is used to control the turning on and off of the first switch in the charging and discharging unit of the phase.

7. The control circuit of claim 6 wherein said first switch is turned off when said switch signal is at an inactive level, said first voltage controlled current source charging said first capacitor to provide said timing signal at said first node.

8. The control circuit of claim 1, wherein the switch control circuit comprises:

the first comparator is used for comparing the first timing signal with the input voltage and providing the first switching signal according to the comparison result; and

and the second comparator is used for comparing the second timing signal with the input voltage and providing the second switching signal according to the comparison result.

9. The control circuit of claim 5, wherein the phase control circuit comprises:

a delay circuit for delaying the first switching signal according to the predetermined phase shift;

the phase frequency detector receives the second switching signal and the delayed first switching signal and generates a feedback control signal according to a phase difference between the second switching signal and the delayed first switching signal; and

a second voltage controlled current source for providing the adjustment signal to the first node according to the feedback control signal.

10. The control circuit of claim 9, wherein the phase frequency detector comprises:

a first flip-flop for generating a first control signal according to the delayed first switching signal;

the second trigger is used for generating a second control signal according to the second switching signal;

a reset signal generator for generating reset signals of the first flip-flop and the second flip-flop according to the first control signal and the second control signal;

the first control signal and the second control signal charge and discharge the second capacitor by controlling the switching action of the second switch and the third switch so as to generate the feedback control signal at the second node.

11. The control circuit of claim 10, wherein the reset signal generator comprises a logic and gate circuit.

12. The control circuit of claim 10 wherein the phase frequency detector further comprises a compensation network connected between the second node and ground for compensating the feedback control signal.

13. The control circuit of claim 12, wherein the compensation network comprises: a first resistor and a second capacitor connected in series between the second node and ground; and

and the third capacitor is connected with the first resistor and the second capacitor in parallel.

14. A multiphase converter, comprising:

the switching-on and switching-off of a main switching tube of the first-phase power level circuit are controlled by a first switching signal, and the switching-on and switching-off of a main switching tube of the second-phase power level circuit are controlled by a second switching signal; and

the control circuit of any one of claims 1-13.

15. The multiphase converter of claim 14, wherein said first phase power stage circuit and said second phase power stage circuit employ the same topology.

16. The multiphase converter of claim 15, wherein the first phase power stage circuit and the second phase power stage circuit each comprise:

the main switching tube and the synchronous switching tube are connected between the input end and the ground in series;

the inductor is connected to the middle nodes of the main switching tube and the synchronous switching tube; and

and the driver is used for alternately switching on the main switching tube and the synchronous switching tube according to the received switching signal so as to charge and discharge the inductor.

Technical Field

The invention relates to the technical field of switching power supplies, in particular to a multiphase converter and a control circuit thereof.

Background

In the switching power supply technology, a multi-phase parallel topology structure is generally adopted in order to reduce output ripples and improve power supply stability and power. Each channel of the multiphase converter is provided with a corresponding power switch tube and an inductor, the input ends of all the channels of the multiphase converter are connected together to receive input voltage, and the output ends of all the channels of the multiphase converter are connected together to the input end of an output filter circuit of the multi-phase converter, so that output voltage is provided through the output filter circuit. The topological structure has the advantages of mutually eliminating ripples, shunting among phases, realizing high-frequency output voltage at lower switching frequency and the like.

The multiphase converter is based on a synchronous converter, two identical converters are constructed in parallel, and the two converters are controlled to be switched on and off sequentially. In a multi-phase converter, when a certain offset and disturbance occur in one phase converter, the frequency and the phase of a two-phase converter deviate from the designed values, and the mismatch between the two-phase converters is easy to increase the ripple of the output voltage.

Therefore, it is desirable to improve the prior art switching regulator to operate a two-phase converter with a fixed phase shift, reducing the ripple of the output voltage.

Disclosure of Invention

In view of the above problems, it is an object of the present invention to provide a multiphase converter and a control circuit thereof, which enable a two-phase converter to operate with a fixed phase shift, and reduce the ripple of the output voltage.

According to a first aspect of the embodiments of the present invention, there is provided a control circuit of a multiphase converter, the multiphase converter including a first phase power stage circuit and a second phase power stage circuit connected in parallel between an input terminal and an output terminal, a main switch tube of the first phase power stage circuit being controlled by a first switch signal to turn on and off, and a main switch tube of the second phase power stage circuit being controlled by a second switch signal to turn on and off, the control circuit including: and the phase control circuit generates an adjusting signal according to the phase difference of the first switching signal and the second switching signal, and is used for adjusting the invalid level time of the first switching signal or the second switching signal so that the first switching signal and the second switching signal have a preset phase shift.

Preferably, the control circuit further comprises: a turn-off timing circuit for generating a first timing signal and a second timing signal; and the switch control circuit is used for determining the invalid level time of the first switch signal according to the first timing signal and determining the invalid level time of the second switch signal according to the second timing signal.

Preferably, the adjusting signal adjusts the inactive level time of the first switching signal or the second switching signal by adjusting a change slope of the first timing signal or the second timing signal.

Preferably, the turn-off timing circuit includes: a first charging and discharging unit for generating the first timing signal according to an output voltage and the first switching signal; and a second charge and discharge unit for generating the second timing signal according to an output voltage and the second switching signal.

Preferably, the first and second charge and discharge units each include: the first voltage-controlled current source is used for providing a charging current according to the output voltage; a first capacitor connected to the first voltage controlled current source at a first node for receiving the charging current and providing a corresponding timing signal at the first node; and the first switch is connected in parallel with two ends of the first capacitor and used for providing a short-circuit path from the first node to the ground when the first switch is conducted.

Preferably, the switching signal of each phase of the power stage circuit is used for controlling the on and off of the first switch in the charging and discharging unit of the phase.

Preferably, when the switch signal is at an inactive level, the first switch is turned off and the first voltage controlled current source charges the first capacitor to provide the timing signal at the first node.

Preferably, the switch control circuit includes: the first comparator is used for comparing the first timing signal with the input voltage and providing the first switching signal according to the comparison result; and a second comparator for comparing the second timing signal with the input voltage and providing the second switching signal according to the comparison result.

Preferably, the phase control circuit includes: a delay circuit for delaying the first switching signal according to the predetermined phase shift; the phase frequency detector receives the second switching signal and the delayed first switching signal and generates a feedback control signal according to a phase difference between the second switching signal and the delayed first switching signal; and a second voltage controlled current source for providing the adjustment signal to the first node in accordance with the feedback control signal.

Preferably, the phase frequency detector comprises: a first flip-flop for generating a first control signal according to the delayed first switching signal; the second trigger is used for generating a second control signal according to the second switching signal; a reset signal generator for generating reset signals of the first flip-flop and the second flip-flop according to the first control signal and the second control signal; the first control signal and the second control signal charge and discharge the second capacitor by controlling the switching action of the second switch and the third switch so as to generate the feedback control signal at the second node.

Preferably, the reset signal generator comprises a logic and gate circuit.

Preferably, the phase frequency detector further comprises a compensation network connected between the second node and ground, for compensating the feedback control signal.

Preferably, the compensation network comprises a first resistor and a second capacitor connected in series between the second node and ground; and a third capacitor connected in parallel with the first resistor and the second capacitor.

According to a second aspect of embodiments of the present invention, there is provided a multiphase converter comprising: the switching-on and switching-off of a main switching tube of the first-phase power level circuit are controlled by a first switching signal, and the switching-on and switching-off of a main switching tube of the second-phase power level circuit are controlled by a second switching signal; and the control circuit described above.

Preferably, the first phase power stage circuit and the second phase power stage circuit employ the same topology.

Preferably, the first phase power stage circuit and the second phase power stage circuit each comprise: the main switching tube and the synchronous switching tube are connected between the input end and the ground in series; the inductor is connected to the middle nodes of the main switching tube and the synchronous switching tube; and the driver is used for alternately switching on the main switching tube and the synchronous switching tube according to the received switching signal so as to charge and discharge the inductor.

The multiphase converter comprises a phase control circuit, wherein the phase control circuit adjusts the invalid level time of a first switching signal or a second switching signal according to the phase difference of the first switching signal and the second switching signal, then dynamically adjusts the frequency and the phase of the first switching signal or the second switching signal, and ensures that the first switching signal and the second switching signal have fixed phase shift, so that a first phase power stage circuit and a second phase power stage circuit of the converter work under the fixed phase shift, and the ripple of an output voltage is reduced. Furthermore, in the embodiment of the invention, the adjustment process of the phase control circuit on the first switching signal and the second switching signal is relatively smooth, so that the larger fluctuation of the output voltage can be avoided, and the stability of a circuit system can be improved.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

FIG. 1 shows a schematic diagram of a multiphase converter in accordance with an embodiment of the invention;

FIG. 2 shows a circuit schematic of the turn-off timing circuit of FIG. 1;

FIG. 3 shows a circuit schematic of the switch control circuit of FIG. 1;

FIG. 4 shows a circuit schematic of the phase control circuit of FIG. 1;

fig. 5 illustrates waveforms of the first switching signal and the second switching signal according to an embodiment of the present invention.

Detailed Description

Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.

It should be understood that in the following description, a "circuit" refers to a conductive loop formed by at least one element or sub-circuit through an electrical or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or element/circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present.

In the present application, the switching transistor is a transistor that operates in a switching mode to provide a current path, and includes one selected from a bipolar transistor or a field effect transistor. The first end and the second end of the switching tube are respectively a high potential end and a low potential end on a current path, and the control end is used for receiving a driving signal to control the switching tube to be switched on and off.

The invention is further illustrated with reference to the following figures and examples.

Fig. 1 shows a circuit schematic of a multiphase converter according to an embodiment of the invention. The embodiment of the invention provides a multiphase converter in an adaptive turn-off time control mode. As shown in fig. 1, the converter includes a two-phase power stage circuit and a control circuit 200 integrated in the same integrated circuit chip. The first phase power stage circuit 100a and the second phase power stage circuit 100b are connected in parallel between the input terminal Vin and the output terminal Vout. The first-phase power stage circuit 100a includes a main switch transistor M11, a synchronous switch transistor M12, an inductor L1 and a driver 101, wherein the main switch transistor M11 and the synchronous switch transistor M12 are connected in series between an input terminal Vin and ground, and a first terminal of the inductor L1 is connected to a middle node between the main switch transistor M11 and the synchronous switch transistor M12. The second phase power stage circuit 100b includes a main switch transistor M21, a synchronous switch transistor M22, an inductor L2 and a driver 102, the main switch transistor M21 and the synchronous switch transistor M22 are connected in series between the input terminal Vin and the ground, and a first terminal of the inductor L2 is connected to a middle node of the main switch transistor M21 and the synchronous switch transistor M22. The multiphase converter further comprises an output capacitor Cout, wherein a first end of the output capacitor Cout is connected with the second ends of the inductor L1 and the inductor L2, and the second end is grounded. The output capacitor Cout is used for filtering the output voltage Vout.

The control circuit 200 alternately provides the first and second switching signals Clk1, Clk2 to the first and second phase power stage circuits 100a, 100 b. The driver 101 provides a driving signal TG1 and a driving signal BG1 for driving the main switch transistor M11 and the synchronous switch transistor M12, respectively, according to the first switching signal Clk 1. The drive signal TG1 and the drive signal BG1 are, for example, an in-phase signal and an inverted signal of the first switching signal Clk1, respectively. In each switching cycle, the main switching tube M11 and the second switching tube M12 are alternately turned on and off to charge and discharge the inductor L1 to provide the first output voltage. The driver 201 provides a driving signal TG2 and a driving signal BG2 according to the second switching signal Clk2, and drives the main switch M21 and the synchronous switch M22, respectively. The drive signal TG2 and the drive signal BG2 are, for example, an in-phase signal and an inverted signal of the second switching signal Clk2, respectively. In each switching cycle, the main switching tube M21 and the second switching tube M22 are alternately turned on and off to charge and discharge the inductor L2 to provide the second output voltage. The first output voltage and the second output voltage are superimposed to provide an output voltage to the load.

Further, the control circuit includes a turn-off timing circuit 210, a switch control circuit 220, and a phase control circuit 230.

The turn-off timing circuit 210 is configured to generate a first timing signal V1 and a second timing signal V2 that respectively characterize the turn-off time of the main switching tube of the first phase power stage circuit 100a and the second phase power stage circuit 100 b. Further, the off timing circuit 210 determines off times of the first phase power stage circuit 100a and the second phase power stage circuit 100b according to the driving signal TG1 and the driving signal TG2, respectively, and outputs corresponding first timing signal V1 and second timing signal V2.

The switch control circuit 220 is configured to generate a first switching signal Clk1 and a second switching signal Clk2 according to the received first timing signal V1 or the second timing signal V2 and the input voltage Vin. Further, the switch control circuit 220 compares the first timing signal V1 and the second timing signal V2 with the input voltage Vin, and generates the first switching signal Clk1 and the second switching signal Clk2 according to the comparison result. The first switching signal Clk1 is used to control the switching operation of the main switch M11 in the first phase power stage circuit 100a, and the second switching signal Clk2 is used to control the switching operation of the main switch M21 in the second phase power stage circuit 100 b.

The phase control circuit 230 is configured to obtain a phase difference between the first switching signal Clk1 and the second switching signal Clk2, and adjust one of the first timing signal V1 and the second timing signal V2 according to the phase difference to fix a predetermined phase shift between the first switching signal Clk1 and the second switching signal Clk 2. Further, the phase control circuit 230 provides the adjustment signal Vs to the turn-off timing circuit 210 according to the phase difference between the first switching signal Clk1 and the second switching signal Clk2, dynamically adjusts the changing slope of the first timing signal V1 or the second timing signal V2, and then adjusts the inactive level time of the first switching signal Clk1 or the second switching signal Clk2, so that the first phase power stage circuit 100a and the second phase power stage circuit 100b operate at a fixed phase shift.

Fig. 2 shows a schematic diagram of the shutdown timing circuit in fig. 1. In one non-limiting embodiment, the off-timing circuit 210 includes a first charge and discharge unit 211 and a second charge and discharge unit 212.

The first charge/discharge unit 211 includes a voltage-controlled current source 2111, a capacitor C11 and a switch K1. The voltage-controlled current source 2111 is used for providing a charging current to the capacitor C11 according to the output voltage Vout, the first terminal of the capacitor C11 and the voltage-controlled current source 2111 are connected to the node P1, and the second terminal is grounded. A switch K1 is connected in parallel across capacitor C11 for providing a short path from node P1 to ground when conducting. The driving signal TG1 is used to control the switching action of the switch K1. When the driving signal TG1 indicates that the main switch M11 of the first-phase power stage circuit 100a is in an off state (e.g., the driving signal TG1 is low), the switch K1 is turned off, and the voltage-controlled current source 2111 charges the capacitor C11 under the control of the output voltage Vout, so as to provide the first timing signal V1 at the node P1.

The second charge and discharge unit 212 includes a voltage-controlled current source 2121, a capacitor C12, and a switch K2. The voltage-controlled current source 2121 is used for providing a charging current to the capacitor C12 according to the output voltage Vout, a first terminal of the capacitor C12 and the voltage-controlled current source 2121 are connected to the node P2, and a second terminal is grounded. A switch K2 is connected in parallel across capacitor C12 for providing a short path from node P2 to ground when conducting. The driving signal TG2 is used to control the switching action of the switch K2. When the driving signal TG2 indicates that the main switch M21 of the first phase power stage circuit 100b is in an off state (e.g., the driving signal TG2 is low), the switch K2 is turned off, and the voltage-controlled current source 2121 charges the capacitor C12 under the control of the output voltage Vout, thereby providing the second timing signal V2 at the node P2.

Fig. 3 is a schematic diagram of the switch control circuit shown in fig. 1. As shown in fig. 3, the switch control circuit 220 includes a comparator 221 and a comparator 222.

The comparator 221 compares the first timing signal V1 with the input voltage Vin, and provides a first switching signal Clk1 according to the comparison result. When the main switch of the first-phase power stage circuit 100a is turned off, the driving signal TG1 is at a low level, the output voltage Vout controls the voltage-controlled current source 2111 to charge the capacitor C11, the voltage of the first timing signal V1 rises, and when the voltage of the first timing signal V1 rises to the input voltage Vin, the comparator 221 is inverted, and the turn-off time of the main switch M11 of the first-phase power stage circuit 100a ends.

The comparator 222 compares the second timing signal V2 with the input voltage Vin and provides a second switching signal Clk2 according to the comparison result. When the main switch M21 of the second phase power stage circuit 100b starts to turn off, the driving signal TG2 is at a low level, the output voltage Vout controls the voltage-controlled current source 2121 to charge the capacitor C12, the voltage of the second timing signal V2 rises, when the voltage of the second timing signal V2 rises to the input voltage Vin, the comparator 222 inverts, and the turn-off time of the main switch M21 of the second phase power stage circuit 100b ends.

Fig. 4 is a schematic diagram showing a structure of the phase control circuit in fig. 1. As shown in fig. 4, the phase control circuit 230 includes a delay circuit 231, a phase frequency detector 232, and a voltage controlled current source 233. The delay circuit 231 is used to delay the first switching signal Clk1 by a preset delay time. The phase frequency detector 232 receives the second switching signal Clk2 and the delayed first switching signal Clk1, performs phase frequency detection on the second switching signal and the delayed first switching signal, and generates a feedback control signal Vc according to a phase difference between the second switching signal and the delayed first switching signal. The second voltage-controlled current source 233 is configured to provide an adjustment signal Vs to the second charge/discharge unit according to the feedback control signal Vc, where the adjustment signal Vs is configured to adjust a charging process of the capacitor C12 in the second charge/discharge unit, and then dynamically adjust a change slope of the second timing signal V2, so as to ensure a fixed phase shift between the first switching signal Clk1 and the second switching signal Clk 2.

In another embodiment, the voltage-controlled current source 233 may also provide an adjustment signal Vs to the first charge/discharge unit according to the feedback control signal Vc, and the adjustment signal Vs adjusts the charging process of the capacitor C11 in the first charge/discharge unit, so as to achieve the purpose of dynamically adjusting the change slope of the first timing signal V1.

Further, the phase frequency detector 232 includes a flip-flop 2321, a flip-flop 2322, a reset signal generator 2323, a current source 2324, a current source 23245, a switch K3, a switch K4, and a compensation network.

The trigger 2321 and the trigger 2322 are implemented by, for example, a class D trigger. The delayed first switching signal Clk1 is provided to the clock input of flip-flop 2321 and the second switching signal Clk2 is provided to the clock input of flip-flop 2322. Data inputs D of flip-flops 2321 and 2322 are connected to a supply voltage.

Current source 2324 and current source 2325 are connected in series between the supply voltage and ground, and switch K3 and switch K4 are connected in series between current source 2324 and current source 2325. The capacitor C22 has a first terminal connected to the node P3 between the switch K3 and the switch K4, and a second terminal connected to ground.

The data output terminal Q of the flip-flop 2321 is connected to the control terminal of the switch K4, and the flip-flop 2321 is configured to generate the first control signal Vc1 according to the delayed first switching signal Clk1, and control the switching action of the switch K4 to provide a discharging path from the node P3 to the current source 2325. The data output terminal Q of the flip-flop 2322 is connected to the control terminal of the switch K3, and the flip-flop 2322 is configured to generate the second control signal Vc2 according to the second switching signal Clk2, so as to control the switching action of the switch K3 to provide the charging path from the current source 2324 to the node P3.

The reset signal generator 2323 is configured to generate reset signals of the first flip-flop and the second flip-flop according to a first control signal Vc1 and the second control signal Vc 2. Further, the reset signal generator 2323 is implemented by a logic and gate circuit, a first input terminal of the and gate circuit receives the first control signal Vc1, a second input terminal of the and gate circuit receives the second control signal Vc2, and an output terminal of the and gate circuit is connected to the reset terminal CLR of the flip-flop 2321 and the flip-flop 2322. The first control signal Vc1 and the second control signal Vc2 control the switching of the switch K4 and the switch K3 to generate the feedback control signal Vc at the node P3.

Further, the compensation network comprises a resistor R1, a capacitor C21 and a capacitor C22, wherein the resistor R1 and the capacitor C21 are connected between the node P3 and the ground in series, and the capacitor C22 is connected with the resistor R1 and the capacitor C21 in parallel.

Fig. 5 illustrates waveforms of the first switching signal and the second switching signal according to an embodiment of the present invention. In this embodiment, the frequency of the first switching signal is:

where gm3 represents the voltage controlled current source 2111 transfer conductance, Vout represents the output voltage, Vin represents the input voltage, and C11 represents the parameter of the capacitor C11.

The frequency of the second switching signal is:

in this embodiment, the phase control circuit dynamically adjusts the frequency of the second switching signal by feedback-adjusting the charging process of the second charge-discharge path in the turn-off timing circuit, so as to ensure that the first switching signal Clk1 and the second switching signal Clk2 have a fixed phase shift T _ delay. Further, the T _ delay is a delay time preset in the delay circuit 231.

The implementation principle of the multiphase converter with the adaptive off-time control mode is described in detail above. Similarly, the present invention can also be applied to a control mode of adaptive off-time.

In summary, the multiphase converter according to the embodiment of the present invention includes a phase control circuit, where the phase control circuit adjusts the inactive level time of the first switching signal or the second switching signal according to the phase difference between the first switching signal and the second switching signal, and then dynamically adjusts the frequency and the phase of the first switching signal or the second switching signal, so as to ensure that the first switching signal and the second switching signal have a fixed phase shift, so that the first phase power stage circuit and the second phase power stage circuit of the converter operate under the fixed phase shift, and reduce the ripple of the output voltage. Furthermore, in the embodiment of the invention, the adjustment process of the phase control circuit on the first switching signal and the second switching signal is relatively smooth, so that the larger fluctuation of the output voltage can be avoided, and the stability of a circuit system can be improved.

In accordance with the present invention, as set forth above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The scope of the invention should be determined from the following claims.