阅读说明：本技术 一种微电容检测方法及装置 (Micro-capacitor detection method and device ) 是由 郑发耀 于 2019-09-03 设计创作，主要内容包括：本发明提供一种微电容检测方法及装置。所述微电容检测方法包括：产生一脉冲信号；利用一检测电路将所述脉冲信号转换为一检测参考信号；利用连接有待测微电容的所述检测电路将所述脉冲信号转换为一检测信号；获取所述检测信号与所述检测参考信号的相位差；根据所述相位差计算获得所述待测微电容的电容值。所述微电容检测方法完全由数字电路实现,具有检测速度快、检测范围宽等优点。(The invention provides a micro-capacitance detection method and a device. The micro-capacitance detection method comprises the following steps: generating a pulse signal; converting the pulse signal into a detection reference signal by using a detection circuit; converting the pulse signal into a detection signal by using the detection circuit connected with the micro capacitor to be detected; acquiring a phase difference between the detection signal and the detection reference signal; and calculating to obtain the capacitance value of the micro capacitor to be measured according to the phase difference. The micro-capacitance detection method is completely realized by a digital circuit and has the advantages of high detection speed, wide detection range and the like.)

1. A micro-capacitance detection method is characterized by comprising the following steps:

generating a pulse signal;

converting the pulse signal into a detection reference signal by using a detection circuit;

converting the pulse signal into a detection signal by using the detection circuit connected with the micro capacitor to be detected;

acquiring a phase difference between the detection signal and the detection reference signal;

and calculating to obtain the capacitance value of the micro capacitor to be measured according to the phase difference.

2. The method of claim 1, wherein the generating a pulse signal comprises:

performing frequency division processing on a reference clock signal by using a frequency divider to generate a first square wave signal; the first square wave signal is the pulse signal.

3. The method according to claim 2, wherein obtaining the phase difference between the detection signal and the detection reference signal comprises:

shaping the detection reference signal to obtain a second square wave signal;

performing logical exclusive-or processing on the first square wave signal and the second square wave signal to obtain a first phase difference pulse;

shaping the detection signal to obtain a third-party wave signal;

carrying out logic XOR processing on the first square wave signal and the third square wave signal to obtain a second phase difference pulse;

calculating the detection signal and the detection signal according to the pulse width of the first phase difference pulse and the pulse width of the second phase difference pulseAnd measuring the phase difference of the reference signal, wherein the calculation formula is as follows:wherein Δ P₁Is the phase difference of the detection signal and the detection reference signal; t represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₂Representing the pulse width, t, of said second phase difference pulse₁<t₂<T。

4. The method of claim 3, wherein the phase difference pulse has a pulse width measured by a method comprising:

measuring a pulse width of the phase difference pulse using the reference clock signal.

5. The micro-capacitance detection method according to claim 1, characterized in that:

the detection circuit comprises a buffer and a resistor; the pulse signal flows through the buffer and the resistor and then is converted into the detection reference signal; after the detection circuit is connected with the micro capacitor to be detected, the pulse signal flows through the first buffer and the resistor and then is converted into the detection signal.

6. The method for detecting the micro-capacitor according to claim 5, wherein the method for calculating and obtaining the capacitance value of the micro-capacitor to be detected according to the phase difference comprises the following steps:

shaping the detection reference signal and the detection signal is realized by an input buffer;

calculating a conversion coefficient between the phase difference and the capacitance value, wherein the calculation formula of the conversion coefficient isWherein K represents a conversion coefficient between the phase difference and the capacitance value; f is the pulse signalThe frequency of the number; r is the resistance value of the resistor; d is the voltage ratio of the threshold value of the input buffer to the first square wave signal, and the value range of D is 0<D<1；

Calculating the capacitance value of the micro capacitor to be measured, wherein the calculation formula is C_xK × Δ P; wherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; Δ P is a phase difference of the detection signal and the detection reference signal.

7. The micro-capacitance detection method according to claim 5, further comprising:

changing the resistance value of the resistor to change the phase resolution of the micro-capacitance detection method; the phase resolution represents the minimum capacitance value that the micro-capacitance detection method can detect.

8. The micro-capacitance detection method according to claim 2, further comprising:

adjusting the frequency of the reference clock signal to adjust the phase resolution of the micro-capacitance detection method; the phase resolution is related to the frequency of the reference clock signal byWherein, P_LSBFor the phase resolution, representing the minimum capacitance value that the micro-capacitance detection method can detect; f is the frequency of the first square wave signal; f. of_CLKIs the frequency of the reference clock signal.

9. The micro-capacitance detection method according to claim 1, characterized in that: the detection circuit has a parasitic capacitance.

10. A micro-capacitance detecting device, characterized by comprising:

the signal generating module is used for generating a pulse signal;

the detection circuit is connected with the signal generation module and is used for converting the pulse signal into a detection reference signal; the detection circuit is connected with the micro capacitor to be detected and is used for converting the pulse signal into a detection signal;

the phase difference acquisition module is respectively connected with the output end of the detection circuit and the signal generation module and is used for acquiring the phase difference between the detection signal and the detection reference signal;

and the calculation module is connected with the phase difference acquisition module and used for calculating and acquiring the capacitance value of the micro capacitor to be measured according to the phase difference.

11. The micro-capacitance detection device according to claim 10, wherein the signal generation module comprises:

the clock unit is used for generating a reference clock signal;

the frequency divider unit is connected with the clock unit and the detection circuit and is used for carrying out frequency division processing on the reference clock signal to generate a first square wave signal; the first square wave signal is the pulse signal.

12. The micro-capacitance detection device according to claim 11, wherein the phase difference acquisition module comprises:

the shaping unit is connected with the output end of the detection circuit and is used for shaping the detection reference signal to obtain a second square wave signal; after the detection circuit is connected with the micro capacitor to be detected, the shaping unit is used for shaping the detection signal to obtain a third-party wave signal;

the exclusive OR unit is respectively connected with the shaping unit and the signal generating module and is used for carrying out logic exclusive OR processing on the first square wave signal and the second square wave signal to obtain a first phase difference pulse; after the detection circuit is connected with a micro capacitor to be detected, the XOR unit is used for carrying out logic XOR processing on the first square wave signal and the third square wave signal to obtain a second phase difference pulse;

phase difference calculation unit, and theThe exclusive-or unit is connected to calculate the phase difference between the detection signal and the detection reference signal according to the pulse width of the first phase difference pulse and the pulse width of the second phase difference pulse, and the calculation formula is as follows:wherein Δ P₁Is the phase difference of the detection signal and the detection reference signal; t represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₂Representing the pulse width, t, of said second phase difference pulse₁<t₂<T。

13. The micro capacitance detection device according to claim 12, wherein the phase difference calculation unit includes:

and the pulse width measuring subunit is connected with the exclusive-or unit and is used for measuring the pulse width of the phase difference pulse by using the reference clock signal.

14. The micro-capacitance detection device of claim 10, wherein the detection circuit comprises:

the first buffer is connected with the signal generating module and used for buffering the pulse signal;

a resistance; the first end of the resistor is connected with the first buffer, and the second end of the resistor is connected with the phase difference acquisition module; the pulse signal flows through the first buffer and the resistor and then is converted into the detection reference signal; after the detection circuit is connected with the micro capacitor to be detected, the pulse signal flows through the first buffer and the resistor and then is converted into the detection signal.

15. The micro-capacitance detecting device according to claim 14, wherein:

the shaping unit comprises an input buffer; the input buffer is connected with the output end of the detection circuit and is used for shaping the detection reference signal and the detection signal;

the calculation module comprises:

a conversion coefficient calculation unit connected to the phase difference acquisition module for calculating a conversion coefficient between the phase difference and the capacitance value, wherein the calculation formula of the conversion coefficient isWherein K represents a conversion coefficient between the phase difference and the capacitance value; f is the frequency of the pulse signal; r is the resistance value of the resistor; d is the voltage ratio of the threshold value of the input buffer to the first square wave signal, and the value range of D is 0<D<1；

A capacitance value calculating unit connected with the conversion coefficient calculating unit and used for calculating the capacitance value of the micro capacitor to be measured, wherein the calculation formula is C_xK × Δ P; wherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; Δ P is a phase difference of the detection signal and the detection reference signal.

16. The micro-capacitance detecting device according to claim 14, wherein:

the resistance value of the resistor can be changed; the phase resolution of the micro-capacitance detection method can be changed by changing the resistance value of the resistor; the phase resolution represents the minimum capacitance value that the micro-capacitance detection method can detect.

17. The micro-capacitance detecting device according to claim 11, characterized in that:

the frequency of the reference clock signal generated by the clock unit can be adjusted; the phase resolution of the micro-capacitance detection method can be adjusted by adjusting the frequency of the reference clock signal; the phase resolution is related to the frequency of the reference clock signal byWherein, P_LSBFor resolving said phaseA rate representing a minimum capacitance value that the micro-capacitance detection method can detect; f is the frequency of the first square wave signal; f. of_CLKIs the frequency of the reference clock signal.

18. The micro-capacitance detecting device according to claim 10, characterized in that: the detection circuit has a parasitic capacitance.

Technical Field

The invention belongs to the field of capacitance measurement, relates to a capacitance detection method, and particularly relates to a micro-capacitance detection method and a micro-capacitance detection device.

Background

In recent years, with the continuous development of semiconductor technology and the continuous progress of processes, the application of micro capacitors is more and more extensive. Micro-capacitance in the general sense refers to micro-farad or pico-farad capacitance. Micro-capacitance detection is widely applied to capacitive biosensors, capacitive sound (vibration) sensors, capacitive light sensors, capacitive proximity sensors, capacitive gravity sensors, capacitive touch keys, capacitive touch screens, medium uniformity detection and the like. However, most of the existing micro-capacitance detection methods rely on an analog circuit to convert the capacitance into parameters such as voltage, current, frequency, etc., and then analyze and process the parameters to obtain corresponding capacitance values, and the conversion rate of the methods is low.

Disclosure of Invention

In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a method and an apparatus for detecting a micro capacitance, which are used to solve the problem of low conversion rate in the prior art.

In order to achieve the above and other related objects, the present invention provides a micro-capacitance detecting method, including: generating a pulse signal; converting the pulse signal into a detection reference signal by using a detection circuit; connecting the micro capacitor to be detected with the detection circuit; converting the pulse signal into a detection signal by using the detection circuit; acquiring a phase difference between the detection signal and the detection reference signal; and calculating to obtain the capacitance value of the micro capacitor to be measured according to the phase difference.

In an embodiment of the present invention, the implementation process of generating a pulse signal includes: performing frequency division processing on a reference clock signal by using a frequency divider to generate a first square wave signal; the first square wave signal is the pulse signal.

In an embodiment of the present invention, the implementation process of obtaining the phase difference between the detection signal and the detection reference signal includes: shaping the detection reference signal to obtain a second square wave signal; performing logical exclusive-or processing on the first square wave signal and the second square wave signal to obtain a first phase difference pulse; shaping the detection signal to obtain a third-party wave signal; carrying out logic XOR processing on the first square wave signal and the third square wave signal to obtain a second phase difference pulse; calculating the phase difference between the detection signal and the detection reference signal according to the pulse width of the first phase difference pulse and the pulse width of the second phase difference pulse, wherein the calculation formula is as follows:wherein Δ P₁Is the phase difference of the detection signal and the detection reference signal; t represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₂Representing the pulse width, t, of said second phase difference pulse₁<t₂<T。

In an embodiment of the present invention, a method for measuring a pulse width of the phase difference pulse includes: measuring a pulse width of the phase difference pulse using the reference clock signal.

In an embodiment of the present invention, the detection circuit includes a buffer and a resistor; the pulse signal flows through the buffer and the resistor and then is converted into the detection reference signal; after the detection circuit is connected with the micro capacitor to be detected, the pulse signal flows through the first buffer and the resistor and then is converted into the detection signal.

In an embodiment of the present invention, an implementation method for obtaining a capacitance value of the micro capacitor to be measured according to the phase difference calculation includes: shaping the detection reference signal and the detection signal is realized by an input buffer; calculating a conversion coefficient between the phase difference and the capacitance value, wherein the calculation formula of the conversion coefficient isWherein K represents a conversion coefficient between the phase difference and the capacitance value; f is the frequency of the pulse signal; r is the resistance value of the resistor; d is the voltage ratio of the threshold value of the input buffer to the first square wave signal, and the value range of D is 0<D<1; calculating the capacitance value of the micro capacitor to be measured, wherein the calculation formula is C_xK × Δ P; wherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; Δ P is a phase difference of the detection signal and the detection reference signal.

In an embodiment of the invention, the method for detecting micro capacitance further includes: changing the resistance value of the resistor to change the phase resolution of the micro-capacitance detection method; the phase resolution represents the minimum capacitance value that the micro-capacitance detection method can detect.

In an embodiment of the invention, the method for detecting micro capacitance further includes: adjusting the frequency of the reference clock signal to adjust the phase resolution of the micro-capacitance detection method; the phase resolution is related to the frequency of the reference clock signal byWherein, P_LSBFor the phase resolution, representing the minimum capacitance value that the micro-capacitance detection method can detect; f is the frequency of the first square wave signal; f. of_CLKIs the frequency of the reference clock signal.

In an embodiment of the invention, the detection circuit has a parasitic capacitance.

The present invention also provides a micro-capacitance detecting device, including: the signal generating module is used for generating a pulse signal; the detection circuit is connected with the signal generation module and is used for converting the pulse signal into a detection reference signal; the detection circuit is connected with the micro capacitor to be detected and is used for converting the pulse signal into a detection signal; the phase difference acquisition module is respectively connected with the output end of the detection circuit and the signal generation module and is used for acquiring the phase difference between the detection signal and the detection reference signal; and the calculation module is connected with the phase difference acquisition module and used for calculating and acquiring the capacitance value of the micro capacitor to be measured according to the phase difference.

In an embodiment of the present invention, the signal generating module includes: the clock unit is used for generating a reference clock signal; the frequency divider unit is connected with the clock unit and the detection circuit and is used for carrying out frequency division processing on the reference clock signal to generate a first square wave signal; the first square wave signal is the pulse signal.

In an embodiment of the present invention, the phase difference obtaining module includes: the shaping unit is connected with the output end of the detection circuit and is used for shaping the detection reference signal to obtain a second square wave signal; after the detection circuit is connected with the micro capacitor to be detected, the shaping unit is used for shaping the detection signal to obtain a third-party wave signal; the exclusive OR unit is respectively connected with the shaping unit and the signal generating module and is used for carrying out logic exclusive OR processing on the first square wave signal and the second square wave signal to obtain a first phase difference pulse; after the detection circuit is connected with the micro capacitor to be detected, the XOR unit is used for comparing the first square wave signal with the third square wave signalCarrying out logical XOR processing on the signals to obtain second phase difference pulses; a phase difference calculation unit, connected to the xor unit, for calculating a phase difference between the detection signal and the detection reference signal according to a pulse width of the first phase difference pulse and a pulse width of the second phase difference pulse, where the calculation formula is:wherein Δ P₁Is the phase difference of the detection signal and the detection reference signal; t represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₂Representing the pulse width, t, of said second phase difference pulse₁<t₂<T。

In an embodiment of the present invention, the phase difference calculating unit includes: and the pulse width measuring subunit is connected with the exclusive-or unit and is used for measuring the pulse width of the phase difference pulse by using the reference clock signal.

In an embodiment of the present invention, the detection circuit includes: the first buffer is connected with the signal generating module and used for buffering the pulse signal; a resistance; the first end of the resistor is connected with the first buffer, and the second end of the resistor is connected with the phase difference acquisition module; the pulse signal flows through the first buffer and the resistor and then is converted into the detection reference signal; after the detection circuit is connected with the micro capacitor to be detected, the pulse signal flows through the first buffer and the resistor and then is converted into the detection signal.

In an embodiment of the present invention, the shaping unit includes an input buffer; the input buffer is connected with the output end of the detection circuit and is used for shaping the detection reference signal and the detection signal; the calculation module comprises: a conversion coefficient calculation unit connected to the phase difference acquisition module for calculating a conversion coefficient between the phase difference and the capacitance value, wherein the calculation formula of the conversion coefficient isWherein K represents a conversion coefficient between the phase difference and the capacitance value; f is the frequency of the pulse signal; r is the resistance value of the resistor; d is the voltage ratio of the threshold value of the input buffer to the first square wave signal, and the value range of D is 0<D<1; a capacitance value calculating unit connected with the conversion coefficient calculating unit and used for calculating the capacitance value of the micro capacitor to be measured, wherein the calculation formula is C_xK × Δ P; wherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; Δ P is a phase difference of the detection signal and the detection reference signal.

In an embodiment of the present invention, the resistance value of the resistor can be changed; the phase resolution of the micro-capacitance detection method can be changed by changing the resistance value of the resistor; the phase resolution represents the minimum capacitance value that the micro-capacitance detection method can detect.

In an embodiment of the present invention, the frequency of the reference clock signal generated by the clock unit is adjustable; the phase resolution of the micro-capacitance detection method can be adjusted by adjusting the frequency of the reference clock signal; the phase resolution is related to the frequency of the reference clock signal byWherein, P_LSBFor the phase resolution, representing the minimum capacitance value that the micro-capacitance detection method can detect; f is the frequency of the first square wave signal; f. of_CLKIs the frequency of the reference clock signal.

In an embodiment of the invention, the detection circuit has a parasitic capacitance.

As described above, the method and the device for detecting micro capacitance of the present invention have the following advantages: the micro-capacitor detection method is completely realized by a digital circuit, an external interface also adopts a common IO port, and capacitance detection is realized by converting the capacitance value of the micro-capacitor into the phase difference of detection signals and detecting the phase difference. In the conventional scheme, detection of micro capacitance is generally realized under the participation of analog circuit devices such as a high-precision operational amplifier, an analog-to-digital converter (ADC), a digital-to-analog converter (DAC) and the like. Compared with the prior art, the micro-capacitance detection method has the advantages of high detection speed, wide detection range and the like.

Drawings

Fig. 1 is a flow chart illustrating a micro-capacitance detection method according to an embodiment of the invention.

Fig. 2A is a waveform diagram illustrating an exemplary micro-capacitor detection method/apparatus according to an embodiment of the invention.

FIG. 2B is a waveform diagram illustrating an exemplary micro-capacitor detection method/apparatus according to an embodiment of the present invention.

Fig. 3 is a flowchart illustrating a step S4 of the micro capacitance detection method according to an embodiment of the invention.

FIG. 4 is a flowchart illustrating a method for measuring pulse width of a phase difference pulse signal according to an embodiment of the present invention.

Fig. 5A is a diagram illustrating an exemplary detection reference signal in an embodiment of the method/apparatus for detecting micro capacitance of the present invention.

Fig. 5B is a diagram illustrating an example of a second square wave signal in an embodiment of the method/apparatus for detecting micro capacitance of the present invention.

Fig. 6 is a schematic structural diagram of a micro capacitance detection device according to an embodiment of the invention.

Fig. 7A is a circuit diagram of the micro-capacitance detecting device according to an embodiment of the invention.

Fig. 7B is a circuit diagram of the micro capacitance detecting device according to an embodiment of the invention.

Fig. 8A is a circuit diagram of the micro-capacitance detecting device according to an embodiment of the invention. Fig. 8B is a circuit diagram of the micro capacitance detecting device according to an embodiment of the invention.

Description of the element reference numerals

600 micro-capacitance detection device

610 signal generating module

611 clock unit

612 frequency divider unit

620 detection circuit

621 first buffer

622 resistance

630 phase difference acquisition module

631 shaping unit

632 xor unit

633 phase difference calculation unit

640 computing module

641 conversion coefficient calculating unit

642 capacitance value calculating unit

710 frequency divider

720 buffer

730 resistor

740 micro capacitor to be tested

750 capacitor

760 Schmitt trigger

770 xor gate

780 AND gate

810 frequency divider

820 buffer

830 resistance

840 micro capacitor to be measured

860 Schmitt trigger

870 xor gate

880 AND gate

S1-S5

S41-S45

Steps S451 to S453

Detailed Description

The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.

It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.

Micro-capacitance detection is widely applied to capacitive biosensors, capacitive sound (vibration) sensors, capacitive light sensors, capacitive proximity sensors, capacitive gravity sensors, capacitive touch keys, capacitive touch screens, medium uniformity detection and the like. However, the existing micro-capacitance detection method relies on an analog circuit to convert the capacitance into parameters such as voltage, current, frequency, etc., and then analyzes and processes the parameters to obtain the corresponding capacitance, and the conversion rate of the method is low. In order to solve the problem, the invention provides a micro-capacitance detection method, which comprises the following steps: generating a pulse signal; converting the pulse signal into a detection reference signal by using a detection circuit; connecting the micro capacitor to be detected with the detection circuit; converting the pulse signal into a detection signal by using the detection circuit; acquiring a phase difference between the detection signal and the detection reference signal; and calculating to obtain the capacitance value of the micro capacitor to be measured according to the phase difference. The micro-capacitor detection method is completely realized by a digital circuit, the capacitance value of the micro-capacitor is converted into the phase difference of a detection signal, the capacitance detection is realized by detecting the phase difference, and compared with the traditional detection scheme, the detection speed is higher, and the detection range is wider.

Referring to fig. 1, a schematic flow chart of the micro-capacitance detection method according to an embodiment of the invention is shown. In this embodiment, the method for detecting micro capacitance includes:

s1, generating a pulse signal. The pulse signal is a discrete signal with various shapes, and compared with a common analog signal (such as a sine wave), the waveforms are discontinuous on the vertical axis (the waveforms have obvious intervals from one another) and have certain periodicity. Common pulse signals include rectangular pulses, sawtooth pulses, triangular pulses, spike pulses, step pulses, and the like.

S2, converting the pulse signal into a detection reference signal by a detection circuit. When the detection circuit comprises a capacitance element or is connected with the capacitance element, the pulse signal generates phase change after flowing through the detection circuit, namely: so that the pulse signal will generate a phase shift. The magnitude of the phase change depends on the capacitance value of a capacitive element inside the detection circuit and the capacitance value of a capacitive element connected to the detection circuit. In step S2, the pulse signal flows through the detection circuit to form the detection reference signal. In particular, when the detection circuit does not include a capacitive element and is not connected to the capacitive element, the detection reference signal and the pulse signal have the same phase, that is, the phase difference is 0.

And S3, converting the pulse signal into a detection signal by using the detection circuit connected with the micro capacitor to be detected. The detection signal is a signal at the joint of the detection circuit and the micro capacitor to be detected. Due to the access of the micro capacitor to be detected, the phase shift generated when the pulse signal flows through the detection circuit can be changed, so that a phase difference exists between the detection signal and the detection reference signal, and the size of the phase difference is related to the capacitance value of the micro capacitor to be detected.

And S4, acquiring the phase difference between the detection signal and the detection reference signal. The acquisition of the phase difference can be realized by using a specific digital circuit or an instrument.

And S5, calculating and obtaining the capacitance value of the micro capacitor to be measured according to the phase difference. The phase difference is related to the capacitance value of the micro capacitor to be measured, so that the capacitance value of the micro capacitor to be measured can be obtained through calculation of the phase difference.

In an embodiment of the present invention, the implementation process of generating a pulse signal includes: performing frequency division processing on a reference clock signal by using a frequency divider to generate a first square wave signal; the first square wave signal is the pulse signal.

The reference clock signal is the basis for sequential logic, which determines when the state in a logic cell is updated, and is a semaphore with a fixed period that is independent of circuit operating conditions. A reference clock is typically used in synchronous circuits, playing the role of a timer, and making up the electronic components of the circuit. One common type of reference clock signal is a 50% duty cycle square wave signal.

A frequency divider is a device that performs frequency division processing on an input signal and outputs a specific frequency component in the input signal. The frequency of the signal output by the frequency divider can be changed by setting the frequency division coefficient.

In this embodiment, the reference clock signal is input to the frequency divider, and the frequency divider extracts a specific frequency component in the reference clock signal and outputs a square wave signal with a specific frequency, which is recorded as a first square wave signal, and the square wave signal can be used as the pulse signal in step S1.

Referring to fig. 2A and 2B, the clk signal is a reference clock signal, and the reference clock signal is divided by a frequency divider to obtain a corresponding first square wave signal drv. Fig. 2A and 2B are exemplary diagrams, in practical applications, the frequency of the reference clock signal is higher, and the number of pulses of the reference clock signal included in one period of the first square wave signal is larger.

Referring to fig. 3, in an embodiment of the present invention, the process of obtaining the phase difference between the detection signal and the detection reference signal includes:

and S41, shaping the detection reference signal to obtain a second square wave signal. The shaping can be realized by utilizing a shaping circuit, the shaping circuit is mainly used for shaping slowly-changed or irregular signals to enable the slowly-changed or irregular signals to be changed into signals with steep edges, can also be used for eliminating interference signals in input signals, and can also realize the conversion of one waveform into another waveform. Schmitt trigger is a common shaping circuit in practical application. Furthermore, the shaping can also be implemented with a comparator. After shaping, the detection reference signal is shaped into a square wave signal, namely the second square wave signal. Referring to fig. 2A, the first square wave signal becomes a detection reference signal in1 after passing through the detection circuit, and the detection reference signal in1 becomes the second square wave signal fb1 after being shaped.

And S42, performing logic exclusive OR processing on the first square wave signal and the second square wave signal to obtain a first phase difference pulse. Referring to fig. 2A, the first square wave signal drv and the second square wave signal fb1 are xored, and the portions of the first square wave signal drv and the second square wave signal fb1 that are both high level or low level are xored to output low level; the high level is outputted after the exclusive or operation is performed on the high level and the low level, so that the first square wave signal drv and the second square wave signal fb1 are exclusive ored to obtain the first phase difference pulse gat 1. A time difference exists between the rising edge of the second square wave signal fb1 and the rising edge of the first square wave signal drv, and the time difference is the width of the first phase difference pulse gat1, so the phase difference between the second square wave signal and the first square wave signal can be calculated according to the width of the first phase difference pulse gat 1. The corresponding phase change of the first square wave signal in one sampling period is 2 pi, so the phase difference calculation formula between the second square wave signal and the first square wave signal isWherein T represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₁<T。

And S43, shaping the detection signal to obtain a third-party wave signal. The shaping can be realized by a shaping circuit and also can be realized by a comparison circuit. After shaping, the detection signal is shaped into a square wave signal, namely the third square wave signal. Referring to fig. 2B, after the detection circuit is connected to the micro capacitor to be tested, the first square-wave signal drv flows through the detection circuit to form a detection signal in2, and the detection signal in2 is shaped to become the third square-wave signal fb 2.

And S44, performing logic XOR processing on the first square wave signal and the third square wave signal to obtain a second phase difference pulse. Referring to fig. 2B, the first square wave signal drv and the third square wave signal fb2 are xored, and the portions of the first square wave signal drv and the third square wave signal fb2 that are both at the high level or at the low level are xored to output the low level; since the high level is outputted after the exclusive or operation is performed on the high level and the low level, the gat2 signal is the second phase difference pulse obtained by exclusive or operation of the first square wave signal drv and the third square wave signal fb 2. Further, since there is a time difference between the rising edge of the third square wave signal fb2 and the rising edge of the first square wave signal drv, which is the width of the second phase difference pulse gat2, a phase difference between the third square wave signal and the first square wave signal can be calculated from the width of the second phase difference pulse gat 2. The corresponding phase change of the first square wave signal in one sampling period is 2 pi, so the calculation formula of the phase difference between the third square wave signal and the first square wave signal isWherein T represents the time length of one sampling period of the first square wave signal; t is t₂Representing the pulse width, t, of said second phase difference pulse₂<T。

S45, calculating a phase difference between the detection signal and the detection reference signal according to the pulse width of the first phase difference pulse and the pulse width of the second phase difference pulse, wherein the calculation formula is:wherein Δ P₁Is the phase difference of the detection signal and the detection reference signal; t represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₂To representPulse width, t, of the second phase difference pulse₁<t₂<T。

In an embodiment of the present invention, a method for measuring a pulse width of the phase difference pulse includes: measuring a pulse width of the phase difference pulse using the reference clock signal. Specifically, referring to fig. 4, the implementation method for measuring the pulse width of the phase difference pulse includes:

s451, performing logic AND operation on the reference clock signal and the phase difference pulse signal to obtain a corresponding phase signal; referring to fig. 2A, after the reference clock signal clk and the first phase difference pulse signal gat1 are logically anded, a first phase signal phase1 is obtained; referring to fig. 2B, the reference clock signal clk is logically anded with the second phase difference pulse signal gat2 to obtain a second phase signal phase 2. In one sampling period of the first wave signal, the number of pulses of the first phase signal phase1 is proportional to the pulse width of the first phase difference pulse gat1, and the number of pulses of the second phase signal phase2 is proportional to the pulse width of the second phase difference pulse gat 2.

S452, acquiring the number of pulses included in one period of the phase signal. The number of pulses may be obtained using a frequency meter. Specifically, the number of pulses included in one cycle of the first phase signal 1 and the number of pulses included in one cycle of the second phase signal 2 are measured by a frequency meter, respectively.

S453, calculating the pulse width of the phase difference pulse according to the pulse number. The duration of each pulse in the phase signal is the same as the duration of each pulse in the reference clock signal, and the pulse width of the phase difference pulse can be obtained by multiplying the pulse number by the duration of each pulse in the reference clock signal. Specifically, the pulse width of the first phase difference pulse gat1 is calculated from the number of pulses included in one cycle of the first phase signal 1, and the pulse width of the second phase difference pulse gat2 is calculated from the number of pulses included in one cycle of the second phase signal 2.

In an embodiment of the present invention, the detection circuit includes a buffer and a resistor; the pulse signal flows through the buffer and the resistor and then is converted into the detection reference signal; after the detection circuit is connected with the micro capacitor to be detected, the pulse signal flows through the first buffer and the resistor and then is converted into the detection signal. In a practical circuit, the pulse signal first flows through the buffer and then through the resistor.

When the detection circuit is not connected with the micro capacitor to be detected, the resistor is connected with the capacitor in the detection circuit in series to form an RC circuit. In particular, if the pulse signal is a square wave, within one period of the pulse signal:

when the pulse signal is converted from low level to high level, the capacitor in the detection circuit starts to charge, the voltage value at the connection position of the capacitor and the resistor in the RC circuit is the detection reference signal, and the change relationship of the voltage value along with time is the detection reference signalWherein t represents time; u shape_sThe voltage value corresponding to the high level of the pulse signal is represented; r is the resistance value of the resistor, and C is the capacitance value of the capacitor in the detection circuit. u. of_c(t) is the voltage of the detection reference signal, and its time-varying image is shown in the section (i) of fig. 5A. When the time is long enough, the voltage of the detection reference signal is U_s。

When the pulse signal is converted from high level to low level, the capacitor in the detection circuit starts to discharge, and the time-dependent change relationship of the voltage of the detection reference signal isu_c(t) is the voltage of the detection reference signal, and the time-varying image thereof is shown in the second paragraph of fig. 5A. The voltage of the detection reference signal is 0 when the time is long enough.

In summary, fig. 5A shows the voltage of the detection reference signal in one period of the pulse signal.

When the detection circuit is connected with the micro capacitor to be detected, the micro capacitor to be detected is connected with the capacitor in the detection circuit in parallel and then forms an RC circuit with the resistor. In particular, if the pulse signal is a square wave, within one period of the pulse signal:

when the pulse signal is converted from low level to high level, the capacitor in the detection circuit starts to charge, the voltage value at the connection part of the capacitor and the resistor in the RC circuit is the detection signal, and the change relationship of the voltage value along with time is the detection signalWherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; u'_c(t) represents a voltage of the detection signal. When the time is long enough, the voltage of the detection signal is U_s. The process of the detection signal increase is slower than the detection reference signal.

When the pulse signal is converted from high level to low level, the capacitor in the detection circuit starts to discharge, and the time-dependent change relationship of the voltage of the detection reference signal isThe voltage of the detection signal is 0 when the time is sufficiently long. The detection signal reduction process is slower than the detection reference signal.

In an embodiment of the present invention, the shaping unit includes an input buffer; the input buffer is connected with the output end of the detection circuit and is used for shaping the detection reference signal and the detection signal; in particular, the input buffer is a schmitt trigger. The Schmitt trigger has two stable states, but is different from a common trigger in that the Schmitt trigger adopts a potential triggering mode, and the state of the Schmitt trigger is maintained by the potential of an input signal; for input signals with two different changing directions of negative decreasing and positive increasing, the Schmitt trigger has different threshold voltages.

Please refer toReferring to fig. 5A, the detection reference signal shown in fig. 5A is used as the input signal of the input buffer: when u is_c(t) when greater than a threshold of the input buffer, the input buffer outputting a high level; when u is_c(t) when the threshold of the input buffer is less than or equal to, the input buffer outputs a low level. Fig. 5B shows a second square wave signal corresponding to the detection reference signal described in fig. 5A.

Similarly, when the detection circuit is connected with the micro capacitor to be detected, a detection signal is used as an input signal of the input buffer: when the detection signal is larger than the threshold value of the input buffer, the input buffer outputs a high level; when the detection signal is less than or equal to the threshold value of the input buffer, the number of the input buffers is low. Therefore, the detection signal can obtain a corresponding third-party wave signal after being shaped by the input buffer.

The calculation module comprises: a conversion coefficient calculating subunit, connected to the phase difference obtaining module, for calculating a conversion coefficient between the phase difference and the capacitance value, where a calculation formula of the conversion coefficient isWherein K represents a conversion coefficient between the phase difference and the capacitance value; f is the frequency of the pulse signal; r is the resistance value of the resistor; d is the voltage ratio of the threshold value of the input buffer to the first square wave signal, and the value range of D is 0<D<1; preferably, the first and second electrodes are formed of a metal,a capacitance value calculating subunit connected with the conversion coefficient calculating subunit and used for calculating the capacitance value of the micro capacitor to be measured, wherein the calculation formula is C_x＝K×ΔP₁(ii) a Wherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; delta P₁Is the phase difference of the detection signal and the detection reference signal.

In this embodiment, when the detection circuit is not connected to the micro-capacitor to be tested, the pulse signal is applied for one cycleIn the period, when the voltage of the detection reference signal changes from low to high, the voltage ratio of the voltage of the detection reference signal to the first square wave signal is equal to D at time tt1, wherein tt1 is-RCln (1-D); therefore, when the detection circuit is not connected to the micro-capacitor to be measured, the phase shift of the detection signal relative to the pulse signal is P₃＝-2πRCfln(1-D)。

When the detection circuit is connected with a micro capacitor to be detected, in one period of the pulse signal, when the voltage of the detection signal changes from low to high, the voltage ratio of the voltage of the detection signal to the voltage of the first square wave signal is equal to D at the moment tt2, wherein tt2 ═ -R (C + C)_x) ln (1-D); therefore, when the detection circuit is connected with the micro capacitor to be measured, the phase shift of the detection signal relative to the pulse signal is P₄＝-2πR(C+C_x)fln(1-D)。

As can be seen from the above, the phase difference Δ P between the detection signal and the detection reference signal is P₄-P₃＝-2πRC_xfln (1-D). Where Δ P is the theoretical value of the phase difference. Therefore, if the phase difference Δ P is known, it can be determined fromAnd obtaining the capacitance value of the micro capacitor to be measured, therefore,i.e. the conversion coefficient between the phase difference and the capacitance value.

In the present embodiment, the measured phase difference Δ P₁Can be according to formula C_x＝K×ΔP₁And calculating to obtain the capacitance value of the micro capacitor to be measured.

In an embodiment of the invention, a resistance value R is 500Kohm, a frequency f of the pulse signal is 1kHZ, and a voltage ratio of the threshold of the input buffer to the first square wave signalThe conversion factor K ≈ 3.183 × 10^-10. At this time, the phase difference generated by the micro capacitor to be measured introduced with 1pF is 0.124 °.

In an embodiment of the invention, the resistance is an internal resistance of a related element in the detection circuit, such as an internal resistance of a buffer.

In an embodiment of the invention, the method for detecting micro capacitance further includes: changing the resistance value of the resistor to change the phase resolution of the micro-capacitance detection method; the phase resolution represents the minimum capacitance value that the micro-capacitance detection method can detect. Due to the phase difference introduced by the micro capacitor to be testedThe magnitude of the phase difference depends on the frequency f of the pulse signal, the resistance value R, the threshold value of the input buffer and the capacitance value C of the micro capacitor to be measured_x. The phase difference is an angle, and the measurement of the phase difference depends on the precision of an angle measurement method; the measurement error for this angle is large when the phase difference is too small. Therefore, in order to ensure the accuracy of the measurement, the phase difference introduced by the micro capacitor to be measured should be within a proper value range.

In this embodiment, the phase resolution of the micro-capacitance detection method is changed by changing the resistance value of the resistor. Assuming that the minimum phase difference which can be accurately detected by the adopted phase difference measurement method is 0.124 degrees: when the resistance value R is 500Kohm, the frequency f of the pulse signal is 1kHZ, and the voltage ratio of the threshold value of the input buffer to the first square wave signalAt the moment, the minimum value of the capacitance which can be accurately detected by the micro-capacitance detection method is 1 pF; when the resistance value R is 5000Kohm, the frequency f of the pulse signal is 1kHZ, and the voltage ratio of the threshold value of the input buffer to the first square wave signalCapacitor capable of being accurately detected by micro-capacitor detection methodThe minimum value is 0.1pF, and the corresponding phase resolution capability is improved by 10 times. The change of the resistance value of the resistor can be realized by using an adjustable resistor in a circuit, can also be realized by connecting a newly added resistor in series or in parallel with an original resistor, and can also be realized by replacing the original resistor with a proper resistance value.

In an embodiment of the invention, the method for detecting micro capacitance further includes: adjusting the frequency of the reference clock signal to adjust the phase resolution of the micro-capacitance detection method; the phase resolution is related to the frequency of the reference clock signal byWherein, P_LSBFor the phase resolution, representing the minimum capacitance value that the micro-capacitance detection method can detect; f is the frequency of the first square wave signal; f. of_CLKIs the frequency of the reference clock signal. In this embodiment, the phase difference is measured by a reference clock signal, so the minimum phase difference that can be accurately measured is related to the frequency of the reference clock signal. For example, when the frequency of the reference clock signal is f_CLK24MHz, the frequency f of the pulse signal is 1KHZ, and the phase resolution P is then obtained_LSBAnd is approximately equal to 0.015 deg., the minimum capacitance value that can be resolved at this time is 0.02 pF. When the frequency f of the reference clock signal_CLK240MHz, the frequency f of the pulse signal is 1KHZ, and the phase resolution P is_LSBAnd is approximately equal to 0.0015 degrees, and the minimum capacitance value which can be distinguished at this time is 0.002 pF. Therefore, the phase resolution of the micro-capacitance detection method is improved by 10 times.

In an embodiment of the invention, the phase resolution of the micro-capacitance detection method is changed by simultaneously changing the resistance value of the resistor and adjusting the frequency of the reference clock signal. For example, the resistance value R is 10Mohm, and the reference clock frequency f_CLKAt 600MHz, the micro capacitance detection method can resolve a capacitance value of 0.00004 pF.

In an embodiment of the invention, the detection circuit has a parasitic capacitance. The parasitic capacitance generally refers to the capacitance characteristics of the inductor, the resistor, the chip pin and the like under high frequency conditions. In fact, a resistor, equivalent to the series connection of a capacitor, an inductor and a resistor, does not perform very well at low frequencies, while at high frequencies the equivalent value increases, not negligible. In this embodiment, the parasitic capacitor can be regarded as being connected in parallel with the capacitor element in the detection circuit.

The invention also provides a micro-capacitance detection device. Referring to fig. 6, the micro capacitance detecting apparatus 600 includes:

the signal generating module 610 is configured to generate a pulse signal. The pulse signal is a discrete signal with various shapes, and compared with a common analog signal (such as a sine wave), the waveforms are discontinuous on the vertical axis (the waveforms have obvious intervals from one another) and have certain periodicity. Common pulse signals include rectangular pulses, sawtooth pulses, triangular pulses, spike pulses, step pulses, and the like.

The detection circuit 620 is connected to the signal generation module 610, and is configured to convert the pulse signal into a detection reference signal; and the detection circuit is connected with the micro capacitor to be detected and is used for converting the pulse signal into a detection signal. When the detection circuit 620 includes a capacitive element or is connected to a capacitive element, the pulse signal will generate a phase change after flowing through the detection circuit, that is: so that the pulse signal will generate a phase shift. The magnitude of the phase change depends on the capacitance value of a capacitive element included in the detection circuit and the capacitance value of a capacitive element connected to the detection circuit.

When the detection circuit 620 is not connected to the micro capacitor to be detected, the pulse signal flows through the detection circuit to form the detection reference signal. In particular, the detection circuit does not include a capacitive element and does not have a parasitic capacitance, and the detection reference signal and the pulse signal are in the same phase, that is, the phase difference is 0.

After the detection circuit 620 is connected with the micro capacitor to be detected, the pulse signal flows through the detection circuit to form the detection signal.

And a phase difference obtaining module 630, connected to the output end of the detection circuit 620 and the signal generating module, respectively, for obtaining a phase difference between the detection signal and the detection reference signal. The phase difference is related to the capacitance value of the micro capacitor to be measured, so that the capacitance value of the micro capacitor to be measured can be obtained through calculation of the phase difference.

And the calculating module 640 is connected with the phase difference obtaining module 630 and is used for calculating and obtaining the capacitance value of the micro capacitor to be measured according to the phase difference.

In an embodiment of the present invention, the signal generating module 610 includes: a clock unit 611 for generating a reference clock signal; a frequency divider unit 612, connected to the clock unit and the detection circuit, for performing frequency division processing on the reference clock signal to generate a first square wave signal; the first square wave signal is the pulse signal.

The reference clock signal is the basis for sequential logic, which determines when the state in a logic cell is updated, and is a semaphore with a fixed period that is independent of circuit operating conditions. The reference clock signal is typically used in synchronous circuits, playing the role of a timer, and making up the electronic components of the circuit. One common type of reference clock signal is a 50% duty cycle square wave signal.

The frequency dividing unit is realized by a frequency divider. A frequency divider is a device that performs frequency division processing on an input signal and outputs a specific frequency component in the input signal. The frequency of the signal output by the frequency divider can be changed by setting the frequency division coefficient.

Referring to fig. 2, the reference clock signal is input to the frequency divider 710, and the frequency divider 710 extracts a specific frequency component of the reference clock signal and outputs a square wave signal with a specific frequency, which is labeled as a first square wave signal drv. The first square wave signal is the pulse signal.

In an embodiment of the present invention, the phase difference obtaining module includes:

a shaping unit 631 connected to the output terminal of the detection circuit 620, configured to shape the detection reference signal to obtain a second square wave signal; after the detection circuit 620 is connected to the micro capacitor to be detected, the shaping unit 631 is configured to shape the detection signal to obtain a third-party wave signal. The shaping unit 631 is configured to shape a slowly changing or irregularly changing signal into a signal with steep edges, and also may be configured to remove an interference signal from an input signal, and may also implement a conversion from one waveform to another waveform. The shaping unit 631 may be a schmitt trigger or a comparator. After shaping, the detection reference signal is shaped into a square wave signal, namely the second square wave signal.

An exclusive or unit 632, respectively connected to the shaping unit 631 and the signal generating module 632, configured to perform logical exclusive or processing on the first square wave signal and the second square wave signal to obtain a first phase difference pulse; referring to fig. 2A, the first square wave signal drv and the second square wave signal fb1 are xored, and both are at a high level or at a low level and correspond to a low level after being partially xored; one of the two signals is at a high level, and the other one is at a low level and corresponds to a high level after being subjected to partial exclusive-or, so that the gat1 signal is the first phase difference pulse obtained after the exclusive-or processing is performed on the first square wave signal drv and the second square wave signal fb 1. In addition, there is a time difference between the rising edge of the second square wave signal fb1 and the rising edge of the first square wave signal drv, which is the width of the first phase difference pulse gat1, so that the phase difference between the second square wave signal and the first square wave signal can be calculated according to the width of the first phase difference pulse gat 1. The corresponding phase change of the first square wave signal in one sampling period is 2 pi, so the phase difference calculation formula between the second square wave signal and the first square wave signal isWherein T represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₁<T。

The detection is carried outAfter the circuit 620 is connected to the micro capacitor to be measured, the xor unit 631 is configured to perform logical xor processing on the first square wave signal and the third square wave signal to obtain a second phase difference pulse. Referring to fig. 2B, the first square wave signal drv and the third square wave signal fb2 are xored, and both are at a high level or at a low level and correspond to a low level after being partially xored; one of the two signals is at a high level, and the other one is at a low level and corresponds to a high level after being subjected to partial exclusive or, so that the gat2 signal is the second phase difference pulse obtained after the exclusive or processing is performed on the first square wave signal drv and the third square wave signal fb 2. Further, since there is a time difference between the rising edge of the third square wave signal fb2 and the rising edge of the first square wave signal drv, which is the width of the second phase difference pulse gat2, a phase difference between the third square wave signal and the first square wave signal can be calculated from the width of the second phase difference pulse gat 2. The corresponding phase change of the first square wave signal in one sampling period is 2 pi, so the calculation formula of the phase difference between the third square wave signal and the first square wave signal isWherein T represents the time length of one sampling period of the first square wave signal; t is t₂Representing the pulse width, t, of said second phase difference pulse₂<T。

A phase difference calculating unit 633, connected to the exclusive or unit 632, for calculating a phase difference between the detection signal and the detection reference signal according to a pulse width of the first phase difference pulse and a pulse width of the second phase difference pulse, where the calculation formula is:wherein Δ P₁Is the phase difference of the detection signal and the detection reference signal; t represents the time length of one sampling period of the first square wave signal; t is t₁Representing the pulse width, t, of said first phase difference pulse₂Representing the pulse width, t, of said second phase difference pulse₁<t₂<T。

In an embodiment of the present invention, the phase difference calculating unit includes: and the pulse width measuring subunit is connected with the exclusive-or unit and is used for measuring the pulse width of the phase difference pulse by using the reference clock signal. In this embodiment, the pulse width measurement subunit includes a logic and circuit, and the logic and circuit is configured to perform a logic and operation on the reference clock signal and the phase difference pulse signal to obtain a corresponding phase signal. The pulse width measuring subunit cooperates with the frequency meter to calculate the pulse width of the phase difference pulse according to the number of pulses contained in one period of the phase signal.

In an embodiment of the present invention, the detection circuit 620 includes: a first buffer 621 connected to the signal generating module for buffering the pulse signal; a resistor 622; the first end of the resistor 622 is connected to the first buffer 621, and the second end is connected to the phase difference obtaining module 630; the pulse signal is converted into the detection reference signal after flowing through the first buffer 621 and the resistor 622; after the detection circuit 621 is connected to the micro capacitor to be detected, the pulse signal flows through the first buffer 621 and the resistor 622 and is converted into the detection signal.

When the detection circuit 620 is not connected to the micro capacitor to be detected, the resistor 622 and the capacitor in the detection circuit 620 are connected in series to form an RC circuit. In particular, if the pulse signal is a square wave, within one period of the pulse signal:

when the pulse signal is converted from low level to high level, the capacitor in the detection circuit 620 starts to charge, and at this time, the voltage value at the connection between the capacitor in the RC circuit and the resistor 622 is the detection reference signal, and the time-varying relationship thereof is the detection reference signalWherein t represents time; u shape_sThe voltage value corresponding to the high level of the pulse signal is represented; r is the resistance value of the resistor, and C is the capacitance value of the capacitor in the detection circuit. u. of_c(t) is the detectionThe voltage of the reference signal is measured, and the time-varying image thereof is shown in the section I of FIG. 5A. When the time is long enough, the voltage of the detection reference signal is U_s。

When the pulse signal is converted from high level to low level, the capacitor in the detection circuit 620 starts to discharge, and the voltage of the detection reference signal changes with timeu_c(t) is the voltage of the detection reference signal, and the time-varying image thereof is shown in the second paragraph of fig. 5A. The voltage of the detection reference signal is 0 when the time is long enough.

In summary, fig. 5A shows the voltage of the detection reference signal in one period of the pulse signal.

When the detection circuit is connected with the micro capacitor to be detected, the micro capacitor to be detected is connected with the capacitor in the detection circuit 620 in parallel and then forms an RC circuit with the resistor. In particular, if the pulse signal is a square wave, within one period of the pulse signal:

when the pulse signal is converted from low level to high level, the capacitor in the detection circuit 620 starts to charge, and at this time, the voltage value at the connection between the capacitor in the RC circuit and the resistor 622 is the detection signal, and the time-varying relationship isWherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; u'_c(t) represents a voltage of the detection signal. When the time is long enough, the voltage of the detection signal is U_s. The process of the detection signal increase is slower than the detection reference signal.

When the pulse signal is converted from high level to low level, the capacitor in the detection circuit 620 starts to discharge, and the voltage of the detection reference signal changes with timeThe voltage of the detection signal is 0 when the time is sufficiently long. The detection signal reduction process is slower than the detection reference signal.

In an embodiment of the present invention, the shaping unit 631 comprises an input buffer; the input buffer is connected with the output end of the detection circuit and is used for shaping the detection reference signal and the detection signal. In particular, the input buffer is a schmitt trigger. The Schmitt trigger has two stable states, but is different from a common trigger in that the Schmitt trigger adopts a potential triggering mode, and the state of the Schmitt trigger is maintained by the potential of an input signal; for input signals with two different changing directions of negative decreasing and positive increasing, the Schmitt trigger has different threshold voltages.

Referring to fig. 5A, the detection reference signal shown in fig. 5A is used as the input signal of the input buffer: when u is_c(t) when greater than a threshold of the input buffer, the input buffer outputting a high level; when u is_c(t) when the threshold of the input buffer is less than or equal to, the input buffer outputs a low level. Fig. 5B shows a second square wave signal corresponding to the detection reference signal described in fig. 5A.

Similarly, when the detection circuit is connected with the micro capacitor to be detected, a detection signal is used as an input signal of the input buffer: when the detection signal is larger than the threshold value of the input buffer, the input buffer outputs a high level; when the detection signal is less than or equal to the threshold value of the input buffer, the number of the input buffers is low. Therefore, the detection signal can obtain a corresponding third-party wave signal after being shaped by the input buffer.

The calculation module 640 includes:

a conversion coefficient calculating unit 641 connected to the phase difference obtaining module, configured to calculate a conversion coefficient between the phase difference and the capacitance, where the calculation formula of the conversion coefficient isWherein K represents a conversion coefficient between the phase difference and the capacitance value; f is the frequency of the pulse signal; r is the resistance value of the resistor; d is the voltage ratio of the threshold value of the input buffer to the first square wave signal, and the value range of D is 0<D<1；

A capacitance value calculating unit 642 connected to the conversion coefficient calculating unit for calculating the capacitance value of the micro capacitor to be measured, wherein the calculation formula is C_xK × Δ P; wherein C is_xThe capacitance value of the micro capacitor to be measured is obtained; Δ P is a phase difference of the detection signal and the detection reference signal.

In this embodiment, when the detection circuit 620 is not connected to the micro capacitor to be measured, in one period of the pulse signal, when the voltage of the detection reference signal changes from low to high, the voltage ratio of the voltage of the detection reference signal to the first square wave signal is equal to D at time tt1, where tt1 is-RCln (1-D); therefore, when the detection circuit 620 is not connected to the micro-capacitor to be tested, the phase shift of the detection signal relative to the pulse signal is P₃＝-2πRCfln(1-D)。

When the detection circuit 620 is connected with the micro capacitor to be detected, in one period of the pulse signal, when the voltage of the detection signal changes from low to high, the voltage ratio of the voltage of the detection signal to the voltage of the first square wave signal is equal to D at time tt2, wherein tt2 ═ R (C + C)_x) ln (1-D); therefore, when the detection circuit 620 is connected to the micro capacitor to be tested, the phase shift of the detection signal relative to the pulse signal is P₄＝-2πR(C+C_x)fln(1-D)。

As can be seen from the above, the phase difference Δ P between the detection signal and the detection reference signal is P₄-P₃＝-2πRC_xfln (1-D). Where Δ P is the theoretical value of the phase difference. Therefore, if the phase difference Δ P is known, it can be determined fromAnd obtaining the capacitance value of the micro capacitor to be measured, therefore,i.e. the conversion coefficient between the phase difference and the capacitance value.

In the present embodiment, the measured phase difference Δ P₁Can be according to formula C_x＝K×ΔP₁And calculating to obtain the capacitance value of the micro capacitor to be measured.

In an embodiment of the invention, a resistance value R is 500Kohm, a frequency f of the pulse signal is 1kHZ, and a voltage ratio of the threshold of the input buffer to the first square wave signalThe conversion factor K ≈ 3.183 × 10^-10. At this time, the phase difference generated by the micro capacitor to be measured introduced with 1pF is 0.124 °.

In an embodiment of the invention, the resistance is an internal resistance of a related element in the detection circuit, such as an internal resistance of a buffer.

In an embodiment of the present invention, the resistance value of the resistor can be changed; the phase resolution of the micro-capacitance detection method can be changed by changing the resistance value of the resistor; the phase resolution represents the minimum capacitance value that the micro-capacitance detection method can detect.

Due to the phase difference introduced by the micro capacitor to be detected, the size of the phase difference depends on the frequency of the pulse signal, the resistance value, the threshold value of the input buffer and the capacitance value of the micro capacitor to be detected. The phase difference is an angle, and the measurement of the phase difference depends on the precision of a specific measurement method; when the phase difference value is too small, the measurement error for the phase difference is large. Therefore, in order to ensure the accuracy of the measurement, the phase difference introduced by the micro capacitor to be measured should be within a proper value range.

In this embodiment, the phase resolution of the micro-capacitance detection method is changed by changing the resistance value of the resistor. Assuming that the minimum phase difference which can be accurately detected by the adopted phase difference measurement method is 0.124 degrees: when the resistance value R is 500Kohm, the pulse signal1kHZ, a voltage ratio of a threshold value of the input buffer to the first square wave signalAt the moment, the minimum value of the capacitance which can be accurately detected by the micro-capacitance detection method is 1 pF; when the resistance value R is 5000Kohm, the frequency f of the pulse signal is 1kHZ, and the voltage ratio of the threshold value of the input buffer to the first square wave signalAt the moment, the minimum value of the capacitance which can be accurately detected by the micro-capacitance detection method is 0.1pF, and the corresponding phase resolution capability is improved by 10 times. The change of the resistance value of the resistor can be realized by using an adjustable resistor in a circuit, can also be realized by connecting a newly added resistor in series or in parallel with an original resistor, and can also be realized by replacing the original resistor with a proper resistance value.

In an embodiment of the present invention, the frequency of the reference clock signal generated by the clock unit is adjustable; the phase resolution of the micro-capacitance detection method can be adjusted by adjusting the frequency of the reference clock signal; the phase resolution is related to the frequency of the reference clock signal byWherein, P_LSBFor the phase resolution, representing the minimum capacitance value that the micro-capacitance detection method can detect; f is the frequency of the first square wave signal; f. of_CLKIs the frequency of the reference clock signal.

For example, when the frequency of the reference clock signal is f_CLK24MHz, the frequency f of the pulse signal is 1KHZ, and the phase resolution P is then obtained_LSBAnd is approximately equal to 0.015 deg., the minimum capacitance value that can be resolved at this time is 0.02 pF. When the frequency f of the reference clock signal_CLK240MHz, the frequency f of the pulse signal is 1KHZ, and the phase resolution P is_LSBAnd is approximately equal to 0.0015 degrees, and the minimum capacitance value which can be distinguished at this time is 0.002 pF. Compared withAnd the phase resolution capability of the micro-capacitance detection method is improved by 10 times.

In an embodiment of the invention, the phase resolution of the micro-capacitance detection method is changed by simultaneously changing the resistance value of the resistor and adjusting the frequency of the reference clock signal. For example, the resistance value R is 10Mohm, and the reference clock frequency f_CLKAt 600MHz, the micro capacitance detection method can resolve a capacitance value of 0.00004 pF.

In an embodiment of the invention, the detection circuit has a parasitic capacitance. The parasitic capacitance generally refers to the capacitance characteristics of the inductor, the resistor, the chip pin and the like under high frequency conditions. In fact, a resistor is equivalent to a series connection of a capacitor, an inductor, and a resistor, which is not very significant at low frequencies, while at high frequencies the equivalent value increases, where the parasitic capacitance cannot be ignored. In this embodiment, the parasitic capacitor can be regarded as being connected in parallel with the capacitor element in the detection circuit.

In an embodiment of the invention, the detection circuit includes a capacitive element, and the capacitive element may be a parasitic capacitance of the detection circuit, a capacitive element inside the detection circuit, or a capacitive element other than the detection circuit.

Fig. 7A is a circuit diagram of the micro-capacitor detecting device in this embodiment when the detecting circuit is not connected to the micro-capacitor to be detected. The signal generation block consists of a reference clock (not shown in the figure) and a divider 710. The reference clock signal is a square wave, and a first square wave signal drv is obtained after frequency division. The resistor 720 and the capacitor 750 form an RC circuit, and the capacitor may be a parasitic capacitor of the detection circuit, a capacitor inside the detection circuit, or a capacitor other than the detection circuit. The first square wave signal drv flows through the first buffer 720 and the resistor 730 to form the detection reference signal in 1. Then, a schmitt trigger 760 is used to acquire and shape the detection reference signal in1 to obtain a second square wave signal fb1, and the second square wave signal fb1 is xored with the first square wave signal drv through an xor gate 770 to obtain a first phase difference pulse signal gat 1; the first phase difference pulse signal gat1 and the reference clock signal clk are logically anded by the and gate 770 to obtain a first phase signal phase 1. Thereafter, the phase difference between the second square wave signal fb1 and the first square wave signal drv is quantized by a frequency meter in each sampling period, that is, the number of pulses in the first phase signal phase1 in each sampling period is obtained by the frequency meter, and then the phase difference is calculated.

Fig. 7B is a schematic diagram illustrating a connection relationship between the detection circuit and the micro capacitor to be tested in this embodiment. The signal generation block consists of a reference clock (not shown in the figure) and a divider 710. The reference clock signal is a square wave, and a first square wave signal drv is obtained after frequency division. The resistor 720, the capacitor 750 and the micro capacitor 740 to be tested form an RC circuit, and the capacitor 750 is a capacitor element in the detection circuit or a parasitic capacitor of the detection circuit. The first square wave signal drv flows through the first buffer 720 and the resistor 730 to form the detection signal in 2. Then, a schmitt trigger 760 is used to acquire the detection signal in2 and perform shaping processing on the detection signal in2 to obtain a third square wave signal fb2, and the third square wave signal fb2 and the first square wave signal drv are xored through an xor gate 770 to obtain a second phase difference pulse signal gat 2; the second phase difference pulse signal gat2 and the reference clock signal clk are logically and-operated by the and gate 770 to obtain a second phase signal phase 2. The number of pulses in the second phase signal phase2 is proportional to the pulse width of the second phase difference pulse signal gat 2. Thereafter, the phase difference between the third square wave signal fb2 and the first square wave signal drv is quantized by using a frequency meter in each sampling period, that is, the number of pulses in the second phase signal phase2 in each sampling period is obtained by using the frequency meter, and then the phase difference is calculated.

In an embodiment of the invention, the detection circuit does not include a capacitive element and does not have a parasitic capacitance, and no capacitive element other than the micro capacitor to be detected is connected to the detection circuit.

Fig. 8A is a circuit diagram of the micro-capacitor detecting device in this embodiment when the detecting circuit is not connected to the micro-capacitor to be detected. The signal generation module consists of a reference clock (not shown in the figure) and a divider 810. The reference clock signal is a square wave, and a first square wave signal drv is obtained after frequency division. The first square-wave signal drv flows through the first buffer 820 and the resistor 830 to form a detection reference signal in1, and the detection reference signal in1 and the first square-wave signal drv are both square waves. Then, a schmitt trigger 860 is used to acquire the detection reference signal in1 and perform shaping processing on the detection reference signal to obtain a second square wave signal fb1, the second square wave signal fb1 and the first square wave signal drv are subjected to exclusive or operation through an exclusive or circuit 870 to obtain a first phase difference pulse signal gat1, and the phase difference pulse gat1 is 0 level in each period; the first phase difference pulse signal gat1 and the reference clock signal clk are logically anded by an and circuit 870 to obtain a first phase signal phase1, and the first phase signal phase1 is also at 0 level in each cycle. At this time, the number of pulses in one cycle of the first phase signal phase1 acquired by the frequency meter is 0, and the calculated phase difference is also 0.

Fig. 7B is a schematic diagram illustrating a connection relationship between the detection circuit and the micro capacitor to be tested in this embodiment. The signal generation module consists of a reference clock (not shown in the figure) and a divider 810. The reference clock signal is a square wave, and a first square wave signal drv is obtained after frequency division. The resistor 820 and the micro-capacitor 840 to be tested form an RC circuit, and the first square wave signal drv flows through the first buffer 820 and the resistor 830 to form a detection signal in 2. Then, a schmitt trigger 860 is used to obtain the detection signal in2 and perform shaping processing on the detection signal to obtain a third square wave signal fb2, and the third square wave signal fb2 and the first square wave signal drv are subjected to exclusive or operation through an exclusive or circuit 870 to obtain a second phase difference pulse signal gat 2; the second phase difference pulse signal gat2 and the reference clock signal clk are logically anded by an and circuit 870 to obtain a second phase signal phase 2. The number of pulses in the second phase signal phase2 is proportional to the pulse width of the second phase difference pulse signal gat 2. Thereafter, the phase difference between the third square wave signal fb2 and the first square wave signal drv is quantized by using a frequency meter in each sampling period, that is, the number of pulses in the second phase signal phase2 in each sampling period is obtained by using the frequency meter, and then the phase difference is calculated.

The protection scope of the micro-capacitance detection method of the present invention is not limited to the execution sequence of the steps listed in this embodiment, and all the solutions implemented by adding, subtracting and replacing the steps according to the principles of the present invention are included in the protection scope of the present invention.

The invention also provides a micro-capacitance detection device, which can realize the micro-capacitance detection method, but the realization device of the micro-capacitance detection method of the invention includes but is not limited to the structure of the micro-capacitance detection device listed in the embodiment, and all the structural modifications and substitutions of the prior art made according to the principle of the invention are included in the protection scope of the invention.

In summary, the method and the device for detecting micro capacitance of the present invention have the following advantages: the micro-capacitor detection method is completely realized by a digital circuit, an external interface also adopts a common IO port, and capacitance detection is realized by converting the capacitance value of the micro-capacitor into the phase difference of detection signals and detecting the phase difference. In the conventional scheme, detection of micro capacitance is generally realized under the participation of analog circuit devices such as a high-precision operational amplifier, an analog-to-digital converter (ADC), a digital-to-analog converter (DAC) and the like. Compared with the prior art, the micro-capacitance detection method has the advantages of high detection speed, wide detection range and the like. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.

The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.