阅读说明：本技术 一种rfid标签芯片的rc振荡器电路 (RC oscillator circuit of RFID label chip ) 是由 张建伟 于 2020-03-16 设计创作，主要内容包括：本发明提出一种RFID标签芯片的RC振荡器电路,其特征在于,包含：基准源电路,充放电电路,SR锁存器和开关控制电路。基准源电路的主要作用是产生偏置电流Ib和其镜像电流I1和I2。充放电电路的主要作用是在开关控制电路的控制下完成充放电过程,产生物理延时。SR锁存器的主要作用是根据n1和n2的电压翻转产生开关控制电路的输入信号和整个RC振荡器的输出信号。开关控制电路的主要作用是根据SR锁存器的输出信号,改变开关控制的相位,使充放电电路产生物理延时。本发明的有益效果是,无需使用传统RC振荡器电路中的运算放大器和比较器,具有功耗低,面积小,实现方式简单的优点。(The invention provides an RC oscillator circuit of an RFID label chip, which is characterized by comprising: the circuit comprises a reference source circuit, a charging and discharging circuit, an SR latch and a switch control circuit. The main function of the reference source circuit is to generate the bias current Ib and its mirror currents I1 and I2. The charge and discharge circuit has the main function of finishing the charge and discharge process under the control of the switch control circuit to generate physical time delay. The main role of the SR latch is to generate the input signal of the switch control circuit and the output signal of the entire RC oscillator from the voltage flips of n1 and n 2. The switch control circuit mainly has the function of changing the phase of switch control according to the output signal of the SR latch, so that the charge and discharge circuit generates physical time delay. The invention has the advantages of low power consumption, small area and simple realization mode without using an operational amplifier and a comparator in the traditional RC oscillator circuit.)

1. An RC oscillator circuit for an RFID tag chip, comprising: the circuit comprises a reference source circuit, a charging and discharging circuit, an SR latch and a switch control circuit; the reference source circuit is connected with the charge and discharge circuit and provides current for the charge and discharge circuit; the charge and discharge circuit is connected with the reference source circuit, the switch control circuit and the SR latch to complete the charge and discharge process and generate physical delay; the SR latch is connected with the charge-discharge circuit and the switch control circuit; and the switch control circuit is connected with the SR latch and the charging and discharging circuit.

2. The RC oscillator circuit for an RFID tag chip as claimed in claim 1, wherein said reference source circuit generates a bias current Ib and its mirror currents I1 and I2.

3. The RC oscillator circuit for an RFID tag chip as claimed in claim 1, wherein said charge and discharge circuit comprises 4 switches: s1, S2, S3 and S4, 4 switches are controlled by a phase signal, S1 and S4 are simultaneously conducted and are defined as a phase-1 state, S2 and S3 are simultaneously conducted and are defined as a phase-2 state, and the phase signal is connected with a switch control circuit.

Technical Field

The invention belongs to the technical field of integrated circuit design. And more particularly, to an RC oscillator circuit of an RFID tag chip.

Background

RFID (radio frequency identification) is a system in which a reader and a tag perform contactless communication. The tag stores information, establishes communication with the reader by receiving the instruction sent by the reader and returning corresponding data, and transmits the information to the reader. The tags are classified into active tags, semi-active tags and passive tags. Different power supply modes determine the selection and design indexes of a circuit architecture in the label.

The oscillator circuit is a basic circuit and is widely applied to various analog and digital-analog mixed products. Commonly used oscillator circuits are classified into ring oscillator circuits, RC oscillator circuits, LC oscillator circuits, and the like. The characteristics and the working principle of the oscillator circuits are different, and a proper framework and a proper implementation mode are selected according to different application conditions and product requirements.

The oscillator circuit used in the RFID tag should meet the requirements of power consumption, area and accuracy. The traditional RC oscillator circuit structure is also provided with an operational amplifier and a comparator, so that the power consumption is high, the occupied area is large, and the RC oscillator circuit structure is not suitable for RFID labels.

Disclosure of Invention

In order to overcome the defects of the traditional RC oscillator circuit, the invention introduces the RC type oscillator circuit suitable for the RFID working requirement, does not need to use an operational amplifier and a comparator in the traditional RC oscillator circuit, and has the advantages of low power consumption, small area and simple implementation mode.

An RC oscillator circuit for an RFID tag chip, comprising: the circuit comprises a reference source circuit, a charging and discharging circuit, an SR latch and a switch control circuit.

The output end of the reference source circuit is divided into three paths, and the three paths are connected with the charging and discharging circuit. The main function of the reference source circuit is to generate the bias current Ib and its mirror currents I1 and I2.

The input end of the charge and discharge circuit is divided into 4 paths, namely bias current Ib, mirror current I1, mirror current I2 and a switch control signal phase, wherein the three input ends of Ib, I1 and I2 are all connected to a reference source circuit, and the phase is connected to the switch control circuit; the output terminal of which is connected to the SR latch. The charge and discharge circuit has the main function of finishing the charge and discharge process under the control of the switch control circuit to generate physical time delay.

The charging and discharging circuit can be divided into a charging part and a comparison part, the input Ib, I1 and I2 of the charging and discharging circuit are connected with the reference source circuit, and the input phase comes from the switch control circuit. Where Ib is used for charging, I1 and I2 provide a weak pull-up for the compare circuit. The output of the charge and discharge circuit is connected with the SR latch. There are 4 switches in the charge and discharge circuit: the S1, S2, S3 and S4, 4 switches are controlled by the phase signal. S1 and S4 are turned on simultaneously, defined as phase-1 state, and S2 and S3 are turned on simultaneously, defined as phase-2 state.

When the circuit works in phase-1, Ib is used as a charging current to charge C1, when the voltage of the upper plate of C1 reaches the threshold voltage of NMOSM4, the pull-down circuit is conducted, and due to the strong design of the capacity of the pull-down circuit, after the grid electrode of the pull-down circuit reaches the threshold voltage to form a conductive channel, the voltage of a node n1 is pulled down, and a logic circuit at the later stage recognizes '0'; similarly, when the circuit operating state is switched to phase-2, S1 and S4 are opened, S2 and S3 are closed, Ib starts charging C2, and at the same time, the charge of C1 is rapidly discharged through S2 (the discharge time is much less than the charge time). When the upper plate voltage of C2 is charged to the threshold voltage of NMOS M3, the conducting channel of M3 is formed, the same pull-down capability is stronger than the pull-up of I2, the drain terminal voltage of M3 is pulled down, and node n2 is recognized as '0' by the subsequent logic circuit.

The input of the SR latch is divided into two paths which are connected to a charging and discharging circuit, namely n1 and n 2; the output of the RC oscillator circuit is divided into two paths, is connected to the switch control circuit and is used as an output signal of the whole RC oscillator circuit. The main function of the SR latch is to generate the input signal of the switch control circuit and the output signals osc _ out and osc _ out _ bar of the entire RC oscillator circuit according to the voltage flips of n1 and n2, osc _ out _ bar being the inverted signal of osc _ out.

The input of the switch control circuit is divided into two paths which are connected to the SR latch; the output is 1-way phase signal, which is connected to the charge and discharge circuit. The switch control circuit mainly has the function of changing the phase of switch control according to the output signal of the SR latch, so that the charge and discharge circuit generates physical time delay. The Phase signal may indicate two states: phase-1 and phase-2.

The invention has the advantages that the static power consumption only has the bias current Ib and the dynamic power consumption of the logic part, so that the power consumption of the oscillator circuit is lower; because the threshold voltage of the NMOS is used as the comparison voltage, the charging time is not influenced by the height of the power supply, and the NMOS can share the power supply with the reference generation module, so that two paths of charging currents can be combined into one path, a part for current mirror image copying is saved, the comparison part is in competition of weak pull-up and strong pull-down, the RC oscillator circuit is simple and efficient, an operational amplifier and a comparator in the traditional RC oscillator circuit are avoided, and the area and the power consumption of the oscillator circuit are smaller.

Drawings

FIG. 1 is a block diagram of an RC oscillator circuit of an RFID tag chip according to the present invention;

fig. 2 is a schematic diagram of a circuit structure of an RC oscillator of an RFID tag chip according to an embodiment of the present invention.

Detailed Description

Preferred embodiments of the present apparatus will be described in detail below with reference to the accompanying drawings.

As shown in fig. 1, the output of the reference source circuit is connected to the charging and discharging circuit, and the reference source circuit outputs three signals, which are the bias current Ib and the two mirror currents I1 and I2 thereof, respectively. Ib, I1 and I2 are input into the charge-discharge circuit.

As shown in fig. 1, the charge/discharge circuit has inputs Ib, I1, and I2 connected to the reference source circuit, and an input phase from the switch control circuit. The output of the charge and discharge circuit is connected with the SR latch. As shown in fig. 2, there are 4 switches in the charge and discharge circuit: the S1, S2, S3 and S4, 4 switches are controlled by the phase signal. S1 and S4 are turned on simultaneously, defined as phase-1 state, and S2 and S3 are turned on simultaneously, defined as phase-2 state. When the circuit works in phase-1, Ib is used as a charging current to charge C1, when the voltage of the upper plate of C1 reaches the threshold voltage of NMOS M4, the pull-down circuit is conducted, and due to the strong design of the capacity of the pull-down circuit, after the grid electrode of the pull-down circuit reaches the threshold voltage to form a conductive channel, the voltage of a node n1 is pulled down, and a logic circuit at the later stage recognizes '0'; similarly, when the circuit operating state is switched to phase-2, S1 and S4 are opened, S2 and S3 are closed, Ib starts charging C2, and at the same time, the charge of C1 is rapidly discharged through S2 (the discharge time is much less than the charge time). When the upper plate voltage of C2 is charged to the threshold voltage of NMOS M3, the conducting channel of M3 is formed, the same pull-down capability is stronger than the pull-up of I2, the drain terminal voltage of M3 is pulled down, and node n2 is recognized as '0' by the subsequent logic circuit.

As shown in fig. 1, the switch control circuit has an input of the SR latch and an output of the SR latch as a phase signal, and is connected to the charge/discharge circuit. When the output signal of the SR latch changes, the switch control circuit changes the phase signal output by the SR latch according to the output signal of the SR latch, so that the working state in the charging and discharging circuit is adjusted.

As shown in fig. 1, the input of the SR latch is divided into two paths n1 and n2, which are both connected to the charging and discharging circuit, and the outputs of the charging and discharging circuit are the output osc _ out of the RC oscillator circuit and the inverted signal osc _ out _ bar thereof, and are connected to the output ports of the switch control circuit and the RC oscillator circuit provided by the present invention. When the voltage at point n1 is pulled low, which is considered to be a logic '0', the S-R latch is set, and its output osc _ out changes from '0' to '1'; when the voltage at point n2 pulls low, which is considered a logic '0', the S-R latch is set, and its output osc _ out changes from '1' to '0'.

The above embodiment illustrates the operation of the RC oscillator circuit of the RFID tag chip according to the present invention.

While the present invention has been described in detail with respect to the preferred embodiments thereof, it will be apparent that various modifications and alternatives thereto will become apparent to those skilled in the art upon reading the foregoing description. The above description and drawings are only examples of the practice of the invention, and it should be understood that the above description is not to be taken as limiting the invention.