Si/SiC hybrid switch-based optimization method and system

文档序号:1025002 发布日期:2020-10-27 浏览:8次 中文

阅读说明:本技术 一种基于Si/SiC混合开关的优化方法及系统 (Si/SiC hybrid switch-based optimization method and system ) 是由 戴瑜兴 彭子舜 朱方 曾国强 张正江 闫正兵 王环 胡文 章纯 黄世沛 于 2020-06-10 设计创作,主要内容包括:本发明涉及一种基于Si/SiC混合开关的优化方法及系统,包括:根据延时时间、变化步长和最优延时时间更新变化步长;延时时间为基于Si/SiC混合开关的开通或关断的延时时间;根据延时时间和更新后的变化步长更新延时时间;将更新后的延时时间输入到基于Si/SiC混合开关的逆变器中计算逆变器的效率,将效率定义为适应值;若适应值比最优延时时间对应的适应值小,则用延时时间更新最优延时时间;若迭代次数ite小于设定最大迭代次数时,ite=ite+1,返回步骤“根据延时时间、变化步长和最优延时时间更新变化步长”;若迭代次数ite等于设定最大迭代次数时,输出最优延时时间;从而实现基于Si/SiC混合开关的自适应效率优化,减少基于Si/SiC混合开关的总损耗。(The invention relates to an optimization method and system based on a Si/SiC hybrid switch, which comprises the following steps: updating the change step length according to the delay time, the change step length and the optimal delay time; the delay time is based on the on or off delay time of the Si/SiC hybrid switch; updating the delay time according to the delay time and the updated change step length; inputting the updated delay time into an inverter based on a Si/SiC hybrid switch to calculate the efficiency of the inverter, and defining the efficiency as an adaptive value; if the adaptive value is smaller than the adaptive value corresponding to the optimal delay time, updating the optimal delay time by using the delay time; if the iteration time ite is less than the set maximum iteration time, the method returns to the step of updating the change step length according to the delay time, the change step length and the optimal delay time, wherein the ite is equal to the ite + 1; if the iteration time ite is equal to the set maximum iteration time, outputting the optimal delay time; therefore, the self-adaptive efficiency optimization based on the Si/SiC hybrid switch is realized, and the total loss based on the Si/SiC hybrid switch is reduced.)

1. A Si/SiC hybrid switch-based optimization method is characterized by comprising the following steps:

initializing delay time, a change step length of the delay time, optimal delay time and iteration time ite, wherein the delay time is the delay time based on the on or off of a Si/SiC hybrid switch;

updating the change step according to the delay time, the change step and the optimal delay time;

updating the delay time according to the delay time and the updated change step length;

inputting the updated delay time into an inverter based on a Si/SiC hybrid switch to calculate the efficiency of the inverter, and defining the efficiency as an adaptive value;

if the adaptive value is smaller than the adaptive value corresponding to the optimal delay time, updating the optimal delay time by using the delay time;

if the iteration time ite is less than the set maximum iteration time, the method returns to the step of updating the change step length according to the delay time, the change step length and the optimal delay time, wherein the ite is equal to the ite + 1;

and if the iteration time ite is equal to the set maximum iteration time, outputting the optimal delay time.

2. The optimization method based on the Si/SiC hybrid switch of claim 1, wherein the formula for updating the change step size is as follows:wherein v isij(ite) represents the step size of the change, vij(ite +1) represents the change step size after update, xij(ite) represents the delay time, fminRepresenting the minimum frequency value, fmaxRepresenting the maximum frequency value, rand1Represents [0, 1 ]]The random number within the interval is a random number,representing said optimal delay time, xij(ite)=(xi1(ite),xi2(ite),...,xin(ite)),vij(ite)=(vi1(ite),vi2(ite),...,vin(ite)), i 1,2, N, i denotes the number of delay times, j denotes the dimension of the delay time, and N denotes the maximum dimension of the delay time.

3. The optimization method based on the Si/SiC hybrid switch according to claim 2, wherein the updating the delay time specifically includes: if rand2≤liThen xij(ite+1)=xij(ite)+vij(ite +1), otherwise, xij(ite+1)=xij(ite)+rand3Ai;xij(ite +1) represents the delay time after update, rand2And rand3Represents [0, 1 ]]Random number within a range,/iLocal search rate, A, representing delay timeiRepresenting the average magnitude of the delay time.

4. The Si/SiC hybrid switch based optimization method of claim 1, wherein the adaptation value is expressed as:

wherein, PaDCDenotes the average power on the DC side, PaACRepresenting the average power on the AC side; u shapedcRepresents the DC side voltage and IacRepresents the direct side current; u shapeDenotes the output voltage, U, in the alpha stationary frameRepresents the output voltage under a beta static coordinate system; i isDenotes the output current in the alpha stationary frame, IRepresents the output current in the beta static coordinate system; t isoThe operation time of the inverter when the average power within the set range is obtained is shown, and t represents time.

5. An optimization system based on a Si/SiC hybrid switch, the system comprising:

the initialization module is used for initializing delay time, the change step length of the delay time, the optimal delay time and the iteration number ite, wherein the delay time is the delay time based on the on or off of the Si/SiC hybrid switch;

a change step updating module, configured to update the change step according to the delay time, the change step, and the optimal delay time;

the delay time updating module is used for updating the delay time according to the delay time and the updated change step length;

the adaptive value calculating module is used for inputting the updated delay time into an inverter based on a Si/SiC hybrid switch to calculate the efficiency of the inverter and defining the efficiency as an adaptive value;

the optimal delay time updating module is used for updating the optimal delay time by using the delay time if the adaptive value is smaller than the adaptive value corresponding to the optimal delay time;

a judging module, configured to return to the "change step updating module" when the iteration time ite is smaller than the set maximum iteration time, and is equal to ite + 1;

and the optimal delay time output module is used for outputting the optimal delay time when the iteration time ite is equal to the set maximum iteration time.

6. The Si/SiC hybrid switch based optimization system of claim 5, wherein the formula for updating the change step size is:

wherein v isij(ite) represents the step size of the change, vij(ite +1) represents the change step size after update, xij(ite) represents the delay time, fminRepresenting the minimum frequency value, fmaxRepresenting the maximum frequency value, rand1Represents [0, 1 ]]The random number within the interval is a random number,representing said optimal delay time, xij(ite)=(xi1(ite),xi2(ite),...,xin(ite)),vij(ite)=(vi1(ite),vi2(ite),...,vin(ite)), i 1,2, N, i denotes the number of delay times, j denotes the dimension of the delay time, and N denotes the maximum dimension of the delay time.

7. The Si/SiC hybrid switch based optimization system of claim 5, wherein the updating the delay time specifically comprises: if rand2≤liThen xij(ite+1)=xij(ite)+vij(ite +1), otherwise, xij(ite+1)=xij(ite)+rand3Ai;xij(ite +1) represents the delay time after update, rand2And rand3Represents [0, 1 ]]Random number within a range,/iA local search rate representing a delay time,Airepresenting the average magnitude of the delay time.

8. The Si/SiC hybrid switch based optimization system of claim 5, wherein the fitness value is expressed as:

Figure FDA0002532646690000032

wherein, PaDCDenotes the average power on the DC side, PaACRepresents the average power on the AC side, UdcRepresents the DC side voltage and IacRepresenting the direct side current, UDenotes the output voltage, U, in the alpha stationary frameDenotes the output voltage in the stationary frame of beta, IDenotes the output current in the alpha stationary frame, IDenotes the output current, T, in the beta stationary frameoThe operation time of the inverter when the average power within the set range is obtained is shown, and t represents time.

Technical Field

The invention relates to the technical field of switch optimization, in particular to an optimization method and system based on a Si/SiC hybrid switch.

Background

Silicon-based insulated gate bipolar transistor (SiIGBT)/silicon carbide-based metal-oxide semiconductor field effect transistor (SiMOSFET) hybrid switches, Si/SiC hybrid switches for short, comprise small-capacity SiC MOSFETs and large-capacity SiIGBTs which are operated in parallel, have advantages in cost/performance balance, have higher redundancy, and are considered as key contributing factors for high-efficiency and low-cost application of inverters. Generally, the SiCMOSFET needs to adopt a switching mode of switching first and then switching to achieve the minimum switching loss effect of the Si/SiC hybrid switch, which means that there is a delay time between the SiCMOSFET and the SiIGBT. The delay time can change the switching characteristics of the Si/SiC hybrid switch and the conduction time of the internal devices thereof, so that the total loss of the Si/SiC hybrid switch can be changed.

In recent years, there have been many reports focusing on reducing the total loss of Si/SiC hybrid switches in the context of DC/DC converter applications where a fixed delay time is effective to achieve optimal loss of the Si/SiC hybrid switch. However, in inverter applications, switching losses and conduction losses of the SiIGBT and SiCMOSFET vary over time due to the time-varying characteristics of the current. This means that minimizing the total losses of the Si/SiC hybrid switch in inverter applications cannot be guaranteed with a fixed delay time.

In order to further reduce the total loss of the Si/SiC hybrid switch in the context of inverter applications to achieve higher efficiency operation of the inverter, the optimal variable delay time may be designed using a loss model of the Si/SiC hybrid switch. However, the Si/SiC hybrid switching loss model is established on the premise that accurate device junction temperature, device equivalent resistance value at normal temperature, specific current waveform parameters are obtained, and an accurate double-pulse experimental platform needs to be established, so that the establishment of the model is extremely complex and time-consuming, and the optimal variable delay time is difficult to obtain.

Disclosure of Invention

Based on this, the invention aims to provide an optimization method and system based on a Si/SiC hybrid switch, which can reduce the total loss of the Si/SiC hybrid switch by adjusting the internal delay time of the Si/SiC hybrid switch.

In order to achieve the purpose, the invention provides the following scheme:

an optimization method based on a Si/SiC hybrid switch comprises the following steps:

initializing delay time, a change step length of the delay time, optimal delay time and iteration time ite, wherein the delay time is the delay time based on the on or off of a Si/SiC hybrid switch;

updating the change step according to the delay time, the change step and the optimal delay time;

updating the delay time according to the delay time and the updated change step length;

inputting the updated delay time into an inverter based on a Si/SiC hybrid switch to calculate the efficiency of the inverter, and defining the efficiency as an adaptive value;

if the adaptive value is smaller than the adaptive value corresponding to the optimal delay time, updating the optimal delay time by using the delay time;

if the iteration time ite is less than the set maximum iteration time, the method returns to the step of updating the change step length according to the delay time, the change step length and the optimal delay time, wherein the ite is equal to the ite + 1;

and if the iteration time ite is equal to the set maximum iteration time, outputting the optimal delay time.

Optionally, the formula for updating the change step size is as follows:

Figure BDA0002532646700000021

wherein v isij(ite) represents the step size of the change, vij(ite +1) represents the change step size after update, xij(ite) represents the delay time, fminRepresenting the minimum frequency value, fmaxRepresenting the maximum frequency value, rand1Represents [0, 1 ]]The random number within the interval is a random number,

Figure BDA0002532646700000022

representing said optimal delay time, xij(ite)=(xi1(ite),xi2(ite),...,xin(ite)), vij(ite)=(vi1(ite),vi2(ite),...,vin(ite)), i 1,2, N, i denotes the number of delay times, j denotes the dimension of the delay time, and N denotes the maximum dimension of the delay time.

Optionally, the updating the delay time specifically includes: if rand2≤liThen xij(ite+1)=xij(ite)+vij(ite +1), otherwise, xij(ite+1)=xij(ite)+rand3Ai;xij(ite +1) represents the delay time after update, rand2And rand3Represents [0, 1 ]]Random number within a range,/iLocal search rate, A, representing delay timeiRepresenting the average magnitude of the delay time.

Optionally, the adaptation value is expressed as:

wherein, PaDCDenotes the average power on the DC side, PaACRepresenting the average power on the AC side; u shapedcRepresenting the voltage on the DC sideAnd IacRepresents the direct side current; u shapeDenotes the output voltage, U, in the alpha stationary frameRepresents the output voltage under a beta static coordinate system; i isDenotes the output current in the alpha stationary frame, IRepresents the output current in the beta static coordinate system; t isoThe operation time of the inverter when the average power within the set range is obtained is shown, and t represents time.

The invention also provides an optimization system based on the Si/SiC hybrid switch, which comprises:

the initialization module is used for initializing delay time, the change step length of the delay time, the optimal delay time and the iteration number ite, wherein the delay time is the delay time based on the on or off of the Si/SiC hybrid switch;

a change step updating module, configured to update the change step according to the delay time, the change step, and the optimal delay time;

the delay time updating module is used for updating the delay time according to the delay time and the updated change step length;

an adaptive value defining module, configured to input the updated delay time into an inverter based on a Si/SiC hybrid switch to calculate efficiency of the inverter, and define the efficiency as an adaptive value;

the optimal delay time updating module is used for updating the optimal delay time by using the delay time if the adaptive value is smaller than the adaptive value corresponding to the optimal delay time;

a return execution module, configured to execute the "change step update module" when the iteration time ite is less than the set maximum iteration time, and the ite is "ite + 1";

and the optimal delay time output module is used for outputting the optimal delay time when the iteration time ite is equal to the set maximum iteration time.

Optionally, the formula for updating the change step size is as follows:

Figure BDA0002532646700000031

wherein v isij(ite) represents the step size of the change, vij(ite +1) represents the change step size after update, xij(ite) represents the delay time, fminRepresenting the minimum frequency value, fmaxRepresenting the maximum frequency value, rand1Represents [0, 1 ]]The random number within the interval is a random number,

Figure BDA0002532646700000032

representing said optimal delay time, xij(ite)=(xi1(ite),xi2(ite),...,xin(ite)), vij(ite)=(vi1(ite),vi2(ite),...,vin(ite)), i 1,2, N, i denotes the number of delay times, j denotes the dimension of the delay time, and N denotes the maximum dimension of the delay time.

Optionally, the updating the delay time specifically includes: if rand2≤liThen xij(ite+1)=xij(ite)+vij(ite +1), otherwise, xij(ite+1)=xij(ite)+rand3Ai;xij(ite +1) represents the delay time after update, rand2And rand3Represents [0, 1 ]]Random number within a range,/iLocal search rate, A, representing delay timeiRepresenting the average magnitude of the delay time.

Optionally, the adaptation value is expressed as:

wherein, PaDCDenotes the average power on the DC side, PaACRepresenting the average power on the AC side; u shapedcRepresents the DC side voltage and IacRepresents the direct side current; u shapeDenotes the output voltage, U, in the alpha stationary frameRepresents the output voltage under a beta static coordinate system; i isDenotes the output current in the alpha stationary frame, IRepresents the output current in the beta static coordinate system; t isoIndicating inverter when average power within set range is obtainedT denotes time.

According to the specific embodiment provided by the invention, the invention discloses the following technical effects:

the method inputs the updated delay time into the inverter based on the Si/SiC hybrid switch to calculate the efficiency of the inverter, defines the efficiency as an adaptive value, and judges whether to update the optimal delay time based on the Si/SiC hybrid switch according to the adaptive value, thereby realizing the optimization of the adaptive efficiency based on the Si/SiC hybrid switch and reducing the total loss based on the Si/SiC hybrid switch.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.

FIG. 1 is a schematic flow chart of an optimization method based on a Si/SiC hybrid switch according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of a logic structure of a single-phase inverter based on a Si/SiC hybrid switch according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of the position encoding of bats algorithm particles according to the embodiment of the present invention;

FIG. 4 is a schematic diagram of a real-time optimization according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of an optimization system based on a Si/SiC hybrid switch according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The invention aims to provide an optimization method and an optimization system based on a Si/SiC hybrid switch, which can reduce the total loss of the Si/SiC hybrid switch by adjusting the internal delay time of the Si/SiC hybrid switch.

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.

The optimization method is a self-adaptive efficiency optimization method, and the internal delay time of the Si/SiC hybrid switch is optimized in real time by adopting a cluster intelligent algorithm to achieve the purpose of reducing loss. The embodiment takes the 'Bat (BA) algorithm' in the cluster intelligent algorithm as an example for explanation.

Fig. 1 is a schematic flow chart of an optimization method based on a Si/SiC hybrid switch of the present invention, as shown in fig. 1, the method includes:

step 101: initializing delay time, a change step length of the delay time, optimal delay time and iteration time ite, wherein the delay time is the delay time based on the on or off of the Si/SiC hybrid switch.

Step 102: and updating the change step according to the delay time, the change step and the optimal delay time.

Step 103: and updating the delay time according to the delay time and the updated change step length.

Step 104: inputting the updated delay time into an inverter based on a Si/SiC hybrid switch to calculate the efficiency of the inverter, and defining the efficiency as an adaptive value.

Step 105: and judging whether the adaptive value is smaller than the adaptive value corresponding to the optimal delay time, if so, executing the step 106. If not, go to step 107.

Step 106: and updating the optimal delay time by using the delay time.

Step 107: judging whether the iteration time ite is smaller than the set maximum iteration time, if so, executing a step 108, and then returning to the step 102; if not, go to step 109.

Step 108: ite + 1.

Step 109: and judging whether the iteration time ite is equal to the set maximum iteration time, if so, executing a step 110, and if not, executing a step 108.

Step 110: and outputting the optimal delay time.

In step 102, the formula for updating the change step length is:

wherein v isij(ite) represents the step size of the change, vij(ite +1) represents the change step size after update, xij(ite) represents the delay time, fminRepresenting the minimum frequency value, fmaxRepresenting the maximum frequency value, rand1Represents [0, 1 ]]The random number within the interval is a random number,representing said optimal delay time, xij(ite)=(xi1(ite),xi2(ite),...,xin(ite)),vij(ite)=(vi1(ite),vi2(ite),...,vin(ite)), i 1,2, N, i denotes the number of delay times, j denotes the dimension of the delay time, and N denotes the maximum dimension of the delay time.

Wherein, updating the delay time in step 103 specifically includes: if rand2≤liThen xij(ite+1)=xij(ite)+vij(ite +1), otherwise, xij(ite+1)=xij(ite)+rand3Ai;xij(ite +1) represents the delay time after update, rand2And rand3Represents [0, 1 ]]Random number within a range,/iLocal search rate, A, representing delay timeiRepresenting the average magnitude of the delay time.

Wherein, the calculation function of the adaptive value in step 104 is:

wherein, PaDCDenotes the average power on the DC side, PaACRepresents the average power on the AC side, UdcRepresents the DC side voltage and IacRepresenting the direct side current, UDenotes the output voltage, U, in the alpha stationary frameDenotes the output voltage in the stationary frame of beta, IDenotes the output current in the alpha stationary frame, IDenotes the output current, T, in the beta stationary frameoThe operation time of the inverter when the average power within the set range is obtained is shown, and t represents time.

Step 104 specifically includes inputting the delay time into the SPWM modulation strategy, and outputting a driving signal (V) for driving the Si/SiC hybrid switch through the SPWM modulation strategyGSFor SiC MOSFET drive signal, VGEIs a SiIGBT drive signal) and operates the single-phase inverter to obtain its input/output voltage and input/output current signals, and then calculates the corresponding adaptation value in conjunction with the calculation function of the adaptation value. And performing global updating and local updating of the delay time according to the adaptive value, wherein the global updating comprises: if F (ite +1) < F (ite)&(rand<Ai) Then xij(ite+1)=xij(ite +1), F (ite +1) ═ F (ite +1), otherwise xij(ite+1)=xij(ite), F (ite +1) ═ F (ite). The local update includes: if F (ite +1) < Fmin(ite) then

Figure BDA0002532646700000071

Fmin(ite+1)=Fmin(ite +1), otherwiseFmin(ite+1)=Fmin(ite). Wherein F (ite) represents an adaptation value corresponding to a single delay time, Fmin(ite) represents an adaptation value corresponding to the optimal delay time, and rand represents a random number.

The Si/SiC mixed switch is formed by connecting a large-capacity SiIGBT and a small-capacity SiMOSFET in parallel. The embodiment takes a single-phase full-bridge inverter based on Si/SiC hybrid switch as a main factorBy way of background, a real-time optimization model was established which relied on a Si/SiC hybrid switch-based optimization method of the present invention, as shown in FIG. 2, including a DC source UdcThe single-phase full-bridge inversion system comprises a single-phase full-bridge inversion topology based on a Si/SiC hybrid switch, an LC low-pass filter, a load R and a BA algorithm. The single-phase full-bridge inversion topology can convert direct current into alternating current with different frequencies; the LC low-pass filter mainly filters out higher harmonics in the output voltage and current.

As shown in fig. 3, a drive signal (where V) for driving a Si/SiC hybrid switchGSFor SiCMOS MOSFET drive signal, VGEIs the SiIGBT drive signal). The switching mode of the SicMOSFET switching on and off is generally adopted to realize the minimum switching loss of the hybrid switch, which means that an internal delay time (switching-on delay time is t) exists between the SicMOSFET and the Si IGBTon_dTurn-off delay time of toff_d) And the total loss of the Si/SiC hybrid switch can be changed by adjusting the internal delay time. Will turn on for a time delay (t)on_d) Set to 0, optimize only the turn-off delay time (t)off_d). The delay time of the initialization comprises n dimensions toff_dThe initialized change step includes n-dimension toff_dThe change of (c) is "ite" 0. The optimization method is a bat algorithm, and mainly depends on a particle (delay time) group of the bat algorithm to carry out optimization, wherein the speed (change step length of the delay time) and the position (delay time) of a single particle in the particle group respectively represent the delay time and the change step length of n times of changes in a quarter of a modulation period. Due to the symmetry of the current, the delay time of the region can be copied to expand the whole period by optimizing the delay time within one fourth of the current period; the delay time is changed n times, and the particle needs n dimensions to realize optimization. As shown in fig. 4, the abscissa of fig. 4 is time, the ordinate is current, the delay time only needs to be optimized in one-fourth period, and the rest periods are assigned by symmetrical characteristics, toff_d0,toff_d1,toff_d2,toff_d3Respectively representing four different delay times in a quarter period, and each delay time is optimized by 4 dimensions.

The invention adjusts the internal delay time of the Si/SiC hybrid switch in real time by adopting the BA algorithm to realize the low-loss operation of the Si/SiC hybrid switch, thereby further improving the efficiency of the single-phase inverter.

Fig. 5 is a schematic structural diagram of an optimized system based on a Si/SiC hybrid switch, as shown in the figure, the system includes:

an initialization module 201, configured to initialize a delay time, a change step of the delay time, an optimal delay time, and an iteration time ite, where the delay time is a delay time based on turning on or off of a Si/SiC hybrid switch;

a change step updating module 202, configured to update the change step according to the delay time, the change step, and the optimal delay time;

the formula for updating the change step length is as follows:

Figure BDA0002532646700000081

wherein v isij(ite) represents the step size of the change, vij(ite +1) represents the change step size after update, xij(ite) represents the delay time, fminRepresenting the minimum frequency value, fmaxRepresenting the maximum frequency value, rand1Represents [0, 1 ]]The random number within the interval is a random number,representing said optimal delay time, xij(ite)=(xi1(ite),xi2(ite),...,xin(ite)), vij(ite)=(vi1(ite),vi2(ite),...,vin(ite)), i 1,2, N, i denotes the number of delay times, j denotes the dimension of the delay time, and N denotes the maximum dimension of the delay time.

A delay time updating module 203, configured to update the delay time according to the delay time and the updated change step;

the updating the delay time specifically includes: if rand2≤liThen xij(ite+1)=xij(ite)+vij(ite +1), otherwise,xij(ite+1)=xij(ite)+rand3Ai;xij(ite +1) represents the delay time after update, rand2And rand3Represents [0, 1 ]]Random number within a range,/iLocal search rate, A, representing delay timeiRepresenting the average magnitude of the delay time.

And an adaptive value calculating module 204, configured to input the updated delay time into the Si/SiC hybrid switch-based inverter to calculate efficiency of the inverter, and define the efficiency as an adaptive value.

The fitness function is represented as:

Figure BDA0002532646700000083

wherein, PaDCDenotes the average power on the DC side, PaACRepresenting the average power on the AC side; u shapedcRepresents the DC side voltage and IacRepresents the direct side current; u shapeDenotes the output voltage, U, in the alpha stationary frameRepresents the output voltage under a beta static coordinate system; i isDenotes the output current in the alpha stationary frame, IRepresents the output current in the beta static coordinate system; t isoThe operation time of the inverter when the average power within the set range is obtained is shown, and t represents time. The fitness function is used to evaluate t at the current iterationoff_dAnd (4) performance.

An optimal delay time updating module 205, configured to update the optimal delay time with the delay time if the adaptation value is smaller than the adaptation value corresponding to the optimal delay time.

A determining module 206, configured to, when the iteration time ite is less than the set maximum iteration time, return to the change step updating module 202 when the iteration time ite is equal to ite + 1.

And the optimal delay time output module 207 is configured to output the optimal delay time when the iteration time ite is equal to the set maximum iteration time.

The method inputs the updated delay time into the inverter based on the Si/SiC hybrid switch to calculate the efficiency of the inverter, defines the efficiency as an adaptive value, judges whether to update the optimal delay time based on the Si/SiC hybrid switch according to the adaptive value, and adjusts the internal delay time of the Si/SiC hybrid switch, thereby realizing the optimization of the adaptive efficiency based on the Si/SiC hybrid switch and reducing the total loss based on the Si/SiC hybrid switch.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to assist in understanding the core concepts of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.

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