阅读说明：本技术 电子设备壳体及其制作方法和电子设备 (Electronic equipment shell, manufacturing method thereof and electronic equipment ) 是由 陈益明 于 2020-07-15 设计创作，主要内容包括：本申请提供了电子设备壳体及其制作方法和电子设备。该电子设备壳体包括：基材层；第一PU底漆层,所述第一PU底漆层设置在所述基材层的一个表面上；第二PU底漆层,所述第二PU底漆层设置在所述第一PU底漆层远离所述基材层的表面上；抛光层,所述抛光层设置在所述第二PU底漆层远离所述第一PU底漆层的表面上；UV面漆层,所述UV面漆层设置在所述抛光层远离所述第二PU底漆层的表面上；和光学镀膜层,所述光学镀膜层设置在所述UV面漆层远离所述抛光层的表面上。该电子设备壳体成本低、良率高、产能高,易于工业化生产,且可以实现高光泽度和高反射率的陶瓷外观效果。(The application provides an electronic equipment shell, a manufacturing method thereof and electronic equipment. The electronic device case includes: a substrate layer; a first PU primer layer disposed on one surface of the substrate layer; a second PU primer layer disposed on a surface of the first PU primer layer distal from the substrate layer; a polishing layer disposed on a surface of the second PU primer layer distal from the first PU primer layer; the UV finishing paint layer is arranged on the surface, away from the second PU primer layer, of the polishing layer; and the optical coating layer is arranged on the surface of the UV finishing paint layer far away from the polishing layer. The electronic equipment shell is low in cost, high in yield, high in capacity and easy for industrial production, and can achieve the ceramic appearance effect with high glossiness and high reflectivity.)

1. An electronic device housing, comprising:

a substrate layer;

A first PU primer layer disposed on one surface of the substrate layer;

a second PU primer layer disposed on a surface of the first PU primer layer distal from the substrate layer;

a polishing layer disposed on a surface of the second PU primer layer distal from the first PU primer layer;

the UV finishing paint layer is arranged on the surface, away from the second PU primer layer, of the polishing layer; and

and the optical coating layer is arranged on the surface of the UV finish paint layer far away from the polishing layer.

2. The electronic device casing of claim 1, wherein the material forming the optical coating layer comprises at least one of titanium oxide, silicon oxide, niobium oxide, and zirconium oxide,

optionally, the optical coating layer comprises:

the first plating layer is arranged on the surface, away from the polishing layer, of the UV finishing paint layer;

the second plating layer is arranged on the surface, away from the UV finishing paint layer, of the first plating layer; and

a third plating layer disposed on a surface of the second plating layer distal from the first plating layer,

Optionally, the optical coating layer satisfies any one of the following:

(1) the first plating layer is formed by zirconium oxide, the second plating layer is formed by titanium oxide, and the third plating layer is formed by silicon oxide;

(2) the first plating layer is formed by silicon oxide, the second plating layer is formed by titanium oxide, and the third plating layer is formed by silicon oxide;

(3) the first plating layer is formed by silicon oxide, the second plating layer is formed by niobium oxide, and the third plating layer is formed by silicon oxide;

(4) the first plating layer is formed from zirconium oxide, the second plating layer is formed from niobium oxide, and the third plating layer is formed from silicon oxide.

3. The electronic equipment enclosure of claim 2, wherein the thickness of the second plating layer is 60% to 70% of the total thickness of the optical coating layer.

4. The electronic device casing of claim 1, wherein the first PU primer layer has a Lab value of (10-40, -2.5), the second PU primer layer has a Lab value of (10-40, -2.5), and the polishing layer has a Lab value of (10-40, -2.5).

5. The electronic device enclosure of claim 1, wherein at least one of the following conditions is satisfied:

the thickness of the optical coating layer is 40 nm-300 nm;

the thickness of the UV finish paint layer is 20-30 μm;

the thickness of the polishing layer is 15-20 μm;

the surface roughness Ra of the polishing layer is 0.08-0.2 μm;

the thickness of the first PU primer layer is 10-15 mu m;

the thickness of the second PU primer layer is 10-15 mu m;

the surface glossiness of the electronic equipment shell is 180 Gu-200 Gu;

the reflectivity of the outer surface of the electronic equipment shell is 14% -19%;

the Lab value of the electronic equipment shell is (10-40, -2.5).

6. The electronic device housing of claim 1, further comprising:

a primer layer disposed between the substrate layer and the first PU primer layer.

7. The electronic device housing of claim 1, further comprising:

the anti-fingerprint layer is arranged on the surface, far away from the UV finish paint layer, of the optical coating layer.

8. A method of making the electronic device case of any of claims 1-7, comprising:

Forming a first PU primer layer on one surface of the substrate layer;

forming a second PU primer layer on the surface of the first PU primer layer far away from the substrate layer;

forming a polishing layer on a surface of the second PU primer layer distal from the first PU primer layer;

forming a UV finish layer on the surface of the polishing layer away from the second PU primer layer;

and forming an optical coating layer on the surface of the UV finishing paint layer far away from the polishing layer so as to obtain the electronic equipment shell.

9. The method of claim 8, further comprising at least one of the following steps prior to forming the first PU primer layer on one surface of the substrate layer:

polishing the surface of the substrate layer;

and passivating the surface of the substrate layer.

10. The method of claim 8, wherein the polishing layer is prepared by:

forming a third PU primer layer on a surface of the second PU primer layer distal from the first PU primer layer;

and polishing the surface of the third PU primer layer far away from the second PU primer layer to obtain the polishing layer.

11. The method of claim 8, wherein the processes of forming the first PU primer layer, the second PU primer layer, the polishing layer, and the UV topcoat layer each independently comprise a spray coating process.

12. The method of claim 8, wherein forming the optical coating comprises a vapor deposition technique,

optionally, the vapor deposition technique is a physical vapor deposition technique.

13. The method of claim 8, further comprising at least one of:

forming an undercoat layer on one surface of the substrate layer before forming the first PU primer layer;

and forming an anti-fingerprint layer on the surface of the optical coating layer far away from the UV finish paint layer.

14. An electronic device, comprising:

the electronic equipment enclosure of any one of claims 1-7, having a receiving space therein; and

the display screen is arranged in the accommodating space, and the light emitting surface of the display screen faces to one side far away from the electronic equipment shell.

Technical Field

The present application relates to the field of electronic device technologies, and in particular, to an electronic device housing, a manufacturing method thereof, and an electronic device.

Background

In the related art, the electronic device housing with the ceramic appearance effect is usually manufactured by a ceramic dry pressing sintering polishing technology or a ceramic powder spraying polishing technology. However, the ceramic powder used in the above two processes is expensive, and the yield of the processes is low and the productivity is low.

Thus, the existing manufacturing process of the electronic device housing still needs to be improved.

Disclosure of Invention

In one aspect of the present application, an electronic device housing is provided. The electronic device case includes: a substrate layer; a first PU primer layer disposed on one surface of the substrate layer; a second PU primer layer disposed on a surface of the first PU primer layer distal from the substrate layer; a polishing layer disposed on a surface of the second PU primer layer distal from the first PU primer layer; the UV finishing paint layer is arranged on the surface, away from the second PU primer layer, of the polishing layer; and the optical coating layer is arranged on the surface of the UV finishing paint layer far away from the polishing layer. The electronic equipment shell is low in cost, high in yield, high in capacity and easy for industrial production, and can achieve the ceramic appearance effect with high glossiness and high reflectivity.

In another aspect of the present application, a method of making the electronic device housing described above is provided. The method comprises the following steps: forming a first PU primer layer on one surface of the substrate layer; forming a second PU primer layer on the surface of the first PU primer layer far away from the substrate layer; forming a polishing layer on a surface of the second PU primer layer distal from the first PU primer layer; forming a UV finish layer on the surface of the polishing layer away from the second PU primer layer; and forming an optical coating layer on the surface of the UV finishing paint layer far away from the polishing layer so as to obtain the electronic equipment shell. The method is simple and convenient to operate, easy to realize and easy for industrial production, and the electronic equipment shell can be effectively manufactured.

In yet another aspect of the present application, an electronic device is provided. The electronic device includes: the electronic device housing as described above, the electronic device housing having an accommodating space therein; and the display screen is arranged in the accommodating space, and the light emergent surface of the display screen faces to one side far away from the electronic equipment shell. The electronic equipment has the advantages of low cost, high yield, high capacity and easy industrial production, can realize the ceramic appearance effect with high glossiness and high reflectivity, has all the characteristics and advantages of the electronic equipment shell, and is not repeated.

Drawings

Fig. 1 shows a schematic cross-sectional structure of an electronic device housing according to an embodiment of the present application.

Fig. 2 is a schematic cross-sectional view of an electronic device housing according to another embodiment of the present application.

Fig. 3 is a schematic cross-sectional view of an electronic device housing according to another embodiment of the present application.

Fig. 4 is a schematic cross-sectional view of an electronic device housing according to still another embodiment of the present application.

Fig. 5 shows a flow chart of a method for manufacturing an electronic device housing according to an embodiment of the present application.

Fig. 6a, 6b, 6c, 6d and 6e are schematic flow charts illustrating a method for manufacturing an electronic device housing according to another embodiment of the present application.

Fig. 7 is a flow chart illustrating a method for manufacturing an electronic device housing according to another embodiment of the present application.

Fig. 8 is a flow chart illustrating a method for manufacturing an electronic device housing according to still another embodiment of the present application.

FIG. 9 is a schematic flow chart illustrating the steps of forming a polishing layer according to one embodiment of the present disclosure.

Fig. 10 is a flow chart illustrating a method for manufacturing an electronic device housing according to still another embodiment of the present application.

Fig. 11 is a flow chart illustrating a method for manufacturing an electronic device housing according to still another embodiment of the present application.

Reference numerals:

10: electronic device case 100: substrate layer 200: first PU primer layer 300: second PU primer layer 400: polishing layer 500: UV topcoat layer 600: optical coating layer 610: first plating layer 620: second plating layer 630: third plating layer 700: primer layer 800: anti-fingerprint layer

Detailed Description

In one aspect of the present application, an electronic device housing is provided. With reference to fig. 1, it can be understood that the electronic device housing 10 includes: a substrate layer 100; a first PU primer layer 200 (in the description of the present application, it is to be noted that the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated, therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of such features, and will not be repeated hereinafter), the first PU primer layer 200 being disposed on one surface of the substrate layer 100; a second PU primer layer 300, the second PU primer layer 300 disposed on a surface of the first PU primer layer 200 away from the substrate layer 100; a polishing layer 400, the polishing layer 400 disposed on a surface of the second PU primer layer 300 that is distal from the first PU primer layer 200; a UV topcoat layer 500, the UV topcoat layer 500 being disposed on a surface of the polishing layer 400 distal from the second PU primer layer 300; and the optical coating layer 600 is arranged on the surface of the UV finishing paint layer 500 far away from the polishing layer 400, and the optical coating layer 600 is arranged on the surface of the UV finishing paint layer 500 far away from the polishing layer 400. The electronic device shell 10 has low cost, high yield and high capacity, is easy for industrial production, and can realize the ceramic appearance effect with high glossiness and high reflectivity by integrating the layer structures.

It is understood that the material of the substrate layer 100 may include at least one of a metal material or a plastic. In some specific examples of the present application, the material of the substrate layer 100 may be only a metal material, or may also be only a plastic material, or may be formed by a laminated structure of a metal material and a plastic material, and the materials of various substrate layers may be suitable for the electronic device housing 10 in the present application, and the application range is wide, and the commercial prospect is good. In addition, the thickness of the substrate layer 100 can be flexibly selected by those skilled in the art according to actual needs, and will not be described in detail herein.

It is understood that the first PU primer layer 200 may be a colored paint containing a color paste to further realize a multi-colored ceramic appearance effect through the first PU primer layer 200 having a predetermined color; the thickness of the first PU primer layer 200 may be 10 to 15 μm, and in some specific examples of the present application, the thickness of the first PU primer layer 200 may be 10, 11, 12, 13, 14, or 15 μm, etc. Therefore, the electronic device housing 10 can have a better color, and the bonding force between other film layers and the substrate layer 100 can be increased.

It is understood that the second PU primer layer 300 may also be colored paint containing color paste to further realize the ceramic appearance effect of various colors through the second PU primer layer 300 with predetermined colors; the thickness of the second PU primer layer 300 may also be 10 to 15 μm, and in some specific examples herein, the thickness of the second PU primer layer 300 may be 10, 11, 12, 13, 14, or 15 μm, etc. Therefore, the electronic device shell 10 can have a better color; in addition, the second PU primer layer 300 may further include a certain amount of a polishing agent, and in some examples of the present application, the content of the polishing agent may be 10% to 20% by mass, specifically, 10%, 12%, 14%, 16%, 18%, 20%, or the like, based on the total mass of the material forming the second PU primer layer 300, so that the surface thereof may be relatively flat, and thus the surface of the electronic device housing 10 may be relatively flat.

It is understood that the material forming the polishing layer 400 can also be colored paint, which contains color paste to further realize the ceramic appearance effect of multiple colors through the polishing layer 400 with predetermined colors; the thickness of the polishing layer 400 may be 15 μm to 20 μm, and in some specific examples of the application, the thickness of the polishing layer 400 may be 15 μm, 16 μm, 17 μm, 18 μm, 19 μm, 20 μm, or the like. Therefore, the electronic device shell 10 can have a better color; in addition, it is understood that the surface roughness Ra of the polishing layer 400 may be 0.08 μm to 0.2 μm, specifically, 0.08 μm, 0.1 μm, or 0.2 μm or the like, and thus the surface thereof is highly smooth, and further, the surface roughness of the polishing layer may be obtained by adding a polishing agent to the material forming the polishing layer 400 at the time of fabrication and then polishing the same, and, specifically, in some examples of the present application, the polishing agent may be present in an amount of 20 to 30% by mass, specifically, may be 20%, 22%, 24%, 26%, 28%, 30%, etc., so that the surface glossiness thereof can be made high, further, the surface flatness of the electronic device case 10 is high, and the ceramic appearance effect of high glossiness and high reflectivity is further realized.

Further, it is understood that, since the first PU primer layer 200, the second PU primer layer 300 and the polishing layer 400 may be colored, in order to achieve a better ceramic appearance effect having a predetermined color, the Lab value of the first PU primer layer 200 may be (10-40, -2.5) (specifically, (10, -0.9, 1.0)), the Lab value of the second PU primer layer 300 may be (10-40, -2.5) (specifically, (16, 0.9, -1.2)), and the Lab value of the polishing layer 400 may be (10-40, -2.5, -2.5) (specifically, (21, -0.3, 0.5)). Therefore, the color effect of the ceramic appearance can be matched well.

It is understood that the UV top coat layer 500 has high gloss and high gloss appearance effect, and has high surface transparency, smooth and smooth appearance, and better abrasion resistance, and in some examples of the present application, the thickness of the UV top coat layer may be 20 μm to 30 μm, specifically, 20 μm, 22 μm, 24 μm, 26 μm, 28 μm, or 30 μm, etc., so as to further improve the gloss and reflectivity of the electronic device housing 10, thereby achieving better ceramic appearance effect.

It is understood that the material forming the optical coating layer 600 may include at least one of titanium oxide, silicon oxide, niobium oxide and zirconium oxide, and in a specific example of the present application, with reference to fig. 2, the optical coating layer may further include: a first plating layer 610, the first plating layer 610 being disposed on a surface of the UV topcoat layer 500 away from the polishing layer 400; a second plating layer 620, the second plating layer 620 being disposed on a surface of the first plating layer 610 remote from the UV topcoat layer 500; and a third plated layer 630, wherein the third plated layer 630 is disposed on a surface of the second plated layer 620 away from the first plated layer 610. Therefore, the optical coating layer 600 can achieve a better glittering and translucent ceramic appearance texture, so that the electronic device housing 10 can better achieve a ceramic appearance effect with high glossiness and high reflectivity.

Further, after intensive investigation and a great deal of experimental verification, the applicant finds that, when the optical coating layer satisfies any one of the following requirements, the optical coating layer has better transmission effect on light compared with other types of optical coating layers, so that the glossiness of the electronic device case 10 can be significantly improved, the color of the electronic device case 10 can be brighter, and the texture of the appearance effect of the ceramic achieved is better, so that the competitiveness of the electronic device case 10 product can be significantly improved, and the commercial prospect is good: (1) the first plating layer 610 is formed of zirconium oxide, the second plating layer 620 is formed of titanium oxide, and the third plating layer 630 is formed of silicon oxide; (2) the first plating layer 610 is formed of silicon oxide, the second plating layer 620 is formed of titanium oxide, and the third plating layer 630 is formed of silicon oxide; (3) the first plating layer 610 is formed of silicon oxide, the second plating layer 620 is formed of niobium oxide, and the third plating layer 630 is formed of silicon oxide; (4) the first plating layer 610 is formed of zirconium oxide, the second plating layer 620 is formed of niobium oxide, and the third plating layer 630 is formed of silicon oxide.

Further, when the thickness of the second plating layer 620 is 60% to 70% of the total thickness of the optical coating layer, specifically, 60%, 62%, 64%, 66%, 68% or 70%, a more excellent ceramic appearance effect can be achieved, thereby further improving product competitiveness.

In addition, it is understood that the thickness of the optical coating layer 600 may be 40nm to 300nm, specifically, in some examples of the present application, it may be 40nm, 80nm, 100nm, 120nm, 150nm, 200nm, 220nm, 250nm, or 300nm, and the specific thickness thereof may be adjusted according to the appearance requirement of the electronic device housing 10, and will not be described in detail herein.

In addition, with reference to fig. 3, it is understood that, in other examples of the present application, the electronic device housing 10 may further include: the primer layer 700 is disposed between the substrate layer 100 and the first PU primer layer 200, and a material forming the primer layer 700 may specifically be a PU treatment agent, and a thickness of the PU treatment agent may be 5 μm to 8 μm, specifically 5 μm, 6 μm, 7 μm, or 8 μm, and the like, so that a bonding force between the other film layers and the substrate layer 100 is high, and a service life of the electronic device housing 10 is long.

With reference to fig. 4, it is understood that, in further examples of the present application, the electronic device housing 10 may further include: the anti-fingerprint layer 800 is arranged on the surface, far away from the UV top coat layer 500, of the optical coating layer, and the anti-fingerprint layer 800 is arranged on the surface, far away from the UV top coat layer 500, of the optical coating layer. Specifically, the material forming the fingerprint-resistant layer 800 may be fluorosilane, and the thickness thereof may be 3nm to 10nm, specifically, the thickness may be 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, or 10nm, and the like, so that the fingerprint-resistant hydrophobic effect may be better achieved.

In combination with the foregoing, the electronic device case 10 of the present application can achieve a ceramic appearance effect of high glossiness and high reflectivity, specifically, the surface glossiness of the electronic device case may be 180Gu to 200Gu, specifically, 180Gu, 185Gu, or 200Gu, etc.; the reflectivity of the outer surface of the electronic device shell can be 14% -19%, specifically 14%, 17%, 19% or the like; the Lab value of the electronic device case may be (10 to 40, -2.5 to 2.5), and specifically may be (20, 0.9, -2.5).

In another aspect of the present application, a method of making the electronic device housing described above is provided. With reference to fig. 5 and fig. 6a, 6b, 6c, 6d, 6e, the method may specifically comprise the following steps:

S100: a first PU primer layer 200 is formed on one surface of the substrate layer 100 (the structural schematic refers to fig. 6 a).

It is understood that a specific process of forming the first PU primer layer 200 on one surface of the substrate layer 100 may be a spray coating process, a baking temperature in the spray coating process may be 60 to 100 ℃, specifically, 60, 70, 80, 90, or 100 ℃, and the like, and a spray coating time may be 20 to 40min, specifically, 20, 30, or 40min, and the like. Therefore, the operation is simple and convenient, the realization is easy, the industrial production is easy, and the first PU primer layer 200 can be effectively manufactured.

S200: a second PU primer layer 300 is formed on the surface of the first PU primer layer 200 away from the substrate layer 100 (the structural schematic diagram refers to fig. 6 b).

It is understood that a specific process of forming the second PU primer layer 300 on the surface of the first PU primer layer 200 away from the substrate layer 100 may be a spray coating process, a baking temperature in the spray coating process may be 60 ℃ to 100 ℃, specifically, 60 ℃, 70 ℃, 80 ℃, 90 ℃, or 100 ℃, and the like, and a spray coating time may be 20min to 40min, specifically, 20min, 30min, or 40min, and the like. Therefore, the operation is simple and convenient, the realization is easy, the industrial production is easy, and the second PU primer layer 300 can be effectively manufactured.

S300: a polishing layer 400 is formed on the surface of the second PU primer layer 300 away from the first PU primer layer 200 (see fig. 6c for a schematic structural diagram).

In particular, with reference to FIG. 9, in one particular example of the present application, it is understood that the polishing layer can be made by:

s310: forming a third PU primer layer on a surface of the second PU primer layer distal from the first PU primer layer.

It is understood that the specific process of forming the third PU primer layer on the surface of the second PU primer layer away from the first PU primer layer may be a spray coating process, the baking temperature in the spray coating process may be 60 ℃ to 100 ℃, specifically, 60 ℃, 70 ℃, 80 ℃, 90 ℃ or 100 ℃ or the like, and the spray coating time may be 20min to 40min, specifically, 20min, 30min or 40min or the like. Therefore, the operation is simple and convenient, the realization is easy, the industrial production is easy, and the third PU primer layer can be effectively prepared.

S320: and polishing the surface of the third PU primer layer far away from the second PU primer layer to obtain the polishing layer.

It is understood that the specific process conditions and parameters of the polishing process may be flexibly selected by those skilled in the art according to actual needs, in some examples of the present application, a polishing agent may be added to the material forming the third PU primer layer and then subjected to the polishing process, specifically, in some examples of the present application, the polishing agent may be included in an amount of 20% to 30% by mass, specifically, 20%, 22%, 24%, 26%, 28%, or 30% by mass, based on the total mass of the material, so that the surface gloss of the manufactured polishing layer may be relatively high.

S400: a UV topcoat layer 500 is formed on the surface of the polishing layer 400 away from the second PU primer layer 300 (see fig. 6d for a schematic structural diagram).

It is understood that a specific process of forming the UV topcoat layer 500 on the surface of the polishing layer 400 away from the second PU primer layer 300 may be a spray coating process, a baking temperature in the spray coating process may be 60 to 100 ℃, specifically, 60, 70, 80, 90, or 100 ℃, and the like, and a spray coating time may be 20 to 40min, specifically, 20, 30, or 40min, and the like; in addition, when the UV top coat layer 500 is formed, the UV top coat layer is cured and formed by ultraviolet light irradiation, and the energy of the ultraviolet light may be 1000mj/cm²～1200mj/cm²In particular, the amount of the solvent to be used,may be 1000mj/cm²、1100mj/cm²Or 1200mj/cm²And the like. Therefore, the operation is simple and convenient, the realization is easy, the industrial production is easy, and the UV finish paint layer 500 can be effectively manufactured.

S500: an optical coating layer 600 is formed on the surface of the UV topcoat layer 500 away from the polishing layer 400, so as to obtain the electronic device housing 10 (the structural schematic diagram refers to fig. 6 e).

It is understood that the process of forming the optical coating layer 600 on the surface of the UV topcoat layer 500 away from the polishing layer 400 includes a vapor deposition technique, which may be a physical vapor deposition technique in some specific examples of the present application, and the temperature may be 40 ℃ to 60 ℃, specifically, 40 ℃, 50 ℃ or 60 ℃ or the like when the physical vapor deposition is performed. Therefore, the operation is simple and convenient, the realization is easy, the industrial production is easy, the optical coating layer 600 can be effectively manufactured, the cost is low, and the yield is high.

Further, in other examples of the present application, with reference to fig. 7, before forming the first PU primer layer on one surface of the substrate layer, the method may further include the steps of:

s600: and polishing the surface of the substrate layer.

It is understood that the specific process conditions and parameters of the polishing process can be flexibly selected by those skilled in the art according to actual needs, and will not be described in detail herein. Therefore, the flatness of the surface of the substrate layer is high, the flatness of the subsequently formed film layer is also high, and the method is simple and convenient to operate, easy to realize and easy to realize in industrial production.

Still further, in still other examples of the present application, with reference to fig. 8, before forming the first PU primer layer on one surface of the substrate layer, the method may further include the steps of:

s700: and passivating the surface of the substrate layer.

It is understood that specific process conditions and parameters of the passivation treatment can be flexibly selected by those skilled in the art according to actual needs, and will not be described in detail herein. Therefore, the surface of the base material layer is provided with a certain microporous structure, the binding force with the base material layer is higher when a film layer is formed subsequently, and the method is simple and convenient to operate, easy to realize and easy for industrial production.

Additionally, still further, in still other examples of the present application, with reference to fig. 10, before forming the first PU primer layer on one surface of the substrate layer, the method may further include the steps of:

s800: before the first PU primer layer is formed, an undercoat layer 700 is formed on one surface of the substrate layer 100 (the structural schematic diagram refers to fig. 3).

It is to be understood that a specific process of forming the primer layer 700 on one surface of the substrate layer may be a spray coating process, a baking temperature in the spray coating process may be 100 to 120 ℃, specifically, 100, 105, 110, 115, or 120 ℃, and the like, and a spray coating time may be 20 to 40min, specifically, 20, 30, or 40min, and the like. Therefore, the operation is simple and convenient, the realization is easy, the industrial production is easy, and the primer layer 700 can be effectively prepared.

Additionally, still further, in still other examples of the present application, with reference to fig. 11, the method may further include the steps of:

s900: an anti-fingerprint layer 800 is formed on the surface of the optical coating layer far away from the UV top coat layer 500 (the structural schematic diagram refers to FIG. 4).

It is understood that the specific process of forming the anti-fingerprint layer 800 on the surface of the optical coating layer away from the UV topcoat layer 500 may be evaporation, and the evaporation temperature may be 40 ℃ to 60 ℃, specifically, 40 ℃, 50 ℃ or 60 ℃, and the like. Therefore, the operation is simple and convenient, the realization is easy, the industrial production is easy, and the anti-fingerprint layer 800 can be effectively manufactured.

In yet another aspect of the present application, an electronic device is provided. The electronic device includes: the electronic device housing as described above, the electronic device housing having an accommodating space therein; and the display screen is arranged in the accommodating space, and the light emergent surface of the display screen faces to one side far away from the electronic equipment shell. The electronic equipment has the advantages of low cost, high yield, high capacity and easy industrial production, can realize the ceramic appearance effect with high glossiness and high reflectivity, has all the characteristics and advantages of the electronic equipment shell, and is not repeated.

It will be appreciated that the electronic device may include other conventional electronic device structures and components in addition to those described above, and will not be described in any greater detail herein.

It is understood that the electronic device may include, but is not limited to, a mobile phone, a tablet computer, a game machine, a smart watch, etc., and will not be described in detail herein. Therefore, the application range is wide.

Embodiments of the present application are described in detail below. The following description of the embodiments is merely exemplary in nature and is in no way intended to limit the present disclosure. The examples, where specific techniques or conditions are not indicated, are to be construed according to the techniques or conditions described in the literature in the art or according to the product specifications. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products commercially available.