阅读说明：本技术 一种跨导电容可配置N-path带通滤波器 (N-path band-pass filter with configurable transconductance capacitor ) 是由 高志强 李腾飞 于 2020-06-18 设计创作，主要内容包括：本发明公开了一种跨导电容可配置N-path带通滤波器,所述滤波器包括N-path带通滤波器、四相位时钟源、Gm-C低通滤波器和数字控制信号接口,其中：N-path带通滤波器的输入端为跨接电容组；带通滤波通道N-path1和N-path2连接跨接电容组的同相输出端口；四相位时钟源的时钟输出连接至N-path带通滤波器；跨导Gm-C低通滤波器连接N-path带通滤波器的差分输出端口；数字控制信号接口连接至跨接电容组、N-path带通滤波器、可配置跨导Gm-C低通滤波器。该滤波器避免了现有技术中N-path滤波器的通带带宽不足、线性度不佳、谐波失真大、带内纹波大的特点,在实现宽范围中心频率调谐的基础上,实现通带带宽可调、带内纹波可调的功能。(The invention discloses an N-path band-pass filter with a configurable transconductance capacitor, which comprises an N-path band-pass filter, a four-phase clock source, a Gm-C low-pass filter and a digital control signal interface, wherein: the input end of the N-path band-pass filter is a cross-over capacitor group; the band-pass filtering channels N-path1 and N-path2 are connected with the non-inverting output port of the cross-connected capacitor bank; the clock output of the four-phase clock source is connected to the N-path band-pass filter; the transconductance Gm-C low-pass filter is connected with a differential output port of the N-path band-pass filter; the digital control signal interface is connected to the cross-over capacitor bank, the N-path band-pass filter and the configurable transconductance Gm-C low-pass filter. The filter avoids the characteristics of insufficient passband bandwidth, poor linearity, large harmonic distortion and large in-band ripple of an N-path filter in the prior art, and realizes the functions of adjustable passband bandwidth and adjustable in-band ripple on the basis of realizing wide-range center frequency tuning.)

1. A transconductance capacitance configurable N-path band-pass filter, characterized in that the filter comprises an N-path band-pass filter, a four-phase clock source, a Gm-C low-pass filter and a digital control signal interface, wherein:

the input end of the N-path band-pass filter is a cross-over capacitor bank and is used for passband ripple regulation and gain regulation;

the N-path band-pass filter comprises two different N-path filtering channels, namely a band-pass filtering channel N-path1 and a band-pass filtering channel N-path2, wherein the band-pass filtering channel N-path1 and the band-pass filtering channel N-path2 are input in phase and output in difference;

the band-pass filtering channel N-path1 is connected with the in-phase output port of the cross-connected capacitor bank to perform band-pass filtering on the input signal, and the center frequency of the band-pass filtering channel is f_lo+Δf，f_loIs the filter passband center frequency, and Δ f is the center frequency offset;

the band-pass filtering channel N-path2 is connected with the in-phase output port of the cross-connected capacitor bank to perform band-pass filtering on the input signal, and the center frequency of the band-pass filtering channel is f_lo-Δf；

The clock output of the four-phase clock source is connected to the N-path band-pass filter, the four-phase clock source generates a four-phase non-overlapping clock signal with variable frequency as a switch control signal in the N-path band-pass filter, and the center frequency of a pass band is adjusted;

the transconductance Gm-C low-pass filter is connected with a differential output port of the N-path band-pass filter and is used for low-pass filtering an input signal so as to eliminate odd harmonics;

the digital control signal interface is connected to the cross-over capacitor bank, the N-path band-pass filter and the configurable transconductance Gm-C low-pass filter and provides a digital control signal.

2. The configurable transconductance-capacitance N-path band-pass filter of claim 1, wherein said crossover capacitor bank comprises N crossover capacitors that are freely switchable by switches, N ≧ 2.

3. The N-path bandpass filter of claim 2, wherein the crossover capacitor is configured to be connected to the N-path bandpass filterContaining 6 MIM capacitors C₀、C₁、C₂、C₃、C₄、C₅The lower plates of all capacitors are connected to input terminal V_I，C₁、C₂、C₃、C₄、C₅Across which the digital signals S1-, S2-, S3-, S4-, S5-controlled switches, respectively, are connected, and an MIM capacitor C₀And C₁、C₂、C₃、C₄、C₅Are connected to the output terminal V directly and via switches controlled by digital signals S1, S2, S3, S4, S5, respectively_O。

4. A transconductance capacitance configurable N-path band-pass filter according to claim 1 or 2, characterized in that the lower plate of said cross-over capacitance group is connected to a signal input terminal, and the upper plate is connected to the band-pass filtering path N-path1 and the band-pass filtering path N-path2 in a cross-over manner through digital signal controlled switches, respectively.

5. The transconductance capacitance-configurable N-path band-pass filter of claim 1, wherein in the band-pass filtering path N-path1, an input in-phase signal is connected to a node A of four adjustable pass-band capacitors through switches controlled by P1, P2, P3 and P4_p、B_p、C_p、D_pAnd the output end V is connected to the switch controlled by P1, P2, P3 and P4_op(ii) a Node A_pIs connected to a configurable transconductance cell G_m1Positive input terminal of and configurable transconductance cell G_m2Negative output terminal of, node B_pIs connected to a configurable transconductance cell G_m1And a configurable transconductance cell G_m2Positive output terminal of, node C_pIs connected to a configurable transconductance cell G_m1And a configurable transconductance cell G_m2Negative input of, node D_pIs connected to a configurable transconductance cell G_m1And a configurable transconductance cell G_m2The positive input end of (a);

in the band-pass filtering channel N-path2, an input in-phase signal is connected to four adjustable pass-band capacitors through switches controlled by P1, P2, P3 and P4On the node A_n、B_n、C_n、D_nAnd the output end V is connected to the switch controlled by P1, P2, P3 and P4_op(ii) a Node A_nIs connected to a configurable transconductance cell G_m3Positive input terminal of and configurable transconductance cell G_m4Negative output terminal of, node B_nIs connected to a configurable transconductance cell G_m3And a configurable transconductance cell G_m4Positive output terminal of, node C_nIs connected to a configurable transconductance cell G_m3And a configurable transconductance cell G_m4Negative input of, node D_nIs connected to a configurable transconductance cell G_m3Positive output terminal of and configurable transconductance cell G_m4To the negative input terminal of (1).

6. The transconductance capacitance-configurable N-path bandpass filter of claim 5, wherein the configurable transconductance cell G is configured as_m1、G_m2、G_m3And G_m4Has dual input/output ports, the IN + port is connected to the PMOS transistor M_p1、M_p2、M_p3And NMOS transistor M_n1、M_n2、M_n3Is connected to the PMOS transistor M at the IN-port_p4、M_p5、M_p6And NMOS transistor M_n4、M_n5、M_n6The IN + port of the grid passes through a degeneration resistor R_FConnected to the negative output port OUT-IN port through a negative feedback resistor R_FCross-connected to the positive output port OUT +; PMOS tube M_p1、M_p2、M_p3、M_p4、M_p5、M_p6Is connected to a power supply port VDD, and an NMOS tube M_n1、M_n2、M_n3、M_n4、M_n5、M_n6Is connected to the power supply port VSS, PMOS M_p1、M_p6Is connected to the OUT-, OUT + output port, NMOS M_n1、M_n6The drains of which are connected to the OUT-, OUT + output ports, respectively; PMOS tube M_p2、M_p3The drain electrode of the PMOS transistor M is controlled by EN 1-and EN 2-respectively_p7、M_p8Is connected to a negative output port OUT-, a PMOS tube M_p4、M_p5The drain electrode of the PMOS transistor M is controlled by EN 2-and EN 1-respectively_p9、M_p10Is connected to the positive output port OUT +, an NMOS tube M_n2、M_n3The drain electrode of the NMOS transistor M is controlled by EN1 and EN2 respectively_n7、M_n8Is connected to the negative output port OUT-, an NMOS tube M_n4、M_n5The drain electrode of the NMOS transistor M is controlled by EN2 and EN1 respectively_n9、M_n10Connected to the positive output port OUT +, wherein EN 1-and EN 2-are the EN1 and EN2 inverted signals.

7. The N-path bandpass filter according to claim 1, wherein the four-phase clock source comprises two D-latches connected end-to-end to form a four-phase clock generating circuit, and the four-phase clock generating circuit comprises two D-latches: dlatch1 and Dlatch2, D latch Structure, CK performs Enable control, D and D_nInput clock signals, Q and D to the port_nThe port latches, wherein: the Q terminal of Dlatch1 is connected to the D terminal of Dlatch2 and outputs P_1SThe Q of Dlatch2 is connected to D of Dlatch1_nEnd and output P_2SSignal, Q of Dlatch1_nD terminating Dlatch2_nEnd and output P_3SSignal, Q of Dlatch2_nThe D end of the Dlatch1 is terminated and P is output_4SA signal; the clock control signal of Dlatch1 is clk, the clock control signal of Dlatch2 is clkn, and the two are inverse signals; p_1SSignal, P_2SSignal, P_3SSignal, P_4SThe signal passes through a buffer to output a final four-phase non-overlapping clock P₁、P₂、P₃、P₄。

8. The transconductance capacitance-configurable N-path bandpass filter of claim 7, wherein the Dlatch1 and Dlatch2 comprise PMOS transistor M_p1、M_p2And NMOS transistor M_n1、M_n2、M_n3、M_n4. PMOS tube M_p1、M_p2Has a gate connected to a clock input terminal CK and a source connected to a power supply port VDD, M_p1Is connected to the data output port Q_nTerminal, M_p2Drain electrode ofTo a data output port Q, Q_nThe port is also connected to an NMOS tube M_n1、M_n2And M_n3The Q port is also connected to an NMOS tube M_n3、M_n4And M_n2Grid of (1), NMOS tube M_n1、M_n2、M_n3、M_n4Is connected to the power supply port VSS.

9. A transconductance capacitance configurable N-path band pass filter according to claim 1, characterized in that said transconductance Gm-C low pass filter is a configurable transconductance capacitance filter.

10. The N-path bandpass filter according to claim 1, wherein the digital control signal interface comprises a 2-4 decoder for gating 4 control modules with a 2-bit signal: cs _ ctr, Cbb _ ctr, Gm _ ctr and Cbpf _ ctr respectively correspond to an input capacitor bank, an adjustable channel capacitor bank, an adjustable transconductance module and an adjustable load capacitor bank of a transconductance Gm-C low-pass filter of the N-path band-pass filter.

Technical Field

The invention belongs to the technical field of electronic information, relates to a band-pass filter applied to a radio frequency wireless transceiver, and particularly relates to an N-path band-pass filter applied to a radio frequency front end and configurable based on transconductance capacitors.

Background

At present, communication systems and integrated circuits are rapidly developed, and electronic devices of the communication systems are required to have the characteristics of rapid and continuous tuning, integration, reconfiguration, multiple functions and the like, so that the design requirements of the existing multimode multi-frequency transceiver are developed towards the directions of low power consumption, full integration, multiple functions and small chip size. As an indispensable part of the transceiver, the front-end filter can play a role in filtering out interference signals to improve the overall performance of the transceiver, so that the research on the tuning and integration of the radio frequency front-end filter has important significance.

The N-path band-pass filter is formed by combining N single-channel filter units with the same characteristics in parallel, each single channel is composed of a switch capacitor and is driven by an additional clock generator, a large amount of area consumption is avoided, and the N-path band-pass filter has advantages in the aspects of quality factors, linearity, tunability, dynamic range and the like.

Disclosure of Invention

The invention aims to provide an N-path band-pass filter with a configurable transconductance capacitor, which avoids the characteristics of insufficient passband bandwidth, poor linearity, large harmonic distortion and large in-band ripple of the N-path filter in the prior art, and realizes the functions of adjustable passband bandwidth and adjustable in-band ripple on the basis of realizing wide-range center frequency tuning.

The purpose of the invention is realized by the following technical scheme:

a transconductance capacitance configurable N-path band-pass filter comprises an N-path band-pass filter, a four-phase clock source, a Gm-C low-pass filter and a digital control signal interface, wherein:

the input end of the N-path band-pass filter is a cross-over capacitor bank and is used for passband ripple regulation and gain regulation;

the bridging capacitor group comprises N groups (N is more than or equal to 2) of bridging capacitors which can be freely gated through a switch;

the N-path band-pass filter comprises two different N-path filtering channels, namely a band-pass filtering channel N-path1 and a band-pass filtering channel N-path2, wherein the band-pass filtering channel N-path1 and the band-pass filtering channel N-path2 are input in phase and output in difference;

the band passThe filter channel N-path1 is connected with the non-inverting output port of the cross-connected capacitor group to perform band-pass filtering on the input signal, and the center frequency of the filter channel is f due to the frequency shifting effect of the transconductance module_lo+Δf，f_loIs the filter passband center frequency, and Δ f is the center frequency offset;

the band-pass filtering channel N-path2 is connected with the in-phase output port of the cross-connected capacitor bank to perform band-pass filtering on the input signal, and the center frequency of the band-pass filtering channel is f due to the frequency shifting effect of the transconductance module_lo-Δf；

The clock output of the four-phase clock source is connected to the N-path band-pass filter, the four-phase clock source generates a four-phase non-overlapping clock signal with variable frequency as a switch control signal in the N-path band-pass filter, and the center frequency of a pass band is adjusted;

the transconductance Gm-C low-pass filter is a configurable transconductance capacitance filter, is connected with a differential output port of the N-path band-pass filter and is used for low-pass filtering an input signal so as to eliminate odd harmonics;

the digital control signal interface is connected to the cross-over capacitor bank, the N-path band-pass filter and the configurable transconductance Gm-C low-pass filter and provides a digital control signal.

Compared with the prior art, the invention has the following advantages:

1. adding an input cross-over capacitor group to adjust the pass band gain and the pass band ripple of the filter; adding two N-path band-pass filtering channels, generating a reverse phase frequency shifting effect through a transconductance module, increasing the passband bandwidth for the output difference, and eliminating even harmonics; the function of adjusting the passband bandwidth within the range can be realized by adding the adjustable transconductance unit and the 5-bit adjustable channel capacitor bank.

2. The four-phase clock source adopts two D latches which are connected end to form a four-phase clock generating circuit, so that the central frequency f is to be realized_loOnly 2f is needed to be input in the filtering performance of_loInstead of the conventional 4f clock signal_loThus, the requirement for the quality of the high-frequency clock source can be obviously reduced.

3. An adjustable Gm-C low-pass filter is added at the differential output end of the N-path band-pass filtering channel, the load capacitance is changed through digital signals to adjust the cut-off frequency of the low-pass filter, and the band-pass signals of the N-path filter are filtered to inhibit odd harmonics and improve the out-of-band rejection ratio.

4. The invention can increase the passband bandwidth of the filter, has adjustable bandwidth, can better eliminate or inhibit harmonic influence, improves the circuit linearity and reduces the chip area.

Drawings

FIG. 1 is a schematic diagram of a configurable N-path bandpass filter according to the present invention;

FIG. 2 is a schematic diagram of an input cross-over capacitor bank and two N-path bandpass filter channel circuits according to the present invention;

FIG. 3 illustrates an adjustable transconductance unit in the N-path filtering path of the present invention;

FIG. 4 illustrates an adjustable channel capacitor bank in the N-path filtering channel of the present invention;

FIG. 5 is a four-phase clock source circuit of the present invention;

FIG. 6 is a diagram of the adjustable load capacitor bank in the adjustable Gm-C low pass filter of the present invention;

FIG. 7 is a digital control signal interface circuit of the present invention;

FIG. 8 is a frequency tunable range curve of the configurable N-path bandpass filter of the present invention;

FIG. 9 is a diagram illustrating the adjustment range curves of the passband bandwidth of the configurable N-path bandpass filter at 100MHz and 1GHz, respectively;

FIG. 10 is a frequency modulation curve of an adjustable Gm-C low pass filter of a configurable N-path bandpass filter according to the present invention;

FIG. 11 is a comparison of the spectra before and after the configurable N-path bandpass filter of the present invention is added to the tunable Gm-C low pass filter.

Detailed Description

The technical solution of the present invention is further described below with reference to the accompanying drawings, but not limited thereto, and any modification or equivalent replacement of the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention shall be covered by the protection scope of the present invention.

The invention provides an N-path band-pass filter with a configurable transconductance capacitor, as shown in FIG. 1, the filter comprises an N-path band-pass filter 1, a Gm-C low-pass filter 3, a four-phase clock source 2 and a digital control signal interface 4, wherein:

the clock output of the four-phase clock source 2 is connected to the N-path band-pass filter 1;

the N-path band-pass filter 1 comprises two N-path filtering channels, namely a band-pass filtering channel N-path1 and a band-pass filtering channel N-path2, the center frequency of a pass band is adjusted through a four-phase sampling pulse sequence with variable frequency generated by a four-phase clock source 2, and meanwhile, the center frequency of the filter is enabled to shift to different directions through a configurable transconductance module;

the N-path band-pass filter 1 is single-ended input, the input end is a cross-over capacitor set, and the input end is connected with the input capacitor C_sThe signals are converted into in-phase signals which are connected to a band-pass filtering channel N-path1 and a band-pass filtering channel N-path2 in a crossing mode, and the signals after filtering are output in a differential mode;

the two paths of the N-path band-pass filter 1 input in-phase signals, output differential signals and are connected to a configurable Gm-C low-pass filter 3;

a first output end of the digital control signal interface 4 is connected to the N-path band-pass filter 1;

a second output of the digital control signal interface 4 is connected to the tunable Gm-C low pass filter 3.

The working principle is as follows:

the input signal passes through the cross-over capacitor bank to output an in-phase signal into the bandpass filter path N-path1 and the bandpass filter path N-path 2. Meanwhile, a four-phase clock source 2 provides 4-phase 25% duty cycle clocks as control signals for the switches in the N-path filter 1 at a clock frequency f_loIn the meantime, the N-path band-pass filter 1 performs band-pass filtering on the input signal, and the center frequency is f due to the frequency shifting effect provided by the transconductance module_loThe- Δ f, N-path band-pass filter 1 performs band-pass filtering on the input signal, whose center frequency is f due to the frequency shifting effect provided by the transconductance module_lo+ delta f, frequency domain superposition of two path signals to increase by taking difference between the two signalsPlus the passband bandwidth. The differential output does not contain even harmonic distortion, but odd harmonic distortion is serious, so that an adjustable Gm-C low-pass filter 3 is added at the rear stage of the N-path band-pass filter 1 to inhibit odd harmonics and improve the out-of-band rejection ratio. Finally, the writing of the control signal is realized through the digital signal interface 4.

The N-path band pass filter, the four-phase clock source, the Gm-C low pass filter, and the digital signal control interface circuit of the present invention will be described separately below.

As shown in FIG. 2, the input terminal of the N-path band-pass filter is connected to four sets of configurable cross-over capacitors C_s、C_s1pAnd C_s1n、C_s2pAnd C_s2n、C_s3And the method is used for passband ripple regulation and gain regulation. The lower polar plate of the capacitor group is connected to a signal input end, the upper polar plate is respectively connected to the band-pass filtering channel N-path1 and the band-pass filtering channel N-path2 in a bridging mode through a switch controlled by a digital signal, and the specific group number and the size of the capacitor can be configured according to actual conditions. The capacitor bank is freely gated by switches, the purpose of which is to separate the input signal and provide isolation between the paths using relatively high series capacitance impedances in the input paths, which distributes the input voltage to both paths while making the interaction between the two paths as small as possible. In addition, due to the fact that the asymmetry of the circuit, namely the gain of a P-end channel is inconsistent with the gain of an N-end channel, the asymmetry of the passband of the filter can be caused during frequency synthesis, and then the ripple coefficient of the passband can be reduced by adjusting the input capacitors on the two paths, so that the gain of the passband of the filter can be adjusted.

As shown in fig. 2, the cross-over capacitor bank connects two different N-path filter paths, a band-pass filter path N-path1 and a band-pass filter path N-path2, which have non-inverting inputs and differential outputs, wherein:

for the band-pass filtering channel N-path1, an input in-phase signal is connected to the node A of four adjustable pass-band capacitors through switches controlled by P1, P2, P3 and P4_p、B_p、C_p、D_pAnd the output end V is connected to the switch controlled by P1, P2, P3 and P4_op. Four nodes of which are connected to two adjustable transconductance units G_mTool for measuringBody-to-ground, node A_pIs connected to a configurable transconductance cell G_m1Positive input terminal of and G_m2Negative output terminal of, node B_pIs connected to a configurable transconductance cell G_m1And a configurable transconductance cell G_m2Positive output terminal of, node C_pIs connected to a configurable transconductance cell G_m1And a configurable transconductance cell G_m2Negative input of, node D_pIs connected to a configurable transconductance cell G_m1And a configurable transconductance cell G_m2To the positive input end of the switch.

For the band-pass filtering channel N-path2, an input in-phase signal is connected to the node A of four adjustable pass-band capacitors through switches controlled by P1, P2, P3 and P4_n、B_n、C_n、D_nAnd the output end V is connected to the switch controlled by P1, P2, P3 and P4_op. Four nodes of which are connected to two adjustable transconductance units G_mSpecifically, node A_nIs connected to a configurable transconductance cell G_m3Positive input terminal of and configurable transconductance cell G_m4Negative output terminal of, node B_nIs connected to a configurable transconductance cell G_m3And a configurable transconductance cell G_m4Positive output terminal of, node C_nIs connected to a configurable transconductance cell G_m3And a configurable transconductance cell G_m4Negative input of, node D_nIs connected to a configurable transconductance cell G_m3Positive output terminal of and configurable transconductance cell G_m4To the negative input terminal of (1). The circuit passes through a configurable transconductance G_mThe unit shifts the center frequency of the N-path bandpass filter with respect to the clock frequency. The configurable transconductance Gm unit is respectively connected with a baseband node of an N-path band-pass filter with capacitive baseband admittance in a clockwise or counterclockwise direction, and the center frequency of the N-path band-pass filter can be changed into f_lo+g_m/(2πC_BB) Or f_lo-g_m/(2πC_BB). The output function of the N-path bandpass filter can be expressed as:

wherein R is_x＝R_s+R_w，R_sIs the power supply impedance, R_wIs a switching impedance, C_BBIs the channel capacitance, G_mIs the value of transconductance, ω_loThe center frequency of the filter passband, so the overall transfer function T(s) is T₁(s)-T₂The expression of(s) is:

wherein, ω is_c1＝ω_lo+G_m/C_BB，ω_c2＝ω_lo-G_m/C_BBIt can be found that the transfer function of the N-path band-pass filter and the configurable transconductance unit G_mAnd channel capacitor C_BBClosely related, i.e. configurable transconductance cell G_mThe value determines the passband shape of the N-path bandpass filter, while the channel capacitor C_BBThe value of (d) determines the bandwidth of the N-path bandpass filter. The N-path band-pass filter needs to realize adjustable passband bandwidth, so the method of variable transconductance value and variable channel capacitance is adopted to adjust the center frequency and the passband bandwidth of the N-path band-pass filter.

As shown IN FIG. 3, the configurable transconductance unit has two input and output ports, and the IN + port is connected to the PMOS transistor M_p1、M_p2、M_p3And NMOS transistor M_n1、M_n2、M_n3Is connected to the PMOS transistor M at the IN-port_p4、M_p5、M_p6And NMOS transistor M_n4、M_n5、M_n6The IN + port of the grid passes through a degeneration resistor R_FConnected to the negative output port OUT-IN port through a negative feedback resistor R_FCross-connected to the positive output port OUT +; PMOS tube M_p1、M_p2、M_p3、M_p4、M_p5、M_p6Is connected to a power supply port VDD, and an NMOS tube M_n1、M_n2、M_n3、M_n4、M_n5、M_n6Is connected to the source ofPower supply port VSS, PMOS M_p1、M_p6Is connected to the OUT-, OUT + output port, NMOS M_n1、M_n6The drains of which are connected to the OUT-, OUT + output ports, respectively; PMOS tube M_p2、M_p3The drain electrode of the PMOS transistor M is controlled by EN 1-and EN 2-respectively_p7、M_p8Is connected to a negative output port OUT-, a PMOS tube M_p4、M_p5The drain electrode of the PMOS transistor M is controlled by EN 2-and EN 1-respectively_p9、M_p10Is connected to the positive output port OUT +, an NMOS tube M_n2、M_n3The drain electrode of the NMOS transistor M is controlled by EN1 and EN2 respectively_n7、M_n8Is connected to the negative output port OUT-, an NMOS tube M_n4、M_n5The drain electrode of the NMOS transistor M is controlled by EN2 and EN1 respectively_n9、M_n10Connected to the positive output port OUT +, wherein EN 1-and EN 2-are the EN1 and EN2 inverted signals.

In order to further explain the configurable channel capacitors, 8 configurable channel capacitors are selected in the N-path band-pass filter, and the pass band bandwidth is adjusted by controlling the size of the capacitor connected into the path through a digital signal. As shown in FIG. 4, each tunable passband capacitor comprises 6 MIM capacitors C₀、C₁、C₂、C₃、C₄、C₅The lower plates of all capacitors are connected to input terminal V_I，C₁、C₂、C₃、C₄、C₅Across which the digital signals S1-, S2-, S3-, S4-, S5-controlled switches, respectively, are connected, and an MIM capacitor C₀And C₁、C₂、C₃、C₄、C₅Are connected to the output terminal V directly and via switches controlled by digital signals S1, S2, S3, S4, S5, respectively_O. Wherein, S1-, S2-, S3-, S4-and S5-are inverse signals of S1, S2, S3, S4 and S5.

In the invention, for the variable transconductance, a simple inverter can be used as a basic transconductance to meet the requirement of a high frequency domain, negative feedback resistors are added at an input end and an inverted output end to stabilize common-mode voltage, two groups of MOS tubes with controllable switches are added, and the corresponding MOS tubes are gated by a switch control signal and connected in parallel to the inverter to increase the width-to-length ratio of the MOS tubes so as to increase the transconductance value. For the adjustable passband capacitor, a 5-bit control signal is adopted to provide 32 control gears such as 00000-11111 for bandwidth control.

As shown in FIG. 8, the frequency modulation range of the center frequency covers 100 MHz-1 GHz, the filter gain is about-1 dB to 0dB, the pass band ripple is less than 0.5dB, and the out-of-band rejection is-40 dB. Further, bandwidth adjustment simulation is performed at 100MHz and 1GHz respectively, as shown in fig. 9, the bandwidth adjustable range is 20 MHz-60 MHz, the group of data is only an example of the present invention, and the group of structures can achieve performance requirements of different systems through adjustment of circuit parameters.

As shown in fig. 5, the four-phase clock source may adopt two D latches connected end to form a four-phase clock generating circuit, which includes two D latches: dlatch1 and Dlatch2, D latch Structure, CK performs Enable control, D and D_nInput clock signals, Q and D to the port_nThe port latches. Wherein Q of Dlatch1 is connected to D of Dlatch2 and outputs P_1SThe Q of Dlatch2 is connected to D of Dlatch1_nEnd and output P_2SSignal, Q of Dlatch1_nD terminating Dlatch2_nEnd and output P_3SSignal, Q of Dlatch2_nThe D end of the Dlatch1 is terminated and P is output_4SThe clock control signal for Dlatch1 is clk, the clock control signal for Dlatch2 is clkn, and the two are inverted signals. For D latches Dlatch1 and Dlatch2, they contain PMOS transistor M_p1、M_p2And NMOS transistor M_n1、M_n2、M_n3、M_n4. PMOS tube M_p1、M_p2Has a gate connected to a clock input terminal CK and a source connected to a power supply port VDD, M_p1Is connected to the data output port Q_nTerminal, M_p2Is connected to the Q end of the data output port Q_nThe port is also connected to an NMOS tube M_n1、M_n2And M_n3The Q port is also connected to an NMOS tube M_n3、M_n4And M_n2Grid of (1), NMOS tube M_n1、M_n2、M_n3、M_n4Is connected to the power supply port VSS. Clock signal P output by latch_1S、P_2S、P_3S、P_4SOutputting the final four-phase non-overlapping clock P through the buffer₁、P₂、P₃、P₄. Unlike the traditional cascade of D flip-flops, the circuit can also operate on the falling edge of the clock, so that the center frequency f is to be realized_loOnly 2f is needed to be input in the filtering performance of_oInstead of the conventional 4f clock signal_loThus, the requirement for the quality of the high-frequency clock source can be obviously reduced.

In the present invention, a configurable transconductance Gm-C low pass filter is used to suppress harmonics and significantly reduce the out-of-band rejection ratio of the filter. The configurable transconductance Gm-C low-pass filter can be designed by adopting a cascade biquadratic configurable transconductance Gm-C low-pass filter, and the cut-off frequency of the transconductance-capacitance filter is generally in direct proportion to transconductance and in inverse proportion to load capacitance.

In the invention, the configurable Gm-C low-pass filter adopts five-position adjustable load capacitors to adjust the cut-off frequency of the filter, and vi and vo pass through a basic load capacitor C₀And C₁Connected together and indirectly grounded. In addition, there are five sets of capacitors C₂And C₃、C₄And C₅、C₆And C₇、C₈And C₉、C₁₀And C₁₁And the input end and the output end of the circuit are respectively connected through five groups of switches.

In the invention, in order to realize the design that the cut-off frequency of the filter can be adjusted, the transconductance value is not changed, so that the cut-off frequency is adjusted by adjusting the load capacitor, as an embodiment of the invention, a five-bit adjustable capacitor array with 32 levels can be set, as shown in fig. 6, the load capacitance value is controlled to be accessed through the on and off of the MOS switch, and the adjustment in the required frequency range is realized. FIG. 10 is a frequency modulation curve of a tunable Gm-C low-pass filter in the configurable N-path band-pass filter, wherein the cut-off frequency can be continuously adjusted from 100MHz to 1 GHz. FIG. 11 is a graph of 500MHz, the spectral response of the circuit before and after the addition of the fourth-order Gm-C low-pass filter of the configurable N-path band-pass filter of the present invention, in the analysis of odd harmonics, the third harmonic rejection ratio before the addition is-21 dB due to the higher third harmonic component, and the harmonic rejection ratio becomes-52.5 dB after the addition of the low-pass filter.

In the invention, in order to realize a plurality of configurable control signals such as adjustable filter center frequency, adjustable passband bandwidth, adjustable passband gain and the like, a digital signal control module based on a latch is designed to realize the proposed configurable function (control signal writing) of the filter. As shown in fig. 7, the digital control signal interface includes a 2-4 decoder for gating 4 control modules by a 2-bit signal: cs _ ctr, Cbb _ ctr, Gm _ ctr and Cbpf _ ctr respectively correspond to an input capacitor bank of the N-path BPF, an adjustable channel capacitor bank, an adjustable transconductance module and an adjustable load capacitor bank of the Gm-C LPF, and the four modules have the same input. The module multiplexes 17 ports of 4 groups into 5 ports, selects a write-in group by using a 2-4 decoder, and adds an enabling port and a reset port, thereby greatly saving the area of a chip and reducing the number of ports.

In the invention, each control module is composed of a plurality of latches, when the module is selected, the latches can transfer input signals to the output of the latches and serve as control signals of corresponding circuits, wherein the logic of zero setting and resetting adopted by the latches is as follows:

S＝Sel*in*Rst_n+int*Rst；

R＝Sel*in_n*Rst_n+int_n*Rst；

wherein Sel is a strobe signal, int is an initial signal, in is an input signal, in _ n is an inverted signal of the input signal, Rst is a reset signal, and Rst _ n is an inverted signal of the reset signal, and when Rst _ n is high, the latch sets or clears an output signal according to the input signal, and stabilizes the output signal through the SR latch.

The embodiment shows that the invention can realize the functions of the band-pass filter with adjustable center frequency, adjustable passband bandwidth and adjustable passband gain, and provides a corresponding digital interface for convenient control, thereby meeting the requirements of multi-mode and multi-frequency and being used for a radio frequency front-end filter.