Simulation model test method based on conducted interference characteristics of power electronic transformer system

文档序号:1059530 发布日期:2020-10-13 浏览:6次 中文

阅读说明:本技术 基于电力电子变压器系统传导干扰特性仿真模型测试方法 (Simulation model test method based on conducted interference characteristics of power electronic transformer system ) 是由 康劲松 朱玺元 陈涛 梁玉 毛中亚 于 2020-06-18 设计创作,主要内容包括:本发明涉及一种基于电力电子变压器系统传导干扰特性仿真模型测试方法,包括以下步骤:建立系统整流级模型;采用双有源桥DC/DC变换器结构通过移相控制的方法建立系统隔离级模型;通过系统整流级模型和系统隔离级模型在仿真软件中构建运行仿真模型;考虑电力电子变压器系统中无源器件的高频模型,提取电路结构中的主要寄生参数,建立电力电子变压器系统传导干扰的高频仿真模型;在高频仿真模型中设置第一阻容支路和第二阻容支路测量传导干扰。与现有技术相比,本发明能够方便快捷地对包含两个及以上功率转换环节的PET系统进行传导干扰的仿真测试,同时也可以测试同一个系统内部不同的功率转换环节单独产生的传导干扰特性,且准确度高。(The invention relates to a simulation model test method based on the conducted interference characteristics of a power electronic transformer system, which comprises the following steps: establishing a system rectification level model; establishing a system isolation level model by adopting a double-active-bridge DC/DC converter structure through a phase-shifting control method; constructing an operation simulation model in simulation software through a system rectification level model and a system isolation level model; the method comprises the steps of taking a high-frequency model of a passive device in a power electronic transformer system into consideration, extracting main parasitic parameters in a circuit structure, and establishing a high-frequency simulation model of conducted interference of the power electronic transformer system; and arranging a first resistance-capacitance branch and a second resistance-capacitance branch in the high-frequency simulation model to measure conducted interference. Compared with the prior art, the method can conveniently and quickly carry out the simulation test of the conducted interference on the PET system comprising two or more power conversion links, and can also test the conducted interference characteristics independently generated by different power conversion links in the same system, and the accuracy is high.)

1. A simulation model test method based on conducted interference characteristics of a power electronic transformer system is characterized by comprising the following steps:

s1, establishing a system rectification stage model through a PWM rectifier type structure;

s2, establishing a system isolation level model by adopting a double-active-bridge DC/DC converter structure and simultaneously by a phase-shifting control method;

s3, constructing an operation simulation model of the whole power electronic transformer system in Saber simulation software through a system rectification model and a system isolation model, and performing simulation operation on the electronic transformer system;

s4, taking into account a high-frequency model of a passive device in the power electronic transformer system, extracting main parasitic parameters in a circuit structure, and establishing a high-frequency simulation model of the power electronic transformer system conducted interference in Saber simulation software;

and S5, setting the first resistance-capacitance branch and the second resistance-capacitance branch in the high-frequency simulation model to measure the conducted interference on the voltage input side and the conducted interference on the internal direct current side of the whole system.

2. The power electronic transformer system conducted interference characteristic simulation model testing method based on claim 1, wherein the first resistance-capacitance branch comprises a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2, two ends of the first resistor R1 are respectively connected with a voltage input side of the high-frequency simulation model and an input end of the rectifier stage, one end of a first resistor R1 is grounded through the first capacitor C1, the other end of the first resistor R1 is grounded through the second capacitor C2 and a second resistor R2, and a voltage at two ends of the second resistor R2 is conducted interference on the voltage input side of the whole system.

3. The method for testing the conducted interference characteristic simulation model based on the power electronic transformer system as claimed in claim 1, wherein the second rc branch comprises a third resistor R3 and a third capacitor C3, one end of the third capacitor C3 is connected to the rectifying stage and the isolating stage of the high-frequency simulation model, the other end of the third capacitor C3 is grounded through the third resistor R3, and the voltage across the third resistor R3 is the conducted interference on the dc side of the whole system.

4. The power electronic transformer system conducted interference characteristic-based simulation model test method according to claim 1, further comprising: and in the high-frequency simulation model, the ground capacitance of the midpoint of the isolation-stage bridge arm is 1/100 of the ground capacitance of the midpoint of the rectification-stage bridge arm, and the conducted interference on the whole voltage input side of the system measured by the first resistance-capacitance branch is the conducted interference generated by the rectification stage independently.

5. The power electronic transformer system conducted interference characteristic-based simulation model test method according to claim 1, further comprising: and in the high-frequency simulation model, the ground capacitance of the midpoint of the rectifier bridge arm is 1/100 of the ground capacitance of the midpoint of the isolation bridge arm, and the conducted interference on the direct current side in the whole system measured by the second resistance-capacitance branch is the conducted interference generated by the isolation stage independently.

6. The power electronic transformer system conducted interference characteristic-based simulation model test method according to claim 1, wherein the system rectification stage model expression is as follows:

Uxo=Udc×Sxi+uNox∈(a,b,c)

wherein L is a network side inductor, C is a direct current side capacitor, isa、isb、iscFor three-phase input current, UdcIs DC side voltage, R is equivalent loss resistance in the circuit, Uao、Ubo、UcoIs the midpoint potential of each bridge arm, Sai、Sbi、SciAs a switching function of the bridge arm switching tube, uNoIs neutral point potential, esa、esb、escFor three-phase input voltage, ioutTo output a current.

7. The power electronic transformer system conducted interference characteristic-based simulation model test method according to claim 1, wherein in step S4, the passive devices include resistors, capacitors, inductors and transformers.

8. The power electronic transformer system conducted interference characteristic-based simulation model test method according to claim 7, wherein in step S4, the main parasitic parameters include an inductance-capacitance parameter of the ac/dc bus and a parasitic capacitance parameter of a heat sink attached to the switching device to ground.

Technical Field

The invention relates to the field of power electronic transformer system simulation, in particular to a simulation model test method based on the conducted interference characteristics of a power electronic transformer system.

Background

In recent years, power electronic technology is rapidly developed, and more power electronic converters are applied to the field of power systems and distributed in various links of power generation, transmission and matching, so that the power systems face many new requirements and challenges. In contrast, the conventional industrial frequency Transformer is difficult to meet the requirement due to the disadvantage of single function, and the Power Electronic Transformer (PET) has been rapidly developed by virtue of its unique structure and excellent function, and has been widely accepted in academia and industry. As shown in fig. 1, is a PET-based rail transit drive system.

However, PET uses power electronic conversion technology to realize electric energy transmission, the system itself is used as a complex power conversion device, in order to realize flexibility of control and high efficiency of operation, a pulse width modulation mode is often adopted, rapid switching action of a semiconductor device in the modulation process can form transient voltage and current, the voltage and the current can be directly transmitted to a power grid through a main circuit, stray electric field coupling, stray magnetic field coupling and other modes, electromagnetic interference is generated on the PET itself and other devices connected in the power grid, and a series of negative effects are brought. Compared with the structure of the traditional power converter, the PET system comprises more than one power conversion link, and the conducted interference characteristics generated by different stages in the system are different, so the problem of conducted interference is more serious

Currently, most of the studies in academia and industry for PET are focused on system control, topology research, and the like, and technical studies on PET conducted interference are relatively lacking. However, the following problems mainly exist in the technical research on the PET conducted interference: 1. the existing simulation model only aims at a simpler single-stage power converter structure and lacks of the model establishment of relevant conducted interference on a more complex system like PET; 2. the simulation test method for conducted interference cannot be directly applied to the interference test of a multi-stage system, for example, the direct current side of a PET system is directly connected with a rectification stage and an isolation stage of the system, and if the conducted interference at the direct current side is desired, the conducted interference generated at one side is inevitably bypassed when an lisn (linear interference Stabilization network) is additionally used for measurement, so that the measurement result is not in accordance with reality.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provide a simulation model test method based on the conducted interference characteristics of a power electronic transformer system.

The purpose of the invention can be realized by the following technical scheme:

a simulation model test method based on conducted interference characteristics of a power electronic transformer system comprises the following steps:

s1, establishing a system rectification stage model through a PWM rectifier type structure;

s2, establishing a system isolation level model by adopting a double-active-bridge DC/DC converter structure and simultaneously by a phase-shifting control method;

s3, constructing an operation simulation model of the whole power electronic transformer system in Saber simulation software through a system rectification model and a system isolation model, and performing simulation operation on the electronic transformer system;

s4, taking into account a high-frequency model of a passive device in the power electronic transformer system, extracting main parasitic parameters in a circuit structure, and establishing a high-frequency simulation model of the power electronic transformer system conducted interference in Saber simulation software;

and S5, setting the first resistance-capacitance branch and the second resistance-capacitance branch in the high-frequency simulation model to measure the conducted interference on the voltage input side and the conducted interference on the internal direct current side of the whole system.

Further, the first resistance-capacitance branch comprises a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2, two ends of the first resistor R1 are respectively connected to the voltage input side of the high-frequency simulation model and the input end of the rectifier stage, one end of the first resistor R1 is grounded through the first capacitor C1, the other end of the first resistor R1 is grounded through the second capacitor C2 and the second resistor R2, and the voltage at two ends of the second resistor R2 is the conducted interference on the voltage input side of the whole system.

Further, the second rc branch includes a third resistor R3 and a third capacitor C3, one end of the third capacitor C3 is connected to the rectifying stage and the isolating stage of the high-frequency simulation model, the other end is grounded through the third resistor R3, and the voltage at the two ends of the third resistor R3 is the conducted interference at the dc side in the whole system.

Further, the test method further comprises: in the high-frequency simulation model, the ground capacitance of the midpoint of the isolation-stage bridge arm is 1/100 of the ground capacitance of the midpoint of the rectification-stage bridge arm, and the conducted interference of the whole system voltage input side measured by the first resistance-capacitance branch is the conducted interference generated by the rectification stage independently;

further, the test method further comprises: and in the high-frequency simulation model, the ground capacitance of the midpoint of the rectifier bridge arm is 1/100 of the ground capacitance of the midpoint of the isolation bridge arm, and the conducted interference on the direct current side in the whole system measured by the second resistance-capacitance branch is the conducted interference generated by the isolation stage independently.

Further, the system rectification stage model expression is as follows:

Figure BDA0002546284300000031

Uxo=Udc×Sxi+uNox∈(a,b,c)

wherein L is a network side inductor, C is a direct current side capacitor, isa、isb、iscFor three-phase input current, UdcIs DC side voltage, R is equivalent loss resistance in the circuit, Uao、Ubo、UcoIs the midpoint potential of each bridge arm, Sai、Sbi、SciAs a switching function of the bridge arm switching tube, uNoIs neutral point potential, esa、esb、escFor three-phase input voltage, ioutTo output a current.

Further, in step S4, the passive devices include resistors, capacitors, inductors, and transformers.

Further, in step S4, the main parasitic parameters include an inductance-capacitance parameter of the ac/dc bus, and a parasitic capacitance parameter of a heat sink attached to the switching device to ground.

Compared with the prior art, the invention has the following advantages:

1. the method realizes the establishment of the high-frequency simulation model of the conducted interference of the power electronic transformer system by respectively establishing the rectification model and the isolation model and then combining the high-frequency model of the passive device. In the process of establishing the model, the hardware platform of the PET system does not need to be changed, and when the model is used for carrying out simulation analysis on the system conducted interference, only the simulation parameters of the model need to be adjusted, so that the hardware cost of the system cannot be increased.

2. The invention can conveniently and quickly carry out the simulation test of the conducted interference on the PET system comprising two or more power conversion links, and can simultaneously test the conducted interference characteristics independently generated by different power conversion links in the same system, thereby facilitating the subsequent analysis. When the simulation measurement of the conduction interference of the direct current side in the whole PET system is carried out, the interference generated by the rectifier stage or the isolation stage can not be bypassed, so that the correctness of the obtained result is ensured.

3. The invention can analyze and research the characteristics of the conduction interference of the whole system and each internal power conversion link of the PET system at the beginning of the design of the PET system, and can effectively obtain the specific action mechanism of the whole and internal conduction interference of the PET system, thereby being capable of purposefully designing the electromagnetic compatibility of the system, reducing the later-stage related development cost and shortening the research and development period.

Drawings

Fig. 1 is a schematic diagram of a PET-based rail transit drive system.

FIG. 2 is a schematic diagram of a typical PET structure.

Fig. 3 is a schematic diagram of a three-phase PWM rectifier.

Fig. 4 is a topological schematic diagram of isolation level DAB.

Fig. 5 is a working phase diagram of the isolation level DAB.

Fig. 6 is a schematic diagram of the impedance characteristics of an actual resistor.

Fig. 7 is a schematic diagram of the impedance characteristics of an actual capacitor.

Fig. 8 is a schematic diagram of the impedance characteristics of an actual inductor.

Fig. 9 is a schematic view of a bus bar structure.

Fig. 10 is a schematic diagram of a typical LISN structure.

Fig. 11a is a schematic structural diagram of the first rc branch.

Fig. 11b is a schematic structural diagram of the second rc branch.

Fig. 12 is a diagram showing the common mode and differential mode interference characteristics of the internal dc side of the PET whole system.

Fig. 13 is a schematic diagram of common mode interference characteristics when point-to-ground capacitances are present in bridge arms of different rectifier stages.

Fig. 14 is a schematic diagram of common mode interference characteristics when point-to-ground capacitances are present in bridge arms of different isolation stages.

Detailed Description

The invention is described in detail below with reference to the figures and specific embodiments. The present embodiment is implemented on the premise of the technical solution of the present invention, and a detailed implementation manner and a specific operation process are given, but the scope of the present invention is not limited to the following embodiments.

The embodiment provides a testing method based on a power electronic transformer system (PET) conducted interference characteristic simulation model. The embodiment can perform simulation test on the conducted interference characteristics of the whole system and different levels in the system on the premise of ensuring the normal operation of the PET system, and master the characteristics of interference generated by the whole system and different levels in the system and the mutual influence of the interference, thereby clearly mastering the specific action mechanism of the conducted interference in the PET system and guiding the electromagnetic compatibility design of the system.

The specific implementation steps of this embodiment are as follows:

and step S1, establishing a system rectification stage model through the PWM rectifier type structure.

Firstly, the input stage of the PET system adopts a PWM rectifier type structure, and for the three-phase PET system, the topology structure is shown in fig. 3. In the figure, esa,esb,escFor three-phase input voltage, isa,isb,iscFor three-phase input current, idcIs a direct side current, ioutTo output a current, iCFor capacitive current, L is the network side inductor, R is the equivalent loss resistance in the circuit, Ua,Ub,UcThe potential of the middle point of each bridge arm is C, and the C is a direct current side capacitor.

Then, a method of modeling by using a switching function is adopted according to a PWM rectifier type structure, and based on the switching function and kirchhoff voltage law, an equation of a three-phase main loop can be obtained as follows:

Figure BDA0002546284300000051

in the formula of Uxo=Udc×Sxi+uNox∈(a,b,c),SxiAs a switching function of the bridge arm switching tube, uNoIs neutral point potential, UdcIs the dc side voltage.

Combining three-phase equilibrium conditions to obtain:

based on kirchhoff's law, for the dc side capacitance, there are:

the joint type (1) - (3) can obtain a mathematical model of the three-phase PWM rectifier type structure under an abc three-phase static coordinate system.

Figure BDA0002546284300000054

Wherein L is a network side inductor, C is a direct current side capacitor, isa、isb、iscFor three-phase input current, UdcIs DC side voltage, R is equivalent loss resistance in the circuit, Uao、Ubo、UcoIs the midpoint potential of each bridge arm, Sai、Sbi、SciAs a switching function of the bridge arm switching tube, uNoIs neutral point potential, esa、esb、escFor three-phase input voltage, ioutTo output a current.

And step S2, adopting a double-active bridge DC/DC converter (DAB) structure as shown in FIG. 4, as an isolation level of the PET system, and establishing a system isolation level model by a phase-shifting control method.

In FIG. 4, H1And H2Is a left and right full-bridge structure of DAB, T is a high-frequency transformer, Q of DAB and the whole PET system1~Q8To switch tubes, D1~D8Is a diode with switching tubes connected in reverse parallel, and the DAB input voltage is V1Output voltage of V2,C1And C2Is an input-output terminal capacitance, LrIs a filter inductor.

As shown in FIG. 5, a waveform diagram, t, is given for the power transmission of the DAB structure in one cycle0~t6One cycle is divided into 6 working phases: working phase 1 (t)0~t1) Working phase 2 (t)1~t2) Working phase 3 (t)2~t3) Working phase 4 (t)3~t4) To do work onWorking phase 5 (t)4~t5) And an operating phase 6 (t)5~t6)。

When DAB is operated in a stable forward power transmission state, t2-t0=DTs/2,t3-t2=(1-D)TsThe inductive current is symmetrically equal in magnitude in the positive half period and the negative half period and has iL(t0)=-iL(t3) Obtaining t0And t2Value of inductor current at time:

Figure BDA0002546284300000061

at the same time, according to the calculation formula of average power

Figure BDA0002546284300000062

The transmission power can be found to be:

in the formula, the transformation ratio of the high-frequency transformer is n, D is the ratio of the phase shift angle to pi, fsIs the switching frequency.

And step S3, constructing an operation simulation model of the whole power electronic transformer system in Saber simulation software through a system rectification level model and a system isolation level model, and performing simulation operation on the electronic transformer system.

And S4, taking the high-frequency model of passive devices (such as a resistor, a capacitor, an inductor and a transformer) in the system into consideration on the basis of the operation simulation model of the power electronic transformer system, extracting main parasitic parameters (such as the inductance-capacitance parameter of an alternating current/direct current bus and the parasitic capacitance parameter of a radiator added to a switch device to the ground) in the circuit structure, and establishing the high-frequency simulation model of the conduction interference of the PET system in Saber simulation software.

1. High frequency model of resistance

In the case of direct current and low frequency, the resistor basically exhibits the characteristics of pure resistance, and as the frequency increases, the influence of stray parameters in the resistor becomes more and more obvious, so that when analyzing the impedance characteristics of the resistor in a high frequency environment, the parasitic inductance and the parasitic capacitance existing in the resistor must be considered.

A typical high frequency equivalent model and amplitude-frequency phase-frequency characteristics is shown in FIG. 6, where CpParasitic capacitance being resistance, LpIs the parasitic inductance of the resistor. When the frequency starts to rise slowly to f1When the frequency of the resistor is increased, the impedance is reduced at the rate of 20dB per decade of frequency multiplication, and the phase is-90 degrees; as the frequency continues to rise to f2At this time, the resistance begins to exhibit inductive characteristics to the outside, and the impedance increases at a rate of 20dB per decade of frequency with a phase of 90 ° as the frequency increases.

2. High frequency model of capacitance

The ideal capacitance characteristic has a dc blocking function on one hand, and the impedance becomes smaller and smaller with the increase of the frequency on the other hand, and when the impedance is negligibly small, the short circuit characteristic can be considered. In practice, the capacitor usually has an equivalent series inductance and an equivalent series resistance, and a typical impedance characteristic is shown in fig. 7.

In a high-frequency equivalent model of the capacitor, the impedance expression is as follows:

available resonant frequency f1Comprises the following steps:

Figure BDA0002546284300000072

wherein C is the capacitance of the capacitor, RpParasitic resistance of the capacitor, LpIs the parasitic inductance of the capacitor.

At the resonance frequency f1Before, the capacitance externally shows a standard capacitance characteristic; at the resonance frequency f1The impedance is expressed as the equivalent series resistance R of the capacitorp(ii) a At the resonance frequency f1Then, the equivalent series inductance L in the capacitorpStarting to dominate, the impedance rises with a slope of 20dB per decade of frequency. In practical applications, the resonant frequency in the impedance characteristics will also be different for different types of capacitors, and the higher the resonant frequency, the better the high-frequency characteristics of the capacitor are considered. Generally, the high frequency characteristics of a ceramic capacitor are better than those of an electrolytic capacitor, which generally requires a relatively large volume for withstanding voltage and current, and has a large internal equivalent series inductance and an internal equivalent series resistance. Sometimes electrolytic capacitors and ceramic capacitors are often used in parallel in particular applications in order to combine the advantages of both capacitors.

3. High frequency model of inductance

The inductor in the PET system is mainly used for filtering and storing energy, and has a relatively large volume. To meet the requirements of the system, the inductor as a magnetic element usually needs to be wound separately. Due to the characteristics of materials and structures, distributed capacitance exists between turns and layers of windings of the inductor, and various losses exist in the inductor during working, so that parasitic resistance of the inductor is formed. The ideal inductance characteristic, the higher the frequency, the higher the impedance of the inductance, and the phase position is always kept at-90 deg.

In practice, the typical impedance characteristics of the inductor due to distributed capacitance and parasitic resistance are shown in fig. 8. The impedance expression in the high-frequency equivalent model of the inductor is as follows:

obtaining the turning frequency f1Comprises the following steps:

Figure BDA0002546284300000082

resonant frequency f2Comprises the following steps:

Figure BDA0002546284300000083

wherein L is the value of the inductance, RpParasitic resistance of inductance, CpIs the parasitic capacitance of the inductor.

When the frequency exceeds the resonance frequency f2The inductor will exhibit capacitive characteristics. It should be noted that when the structure of the inductor is complicated, the inductor may sometimes exhibit capacitance and sometimes inductance characteristics at high frequencies.

4. The parasitic parameters of the AC/DC bus mainly comprise the inductance, the resistance and the capacitance to ground of the bus, and the corresponding distribution parameters of the buses with different shapes and different materials are different. Taking a long straight bus with a rectangular cross-sectional area as an example, the corresponding parasitic parameters can be directly obtained by calculation according to the basic size of the bus, and as shown in fig. 9, the calculation formulas of the resistance, the distributed inductance, and the distributed capacitance are as follows:

Figure BDA0002546284300000084

Figure BDA0002546284300000086

where ρ is the resistivity of the bus bar, f is the current frequency, μ is the permeability, σ is the conductivity, and is the dielectric coefficient, and the other parameters are bus bar size parameters as shown in fig. 9.

5. The parasitic capacitance of the heat sink exists between the switching device and the heat sink, and is an important component of the conducted interference common mode loop. The heat conducting plate of the switching device is usually tightly stacked with the heat sink through a certain heat conducting material in structure, so that a typical planar capacitor structure is formed between the switching device and the heat sink, and the capacitance value of the capacitor can be directly calculated according to the size parameter of the contact surface and the dielectric coefficient of the heat conducting material:

where, is the dielectric constant, S is the area of the contact surface, and d is the thickness of the planar capacitor. When the area of the heat sink is larger than that of the contact surface of the switching device, the calculation can be performed by means of equation (14), or the corresponding capacitance value can be calculated by solving the electric field energy by using a finite element modeling method.

And step S4, taking into account a high-frequency model of a passive device in the power electronic transformer system, extracting main parasitic parameters in a circuit structure, and establishing a high-frequency simulation model of the conducted interference of the power electronic transformer system in Saber simulation software.

And step S5, arranging a first resistance-capacitance branch and a second resistance-capacitance branch in the high-frequency simulation model for measuring conducted interference on the voltage input side of the whole system and conducted interference on the internal direct current side.

In order to study the conducted interference characteristics at the internal dc side of the PET system, for the high-frequency simulation model of the conducted interference of the system established in step S4, the conducted interference generated from the two sides of the input PWM rectifier stage and the isolation stage are respectively included at the internal dc side thereof, the conducted interference characteristics at the dc side are obtained by using the resistance-capacitance branch, and the voltage at the measuring end resistor can represent the conducted interference generated at the dc side of the whole system.

In practice, a commonly used test method for conducted interference is a method for measuring interference voltage, a Linear Impedance Stabilization Network (LISN) is connected between a power supply port and a device to be measured, as shown in fig. 10, the voltage of the LISN measurement port is used as the interference voltage, and then specific common-mode and differential-mode interference is calculated according to the interference voltage measured by positive and negative lines. The LISN has the functions of reducing the flow of external conducted interference into the equipment to be measured so as to influence the accuracy of a measurement result and ensuring that the conducted interference generated by the equipment to be measured flows through the LISN measurement network completely.

Although the conducted interference of the device under test to the power supply side can be directly measured by using the LISN, it should be noted that the interference paths on the left and right sides of the LISN are cut off from each other. Therefore, the LISN can only measure the interference of a certain side, in the PET system, the propagation path of the interference is complex, when the conducted interference generated by the PET input side to the grid-connected side needs to be measured, the LISN can be directly connected into the power grid side and the three-phase input line, at the moment, one third of the interference voltage sum obtained by measuring each LISN in the three phases can be used as the common-mode interference voltage of the PET system input side, and one half of the interference voltage difference between the two phases is the differential-mode interference; and when the conducted interference at the direct current side needs to be measured, the LISN cannot be directly connected to the direct current side, because the conducted interference at the direct current side not only comes from the interference component generated by the rectifier-level PWM rectifier, but also contains the interference component generated by the isolation-level DAB, at this time, no matter how the LISN is placed, the interference path at one side is inevitably cut off, and the superposition condition of the interference at two sides cannot be accurately reflected.

Therefore, the invention redesigns the resistance-capacitance branch circuit, removes the inductance in the LISN and the capacitance on the non-measurement side, directly utilizes the resistance-capacitance branch circuit to measure the conducted interference on the direct current side of the PET system, and at the moment, half of the interference voltage sum measured by the positive bus and the negative bus is the common mode interference on the direct current side. Half of the interference voltage difference is differential mode interference. The specific measurement form comprises a first resistance-capacitance branch and a second resistance-capacitance branch.

As shown in fig. 11a, the first rc branch includes a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2, two ends of the first resistor R1 are respectively connected to the voltage input side of the high-frequency simulation model and the input end of the rectifier stage, one end of the first resistor R1 is grounded through the first capacitor C1, the other end of the first resistor R1 is grounded through the second capacitor C2 and the second resistor R2, and the voltage at two ends of the second resistor R2 is the conducted interference on the voltage input side of the whole system.

As shown in fig. 11b, the second rc branch includes a third resistor R3 and a third capacitor C3, one end of the third capacitor C3 is connected to the rectifying stage and the isolating stage of the high-frequency simulation model, the other end is grounded through the third resistor R3, and the voltage across the third resistor R3 is the conducted interference on the dc side in the whole system. As shown in fig. 11, the Common Mode (CM) and differential mode interference (DM) characteristics at the dc side inside the PET system are measured by the voltage of the third resistor R3, the abscissa represents the frequency, and the ordinate represents the value of the interference voltage.

In this embodiment, the steps S6 and S7 are further included to conveniently realize the conducted interference characteristics generated by the PET system internal rectification stage and the isolation stage independently:

step S6, in the high-frequency simulation model, the ground capacitance of the midpoint of the isolation-level bridge arm is 1/100 of the ground capacitance of the midpoint of the rectifier-level bridge arm, other parameters of the model are unchanged, which is equivalent to independently cutting off the most main propagation path of interference generated by an isolation-level conducted interference source, at this time, conducted interference obtained by measurement on the direct current side of the system is basically generated by the rectifier level, and at this time, the conducted interference on the integral voltage input side of the system measured by the first resistance-capacitance branch is the conducted interference generated by the rectifier level independently;

and S7, in the high-frequency simulation model, enabling the ground capacitance of the midpoint of the rectifier bridge arm to be 1/100 of the ground capacitance of the midpoint of the isolation bridge arm, and in the same way, the conducted interference on the direct current side in the whole system measured by the second resistance-capacitance branch is the conducted interference generated by the isolation level independently.

As shown in fig. 12, in order to obtain the common mode interference characteristic by the rectification stage alone using the embodiment, the abscissa represents the frequency, and the ordinate represents the value of the interference voltage. In the figure, CM _100pF, CM _300pF, and CM _500pF are common mode interference spectra generated by the rectifier stage alone when the point-to-ground parasitic capacitances in the arms of the rectifier stage are 100pF, 300pF, and 500pF, respectively.

As shown in fig. 13, in order to obtain the common mode interference characteristic by the isolation stage alone using the embodiment, the abscissa represents the frequency and the ordinate represents the value of the interference voltage. In the figure, CM _100pF, CM _300pF, and CM _500pF are common mode interference spectra generated by the isolation stage alone when the parasitic capacitance of the isolation stage to ground is 100pF, 300pF, and 500pF, respectively.

In conclusion, the embodiment can measure and analyze the conducted interference mechanism of the PET system through the conducted interference characteristics generated by the whole PET system and different stages. The characteristics of each interference source in the PET system are analyzed, related influence factors are determined, the related influence factors of each interference propagation path are analyzed, and the difference of conducted interference generated by each input PWM rectification stage and each input isolation stage of the analysis system is analyzed.

The foregoing detailed description of the preferred embodiments of the invention has been presented. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.

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