阅读说明：本技术 一种输出幅度稳定的三角波产生电路 (Triangular wave generating circuit with stable output amplitude ) 是由 张礼军 黄海 张专 周金玲 于 2020-06-17 设计创作，主要内容包括：本发明公开了一种输出幅度稳定的三角波产生电路,其包括电压产生单元、电压输出单元以及积分器单元。其中,电压产生单元用于产生第一参考电压和第二参考电压；电压输出单元包括振荡器单元和电荷泵单元,其中,振荡器单元接收第一参考电压、第二参考电压以及电荷泵单元输出的第二比较电压并将第二比较电压的幅度限制在第一参考电压和第二参考电压之间；电荷泵单元接收振荡器单元产生的第一时钟信号和第二时钟信号并产生第一比较电压、第二比较电压以及第三比较电压；积分器单元接收第一比较电压和第三比较电压并产生具有三角波的输出电压。相比于现有技术,本发明所公开的输出幅度稳定的三角波产生电路,稳定了三角波输出的幅度。(The invention discloses a triangular wave generating circuit with stable output amplitude, which comprises a voltage generating unit, a voltage output unit and an integrator unit. The voltage generation unit is used for generating a first reference voltage and a second reference voltage; the voltage output unit comprises an oscillator unit and a charge pump unit, wherein the oscillator unit receives a first reference voltage, a second reference voltage and a second comparison voltage output by the charge pump unit and limits the amplitude of the second comparison voltage between the first reference voltage and the second reference voltage; the charge pump unit receives a first clock signal and a second clock signal generated by the oscillator unit and generates a first comparison voltage, a second comparison voltage and a third comparison voltage; the integrator unit receives the first comparison voltage and the third comparison voltage and generates an output voltage having a triangular wave. Compared with the prior art, the triangular wave generating circuit with stable output amplitude disclosed by the invention stabilizes the output amplitude of the triangular wave.)

1. A triangular wave generating circuit with stable output amplitude, comprising:

a voltage generation unit for generating a first reference voltage and a second reference voltage;

a voltage output unit including an oscillator unit and a charge pump unit, wherein the oscillator unit receives the first reference voltage, the second reference voltage, and a second comparison voltage output by the charge pump unit and limits a magnitude of the second comparison voltage between the first reference voltage and the second reference voltage; the charge pump unit receives the first clock signal and the second clock signal generated by the oscillator unit and generates a first comparison voltage, a second comparison voltage and a third comparison voltage; and

an integrator unit receiving the first and third comparison voltages and generating an output voltage having a triangular wave.

2. The output amplitude-stabilized triangular wave generation circuit according to claim 1, wherein the voltage generation unit includes a voltage generation module and a voltage division module, wherein the voltage division module receives and divides the voltage generated by the voltage generation module to obtain the first reference voltage and the second reference voltage.

3. The triangular wave generation circuit with stable output amplitude according to claim 2, wherein the voltage generation module is a reference band gap voltage generation circuit; the voltage division module comprises a first resistor, a second resistor and a third resistor, the first reference voltage is the voltage on the second resistor and the third resistor, and the second reference voltage is the voltage on the third resistor.

4. The output amplitude-stabilized triangular wave generation circuit according to claim 1, wherein the oscillator unit includes a first comparison module, a second comparison module, and a latch module, wherein the first comparison module receives the first reference voltage and the second comparison voltage and outputs a first reference input level according to the first reference voltage and the second comparison voltage; the second comparison module receives the second reference voltage and the second comparison voltage and outputs a second reference input level according to the second reference voltage and the second comparison voltage; the latch module receives the first reference input level and the second reference input level and outputs the first clock signal and the second clock signal according to the first reference input level and the second reference input level.

5. The circuit for generating triangular waves with stable output amplitude according to claim 4, wherein the first comparing module and the second comparing module are both comparators.

6. The output amplitude stabilized triangle wave generating circuit of claim 5 wherein said latch module is an RS latch.

7. The output amplitude-stabilized triangular wave generation circuit according to claim 1, wherein the charge pump unit includes a first current module, a second current module, and a third current module, wherein the first current module, the second current module, and the third current module each receive the first clock signal and the second clock signal and output the first comparison voltage, the second comparison voltage, and the third comparison voltage according to the first clock signal and the second clock signal, respectively; the first comparison voltage and the third comparison voltage are alternately charged and discharged.

8. The output amplitude stabilized triangle wave generating circuit according to claim 7, further comprising a first capacitor on the second current module, wherein the charging and discharging of the first capacitor by the second current module is used for generating the second comparison voltage.

9. The output amplitude stabilized triangular wave generation circuit according to claim 1, wherein the integrator unit includes an amplification block, wherein the amplification block receives the first comparison voltage and the second comparison voltage and outputs an output voltage having a triangular wave according to the first comparison voltage and the second comparison voltage.

10. The output amplitude stabilized triangular wave generating circuit according to claim 9, wherein the integrator unit further comprises a feedback module, the amplifying module is an amplifier, and an output voltage having a triangular wave can be output by the feedback module and the amplifier.

Technical Field

The invention relates to the technical field of signal generation, in particular to a triangular wave generating circuit with stable output amplitude.

Background

A conventional triangular wave generating circuit, as shown in fig. 1, is composed of a charge pump and an integrator. In the charge pump configuration shown in fig. 2, Sa and Sb are inverted signals, and the clock signal from the clock generator controls whether the current flows into the integrating capacitor or the current is drawn from the integrating capacitor according to the clock phase. The output waveform of the integrator is a triangular wave, as shown in fig. 3. Specifically, the output amplitude of the triangular wave generated in fig. 1 is related to the period T of the clock, the current magnitude I of the charge pump, and the integrating capacitor C, and assuming that the clock period is constant, the current I varies greatly with the process and the temperature due to the on-chip generation, and the integrating capacitor also varies with the process, so that the output amplitude of the triangular wave varies greatly with the temperature and the process.

Therefore, in order to solve the above-described problems, the present invention provides a triangular wave generating circuit in which the output amplitude of a triangular wave can be stabilized.

Disclosure of Invention

The invention provides a triangular wave generating circuit with stable output amplitude, and aims to solve the problem that the triangular wave output by the existing triangular wave generating circuit with stable output amplitude is unstable in amplitude.

In order to solve the above technical problem, the present invention provides a triangular wave generating circuit with stable output amplitude, comprising: a voltage generation unit for generating a first reference voltage and a second reference voltage; a voltage output unit including an oscillator unit and a charge pump unit, wherein the oscillator unit receives the first reference voltage, the second reference voltage, and a second comparison voltage output by the charge pump unit and limits a magnitude of the second comparison voltage between the first reference voltage and the second reference voltage; the charge pump unit receives the first clock signal and the second clock signal generated by the oscillator unit and generates a first comparison voltage, a second comparison voltage and a third comparison voltage; and an integrator unit receiving the first and third comparison voltages and generating an output voltage having a triangular wave.

Further, the voltage generation unit includes a voltage generation module and a voltage division module, wherein the voltage division module receives and divides the voltage generated by the voltage generation module to obtain the first reference voltage and the second reference voltage.

Further, the voltage generation module is a reference band gap voltage generation circuit; the voltage division module comprises a first resistor, a second resistor and a third resistor, the first reference voltage is the voltage on the second resistor and the third resistor, and the second reference voltage is the voltage on the third resistor.

Further, the oscillator unit includes a first comparing module, a second comparing module and a latch module, wherein the first comparing module receives the first reference voltage and the second comparing voltage and outputs a first reference input level according to the first reference voltage and the second comparing voltage; the second comparison module receives the second reference voltage and the second comparison voltage and outputs a second reference input level according to the second reference voltage and the second comparison voltage; the latch module receives the first reference input level and the second reference input level and outputs the first clock signal and the second clock signal according to the first reference input level and the second reference input level.

Further, the oscillator unit further comprises a latch module, and the first comparison module and the second comparison module are both comparators.

Further, the latch module is an RS latch.

Further, the charge pump unit includes a first current module, a second current module, and a third current module, where the first current module, the second current module, and the third current module all receive the first clock signal and the second clock signal and respectively output the first comparison voltage, the second comparison voltage, and the third comparison voltage according to the first clock signal and the second clock signal; the first comparison voltage and the third comparison voltage are alternately charged and discharged.

Further, the second current module further includes a first capacitor, and charging and discharging of the first capacitor by the second current module is used for generating the second comparison voltage.

Further, the integrator unit includes an amplification module, wherein the amplification module receives the first comparison voltage and the second comparison voltage and outputs an output voltage having a triangular wave according to the first comparison voltage and the second comparison voltage.

Further, the integrator unit further comprises a feedback module comprising a second capacitor and a third capacitor; the amplifying module is an amplifier, and the feedback module and the amplifier can output an output voltage with a triangular wave.

The triangular wave generating circuit with stable output amplitude disclosed by the invention can limit the amplitude of the second comparison voltage between the first reference voltage and the second reference voltage by designing the oscillator unit between the voltage generating unit and the charge pump unit, and the first comparison voltage and the third comparison voltage input into the integrator unit are generated according to the first clock signal and the second clock signal output by the oscillator unit, so that the period of the triangular wave voltage generated by the integrator unit is the same as the oscillation period of the oscillator unit, and the amplitude of the triangular wave output can be stabilized. The triangular wave generating circuit with stable output amplitude disclosed by the invention solves the problem that the triangular wave output by the existing triangular wave generating circuit with stable output amplitude is unstable.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of a prior art triangular wave generating circuit;

FIG. 2 is a schematic circuit diagram of a charge pump in the triangular wave generating circuit shown in FIG. 1;

FIG. 3 is a waveform diagram of a triangular wave output of the triangular wave generating circuit shown in FIG. 1;

fig. 4 is a schematic structural diagram of a triangular wave generating circuit with stable output amplitude according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a specific schematic structure of the triangular wave generating circuit with stable output amplitude shown in FIG. 4;

fig. 6 is a circuit schematic diagram of a voltage generating unit of the triangular wave generating circuit shown in fig. 4 whose output amplitude is stabilized;

FIG. 7 is a circuit schematic of an oscillator cell of the output amplitude stabilized triangular wave generating circuit shown in FIG. 4;

fig. 8 is a circuit schematic diagram of a charge pump unit of the triangular wave generating circuit shown in fig. 4 whose output amplitude is stabilized;

FIG. 9 is a circuit schematic of an integrator cell of the output amplitude stabilized triangular wave generation circuit shown in FIG. 4; and

fig. 10 is a waveform diagram of a triangular wave output of the triangular wave generating circuit shown in fig. 4 whose output amplitude is stabilized.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

Fig. 4 is a schematic structural diagram of a triangular wave generating circuit with stable output amplitude according to an embodiment of the present invention; FIG. 5 is a schematic diagram of a specific schematic structure of the triangular wave generating circuit with stable output amplitude shown in FIG. 4; fig. 6 is a circuit schematic diagram of the voltage generating unit 11 of the triangular wave generating circuit shown in fig. 4 whose output amplitude is stabilized; fig. 7 is a circuit schematic diagram of the oscillator unit 121 of the triangular wave generating circuit shown in fig. 4 whose output amplitude is stabilized; fig. 8 is a circuit schematic diagram of the charge pump unit 122 of the triangular wave generating circuit shown in fig. 4 whose output amplitude is stabilized; fig. 9 is a circuit schematic diagram of the integrator unit 13 of the triangular wave generating circuit shown in fig. 4 whose output amplitude is stabilized; and FIG. 10 is a waveform diagram of a triangular wave output of the triangular wave generating circuit shown in FIG. 4 with the output amplitude stabilized. As shown in fig. 4 to 9, the triangular wave generating circuit 10 of the present embodiment, which has a stable output amplitude, includes a voltage generating unit 11, a voltage outputting unit 12, and an integrator unit 13. Wherein, the voltage generating unit 11 is configured to generate a first reference voltage Vrp and a second reference voltage Vrn; the voltage output unit 12 includes an oscillator unit 121 and a charge pump unit 122, wherein the oscillator unit 121 receives the first reference voltage Vrp, the second reference voltage Vrn, and a second comparison voltage Vm output by the charge pump unit 122 and limits a magnitude of the second comparison voltage Vm between the first reference voltage Vrp and the second reference voltage Vrn; the charge pump unit 122 receives the first clock signal Q and the second clock signal QB generated by the oscillator unit 121 and generates a first comparison voltage Vl, a second comparison voltage Vm, and a third comparison voltage Vr; the integrator unit 13 receives the first comparison voltage Vl and the third comparison voltage Vr and generates an output voltage Vo having a triangular wave. In the present embodiment, by designing the oscillator unit 121 between the voltage generation unit 11 and the charge pump unit 122, the magnitude of the second comparison voltage Vm can be limited between the first reference voltage Vrp and the second reference voltage Vrn, and the first comparison voltage Vl and the third comparison voltage Vr input to the integrator unit 13 are generated according to the first clock signal Q and the second clock signal QB output from the oscillator unit 121, so that the period of the triangular wave voltage generated by the integrator unit 13 is the same as the oscillation period of the oscillator unit 121, and the output magnitude Ampl of the triangular wave can be stabilized.

In an embodiment, for example, in the embodiment, the voltage generating unit 11 includes a voltage generating module 111 and a voltage dividing module 112, wherein the voltage dividing module 112 receives and divides the voltage generated by the voltage generating module 111 to obtain the first reference voltage Vrp and the second reference voltage Vrn. Specifically, the voltage generation module 111 is a reference bandgap voltage generation circuit; the voltage dividing module 112 includes a first resistor R1, a second resistor R2, and a third resistor R3, the first reference voltage Vrp is a voltage across the second resistor R2 and the third resistor R3, and the second reference voltage Vrn is a voltage across the third resistor R3. In an actual circuit, as shown in fig. 6, the voltage generating module 111 is connected in series with the voltage dividing module 112, that is, the reference bandgap voltage generating circuit, the first resistor R1, the second resistor R2 and the third resistor R3 are connected in series in sequence.

In one embodiment, for example, the oscillator unit 121 includes a first comparing module 1211, a second comparing module 1212, and a latch module 1213. Wherein the first comparison module 1211 receives the first reference voltage Vrp and the second comparison voltage Vm and outputs a first reference input level according to the first reference voltage Vrp and the second comparison voltage Vm; the second comparing module 1212 receives the second reference voltage Vrn and the second comparison voltage Vm and outputs a second reference input level according to the second reference voltage Vrn and the second comparison voltage Vm; the latch module 1213 receives the first and second reference input levels and outputs the first and second clock signals Q and QB according to the first and second reference input levels. Specifically, the first comparison module 1211 and the second comparison module 1212 are both comparators; the latch module 1213 is an RS latch. In an actual circuit, as shown in fig. 7, the first comparing module 1211 is referred to as a first comparator, the second comparing module 1212 is referred to as a second comparator, a positive input terminal of the first comparator and a negative input terminal of the second comparator are both connected to the second comparing voltage Vm, the negative input terminal of the first comparator is connected to the first reference voltage Vrp, and the positive input terminal of the second comparator is connected to the second reference voltage Vrn. Meanwhile, the output end of the first comparator is connected with the R input end of the RS latch, the output end of the second comparator is connected with the S input end of the RS latch, and the two output ends of the RS latch respectively output the first clock signal Q and the second clock signal QB.

In an embodiment, for example, in the embodiment, the charge pump unit 122 includes a first current module 1221, a second current module 1222 and a third current module 1223, wherein the first current module 1221, the second current module 1222 and the third current module 1223 each receive the first clock signal Q and the second clock signal QB and respectively output the first comparison voltage Vl, the second comparison voltage Vm and the third comparison voltage Vr according to the first clock signal Q and the second clock signal QB; the first comparison voltage Vl and the third comparison voltage Vr are alternately charged and discharged. Specifically, the first current module 1221 includes a first current source Ip1, a first switch s1, a second current source In1, and a second switch s2 connected In series, wherein a connection node between the first switch s1 and the second current source In1 serves as an output terminal of the first current module 1221 to output the first comparison voltage Vl; the second current module 1222 comprises a third current source Ip2, a third switch s3, a fourth current source In2 and a fourth switch s4 connected In series, wherein a connection node between the third switch s3 and the fourth current source In2 serves as an output terminal of the second current module 1222 to output the second comparison voltage Vm; the third current module 1223 includes a fifth current source Ip3, a fifth switch s5, a sixth current source In3, and a sixth switch s6 connected In series, wherein a connection node between the fifth switch s5 and the sixth current source In3 serves as an output terminal of the third current module 1222 to output the third comparison voltage Vr. In this embodiment, the second current module 1222 further includes a first capacitor C1, and the charging and discharging of the first capacitor C1 by the second current module 1222 is used for generating the second comparison voltage Vm. In an actual circuit, as shown In fig. 8, the currents flowing through the first current module 1221 and the third current module 1223 are equal, that is, the currents of the first current source Ip1, the fifth current source Ip3, the second current source In1, and the sixth current source In3 are equal; the currents flowing through the second current module 1222 are equal, that is, the currents of the third current source Ip2 and the third current source In2 are equal; the first clock signal Q and the second clock signal QB output by the oscillator unit 121 may control circuit switches in the charge pump unit 122, and specifically, the first switch s1, the third switch s3, and the sixth switch s6 are controlled by the first clock signal Q, and the second switch s2, the fourth switch s4, and the fifth switch s5 are controlled by the second clock signal QB; the first current module 1221 outputs the first comparison voltage Vl, the second current module 1222 outputs the second comparison voltage Vm, and the third current module 1223 outputs the third comparison voltage Vr. It should be noted that the first switch s1 charged by the first comparison voltage Vl is controlled by the first clock signal Q, and the second switch s2 discharged is controlled by the second clock signal QB; while the fifth switch s5 charged by the third comparison voltage Vr is controlled by the second clock signal QB and the sixth switch s6 discharged is controlled by the first clock signal Q; therefore, when the first comparison voltage Vl is charged, the third comparison voltage Vr is discharged, and when the first comparison voltage Vl is discharged, the third comparison voltage Vr is charged, that is, the charging and discharging processes of the first comparison voltage Vl and the third comparison voltage Vr are alternately performed.

In one embodiment, such as this embodiment, the integrator unit 13 includes an amplifying module 131 and a feedback module 132. The amplifying module 131 receives the first comparison voltage Vl and the third comparison voltage Vr and outputs an output voltage Vo of a triangular wave according to the first comparison voltage Vl and the third comparison voltage Vr. The amplifying module 131 is an amplifier, and the feedback module 132 and the amplifier can output an output voltage Vo having a triangular wave. In an actual circuit, as shown in fig. 9, the first comparison voltage Vl is input to the positive input terminal of the amplifier, and the third comparison voltage Vr is input to the negative input terminal of the amplifier; the feedback module 132 comprises a second capacitor C2 and a third capacitor C3, one end of the second capacitor C2 is connected to the positive input terminal of the amplifier, and the other end is connected to the negative output terminal of the amplifier; one end of the third capacitor C3 is connected with the negative input end of the amplifier, and the other end is connected with the positive output end of the amplifier; and the voltage between the positive output end and the negative output end of the amplifier is the output voltage Vo of the triangular wave. In this embodiment, the capacitance values of the second capacitor C2 and the third capacitor C3 are equal.

How the triangular wave generating circuit 10 whose output amplitude is stabilized stabilizes the output amplitude ampli of the triangular wave is described in detail below.

The first step is as follows: the first reference voltage Vrp and the second reference voltage Vrn generated by the voltage generation unit 11 provide reference voltages to the first comparator and the second comparator in the oscillator unit 121, first, assuming that an initial voltage of the second comparison voltage Vm output by the charge pump unit 122 is 0, an output terminal of the first comparator, i.e., an R input terminal of the RS latch, is 0, an output terminal of the second comparator, i.e., an S input terminal of the RS latch, is 1, the first clock signal Q output by the latch module 1213 is 1, the second clock signal QB is 0, the third switch S3 in the second current module 1222 is closed, the fourth switch S4 is open, the first capacitor vrc 1 charges the second comparison voltage Vm, the second comparison voltage Vm continuously increases, and when the second comparison voltage Vm is greater than the second reference voltage Vrn, the output of the first comparator is still 0, the output of the second comparator becomes 0, and due to the latch module 1213, the first clock signal Q and the second clock signal QB maintain the previous state, i.e. the first clock signal Q is 1 and the second clock signal QB is 0; therefore, the voltage value of the second comparison voltage Vm continues to increase, when the second comparison voltage Vm is greater than the first reference voltage Vrp, the output terminal of the first comparator becomes 1, the output terminal of the second comparator is 0, the first clock signal Q becomes 0, the second clock signal QB becomes 1, at this time, the third switch s3 and the fourth switch s4 are both closed, the first voltage discharges the second comparison voltage Vm, the second comparison voltage Vm starts to fall, when the second comparison voltage Vm is less than the first reference voltage Vrp, the output terminal of the first comparator becomes 0, the output terminal of the second comparator becomes 0, due to the action of the latch module 1213, the first clock signal Q and the second clock signal Q maintain the previous state, that is, the first clock signal Q is 0, the first clock signal QB is 1, therefore, the voltage of the second comparison voltage Vm continues to drop until the second comparison voltage Vm is less than the second reference voltage Vrn, at this time, the output terminal of the first comparator is 0, the output terminal of the second comparator is 1, the first clock signal Q becomes 1, the second clock signal QB becomes 0, the third switch s3 is closed, the fourth switch s4 is opened, the voltage of the second comparison voltage Vm starts to rise again, and the cycle is repeated, the first clock signal Q and its inverted signal, the second clock signal QB is a periodic square wave signal, and the frequency of the periodic square wave signal is:

Freq＝I2/(2Vrp-2Vrn)/C1 (1)

i2 in equation (1) is the current flowing through the second current module 1222.

Second, the oscillator unit 121 controls the first switch s1, the second switch s2, the fifth switch s5 and the sixth switch s6 in the first current module 1221 and the third current module 1223 in the charge pump unit 122 by generating the first clock signal Q and the second clock signal QB of the cycle, the first switch s1 to which the first comparison voltage Vl is charged is controlled by the first clock signal Q, and the second switch s2 to which the first comparison voltage Vl is discharged is controlled by the second clock signal QB; the fifth switch s5 charged by the third comparison voltage Vr is controlled by the second clock signal QB, the sixth switch s6 discharged by the third comparison voltage Vr is controlled by the first clock signal Q, the third comparison voltage Vr is charged when the first comparison voltage Vl is discharged because the first clock signal Q and the second clock signal QB are in opposite phase, the waveform output by the integrator unit 13 is a triangular wave because the square wave is shaped into a triangular wave by the integrator unit 13, and the triangular wave is a periodic signal because the first clock signal Q and the second clock signal QB are periodic signals, as shown in fig. 10, the output amplitude Ampl of the triangular wave is:

i1 in equation (2) is the current flowing through the circuits in the first current module 1221 and the third current module 1223, and I2 is the current flowing through the second current module 1222. It can be seen from the formula (2) that the output amplitude Ampl of the triangular wave is related to (Vrp-Vrn), the ratio of the current and the ratio of the capacitance, and the current ratio and the specific volume of the capacitance do not change with the changes of the power supply voltage, the temperature and the process angle, so the output amplitude Ampl of the triangular wave is strongly related to (Vrp-Vrn), and the voltages Vrp and Vrn are obtained by dividing the reference bandgap voltage through the resistor and also do not change with the changes of the power supply voltage, the temperature and the process angle, so the output amplitude Ampl of the triangular wave does not change with the changes of the power supply voltage, the temperature and the process angle, that is, the output amplitude Ampl of the triangular wave can be stabilized in this embodiment.

The triangular wave generating circuit with stable output amplitude provided by the invention can limit the amplitude of the second comparison voltage between the first reference voltage and the second reference voltage by designing the oscillator unit between the voltage generating unit and the charge pump unit, and the first comparison voltage and the third comparison voltage input into the integrator unit are generated according to the first clock signal and the second clock signal output by the oscillator unit, so that the period of the triangular wave voltage generated by the integrator unit is the same as the oscillation period of the oscillator unit, and the amplitude of the triangular wave output can be stabilized. Specifically, the triangular wave generating circuit with stable output amplitude can limit the amplitude of the second comparison voltage between the first reference voltage and the second reference voltage through the RS latch, output the first clock signal and the second clock information of the periodic signal, control the charging and discharging of the first comparison voltage and the third comparison voltage through the first clock signal and the second clock signal, and finally shape the square wave into the triangular wave through the integrator, wherein the triangular wave is only strongly related to the difference value of the first reference voltage and the second reference voltage, so that the purpose of stabilizing the output amplitude of the triangular waveform is achieved. The triangular wave generating circuit with stable output amplitude disclosed by the invention solves the problem that the triangular wave output by the existing triangular wave generating circuit with stable output amplitude is unstable.

While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.