阅读说明：本技术 用于量子应用的高导热率基底上的微波衰减器 (Microwave attenuator on high thermal conductivity substrate for quantum applications ) 是由 S·B·奥利瓦德斯 P·古曼 J·嘉姆贝塔 J·晁 于 2019-01-25 设计创作，主要内容包括：提供了与用于量子应用的微波衰减器或高导热率基底有关的技术。设备可以包括提供大于限定的导热率水平的导热率水平的基底。所述设备还可以在所述基底的顶表面上包括一条或多条薄膜线,所述薄膜线包括蒸发的合金。此外,所述设备可在所述基底中包括一个或多个通孔。所述一个或多个通孔的各自的第一端可以连接到相应的薄膜连接器。此外,所述一个或多个通孔的各个第二端可以连接到电接地。(Techniques related to microwave attenuators or high thermal conductivity substrates for quantum applications are provided. The apparatus may include a substrate providing a thermal conductivity level greater than a defined thermal conductivity level. The apparatus may also include one or more thin film lines on the top surface of the substrate, the thin film lines including a vaporized alloy. Further, the device may include one or more through holes in the substrate. Respective first ends of the one or more through holes may be connected to respective thin film connectors. Further, respective second ends of the one or more vias may be connected to an electrical ground.)

1. An apparatus, comprising:

providing a substrate having a thermal conductivity greater than a defined thermal conductivity level;

one or more thin film lines on a top surface of the substrate comprising an evaporated alloy; and

one or more vias in the substrate, wherein respective first ends of the one or more vias are connected to a respective thin film connector and respective second ends of the one or more vias are connected to an electrical ground.

2. The apparatus of claim 1, wherein the substrate comprises a material selected from the group consisting of sapphire, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs).

3. The apparatus of any one of the preceding claims, wherein the one or more thin film wires comprise an alloy selected from the group consisting of copper and nickel chromium alloy (NiCr).

4. The apparatus of any of claims 1-3, wherein the one or more thin film wires comprise an alloy comprising seventy percent nickel and thirty percent chromium.

5. The apparatus of any of the preceding claims, wherein the one or more vias comprise copper.

6. The device of any of the preceding claims, wherein the device comprises one or more resistors, and wherein the respective thin film connections and the one or more vias remove hot electrons from the one or more resistors.

7. The apparatus of any one of the preceding claims, wherein the thermal conductivity level of the substrate is in a range of about 100 to 200 watts per meter per kelvin (W/m/K).

8. The apparatus of any preceding claim, further comprising a ground plane, wherein the substrate is above the ground plane.

9. The apparatus of any preceding claim, wherein the apparatus is a microwave attenuator apparatus for use in a low temperature environment.

10. A method, comprising:

evaporating an alloy on a top surface of a substrate to form one or more thin film lines, wherein the substrate provides a level of thermal conductivity greater than a defined level of thermal conductivity;

forming one or more through holes in the substrate;

connecting respective first ends of the one or more through-holes to respective thin-film connectors; and

electrically grounding respective second ends of the one or more vias.

11. The method of claim 10, wherein the substrate comprises a material selected from the group consisting of sapphire, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs).

12. The method of claim 10 or 11, wherein evaporating the alloy on the top surface of the substrate comprises evaporating a material selected from copper and nickel chromium alloy (NiCr) to form the one or more thin film lines.

13. The method of claim 10 or 11, wherein evaporating the alloy on the top surface of the substrate comprises evaporating the alloy comprising seventy percent nickel and thirty percent chromium.

14. The method of any of claims 10-13, further comprising evaporating copper within the one or more vias.

15. The method of any of claims 10 to 14, further comprising forming one or more resistors on the substrate, and wherein the respective thin film connectors and the one or more vias remove hot electrons from the one or more resistors.

16. The method of any one of claims 10 to 15, wherein the substrate has a thermal conductivity level in a range of about 100 to 200 watts per meter per kelvin (W/m/K).

17. The method of any of claims 10 to 16, further comprising:

a ground plane is provided, wherein the substrate is located above the ground plane.

18. A microwave attenuator apparatus comprising:

providing a substrate having a thermal conductivity greater than a defined thermal conductivity level;

one or more thin film lines on a top surface of the substrate comprising an evaporated alloy; and

one or more vias in the substrate, wherein respective first ends of the one or more vias are connected to a respective thin film connector and respective second ends of the one or more vias are connected to an electrical ground.

19. The microwave attenuator apparatus of claim 18 wherein the substrate comprises a material selected from the group consisting of sapphire, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs).

20. The microwave attenuator apparatus of claim 18 or 19, wherein the one or more thin film lines comprise an alloy selected from the group consisting of copper and nickel chromium alloy (NiCr), and wherein the one or more vias comprise copper.

Technical Field

The subject disclosure relates to dissipative devices, and more particularly, to dissipative devices for use in quantum applications.

Background

The performance of superconducting-based quantum architectures may depend to a large extent on the quality state of the superconducting qubit, which state can be directly characterized by measuring the coherence time and qubit error. These times and errors can depend to a large extent on the performance of the microwave hardware at low temperatures (e.g., cryogenic temperatures). To increase the coherence time, the microwave assembly and associated control line should be heated to mitigate and/or reduce the amount of thermal noise generated from room temperature electronics.

For example, Yeh et al (U.S. patent application publication No. 2017/0257074) discusses an ultra-low temperature dissipation device "coplanar waveguide microwave attenuator configured with a center conductor between a pair of ground planes". See paragraph [0064 ]. "the dissipative device acting as an attenuator can be formed by a plurality of individual attenuator cells" as described by Yeh et al. See paragraph [0071 ]. The coupling region may be provided with capacitors (e.g., interdigitated comb fingers) that may couple input/output between adjacent cells. Please refer to the numbering (with reference characters removed for clarity). However, Yeh et al lack efficiency from both microwave and thermalization perspectives and may be difficult to implement. Furthermore, Yeh et al do not have a good tradeoff between thermal and microwave performance.

Accordingly, there is a need in the art to address the foregoing problems.

Disclosure of Invention

Viewed from a first aspect, the present invention provides an apparatus comprising: a substrate providing a level of thermal conductivity greater than a defined level of thermal conductivity; one or more thin film lines on a top surface of the substrate comprising an evaporated alloy; one or more vias in the substrate, wherein respective first ends of the one or more vias are connected to a respective thin film connector and respective second ends of the one or more vias are connected to an electrical ground.

Viewed from a first aspect, the present invention provides a method comprising: evaporating an alloy on a top surface of a substrate to form one or more thin film lines, wherein the substrate provides a level of thermal conductivity greater than a specified thermal conductivity; forming one or more through holes in the substrate; connecting respective first ends of the one or more through-holes to respective thin-film connectors; and electrically grounding respective second ends of the one or more vias.

Viewed from a first aspect, the present invention provides a microwave attenuator apparatus comprising: a substrate providing a level of thermal conductivity greater than a defined level of thermal conductivity; one or more thin film lines on a top surface of the substrate comprising an evaporated alloy; one or more vias in the substrate, wherein respective first ends of the one or more vias are connected to a respective thin film connector and respective second ends of the one or more vias are connected to an electrical ground.

The following presents a simplified summary in order to provide a basic understanding of one or more embodiments of the invention. This summary is not intended to identify key or critical elements or to delineate any scope of the particular embodiments or any scope of the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that is presented later. In one or more embodiments described herein, systems, computer-implemented methods, apparatus, devices, and/or computer program products are provided in connection with microwave attenuators on high thermal conductivity substrates for quantum applications.

According to one embodiment, an apparatus is provided that may include a substrate that provides a level of thermal conductivity that is greater than a defined level of thermal conductivity. The apparatus may also include one or more thin film lines on the top surface of the substrate, the thin film lines including a vaporized alloy. Furthermore, the device may comprise one or more through holes in said substrate. Each first end of the one or more through holes may be connected to a respective thin film connector. Respective second ends of the one or more vias may be connected to an electrical ground. According to one implementation, the device may be a microwave attenuator device that may be used in low temperature environments.

In an example, the substrate may include a material selected from sapphire, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs). In another example, the substrate may have a thermal conductivity level in a range of about 100 to about 200 watts per meter per degree kelvin (W/m/K). Further, the apparatus may include a ground plane, wherein the substrate is above the ground plane.

According to an embodiment, the one or more thin film wires may comprise an alloy selected from the group consisting of copper and nickel chromium alloy (NiCr). In one example, the one or more thin film lines may include an alloy that may include seventy percent nickel and thirty percent chromium.

According to one implementation, the one or more vias may include copper. In an example, the device may include one or more resistors. Further, the thin film connection and the one or more vias remove hot electrons from the one or more resistors. Further, the apparatus may include a ground plane, wherein the substrate is above the ground plane.

Another embodiment relates to a method comprising evaporating an alloy on a top surface of a substrate to form one or more thin film lines. The substrate may provide a thermal conductivity level that is greater than a defined thermal conductivity level. The method may further include forming one or more vias in the substrate. Further, the method may include connecting respective first ends of the one or more through-holes to respective thin-film connectors. The method may also include electrically grounding respective second ends of the one or more vias.

In one embodiment, the substrate may include a material selected from the group consisting of sapphire, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs).

In an example, the thermal conductivity level of the substrate can be in a range of about 100 to about 200 watts per meter per kelvin (W/m/K). According to another example, the method may include providing a ground plane, wherein the substrate is located above the ground plane.

According to one example, evaporating the alloy on the top surface of the substrate may include evaporating a material selected from a group including copper and nickel chromium alloy (NiCr) to form the one or more thin film lines. In another example, evaporating the alloy on the top surface of the substrate may include evaporating an alloy including about seventy percent nickel and about thirty percent chromium. In another example, the method may include evaporating copper within the one or more vias.

According to one example, the method may include forming one or more resistors on the substrate. Further to the example, the one or more thin film connectors and the one or more vias may remove hot electrons from the one or more resistors. According to some examples, the method may include providing a ground plane, wherein the substrate is located above the ground plane.

Another embodiment relates to a microwave attenuator apparatus that may include a substrate that may provide a level of thermal conductivity that is greater than a defined level of thermal conductivity. The microwave attenuator apparatus may further include one or more thin film lines on the top surface of the substrate, the thin film lines including a vaporized alloy. Furthermore, the microwave attenuator device may comprise one or more through holes in the substrate. Each first end of the one or more through holes may be connected to a respective thin film connector. Further, respective second ends of the one or more vias may be connected to an electrical ground.

In one embodiment, the substrate may include a material selected from the group consisting of sapphire, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs). Alternatively or additionally, the one or more thin film wires may comprise an alloy selected from the group consisting of copper and nickel chromium alloy (NiCr). The one or more vias may include copper.

Advantages of various aspects provided herein include, for example, improved thermalization due to the higher thermal conductivity of the substrate. Another advantage includes higher thermal conductivity in the substrate. Another advantage of reducing joule heating from the resistance is the presence of the heat sink.

Drawings

The invention will now be described, by way of example only, with reference to preferred embodiments, as illustrated in the following figures:

fig. 1 shows a schematic diagram of a side cross-sectional view of a cryostat that may be used in quantum computing applications, according to one or more embodiments described herein.

Fig. 2 shows an exemplary non-limiting microwave design for an attenuator according to one or more embodiments described herein.

Fig. 3 illustrates an exemplary non-limiting microwave design of another attenuator according to one or more embodiments described herein.

FIG. 4 illustrates an enlarged view of a portion of the attenuator of FIG. 3 in accordance with one or more embodiments described herein.

FIG. 5 illustrates an exemplary, non-limiting graph for a microwave simulation of the attenuator design of FIG. 2 according to one or more embodiments described herein.

FIG. 6 illustrates an exemplary, non-limiting graph of a microwave simulation of time domain reflectometry parameters for the attenuator design of FIG. 2, according to one or more embodiments described herein.

FIG. 7 illustrates an exemplary, non-limiting graph of a microwave simulation for the attenuator design of FIG. 3, according to one or more embodiments described herein.

FIG. 8 illustrates an exemplary, non-limiting graph of a microwave simulation of time domain reflectometry parameters for the attenuator design of FIG. 3, according to one or more embodiments described herein.

FIG. 9 shows a flow diagram of an exemplary non-limiting method of fabricating a microwave attenuator on a high thermal conductivity substrate for quantum applications, according to one or more embodiments described herein.

FIG. 10 illustrates a block diagram of an example non-limiting operating environment in which one or more embodiments described herein can be facilitated.

Detailed Description

The following detailed description is merely illustrative and is not intended to limit the embodiments and/or the application or uses of the embodiments. Furthermore, there is no intention to be bound by any expressed or implied information presented in the preceding "background" or "abstract" sections or "detailed description" sections.

One or more embodiments are now described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. It may be evident, however, that one or more embodiments may be practiced without these specific details in various instances.

Quantum computing employs quantum physics to encode information rather than transistor-based binary digital techniques. For example, a quantum computer may employ qubits (e.g., qubits) that operate according to the superposition principles of quantum physics and the entanglement principles of quantum physics. The superposition principle of quantum physics allows individual qubits to represent both a value "1" and a value "0". The entanglement principle of the quantum physical states correlates qubits in a superposition. For example, the state of a first value (e.g., a value of "1" or a value of "0") may depend on the state of a second value. Thus, quantum computers may use qubits to encode information, rather than binary digital techniques based on the use of transistors.

Embodiments described herein include apparatus, systems, methods, computer-implemented methods, computer program products, and products that can better and faster thermalize microwave assemblies and cleaner microwave signals by utilizing attenuator designs that include high thermal conductivity materials. In particular, one or more of the various aspects can facilitate better thermalization of microwave control lines (e.g., coaxial cables) as compared to conventional techniques. Better thermalization may provide longer coherence times, which may improve the overall performance of quantum computers and quantum processors. Further, one or more of the various aspects may facilitate cleaner microwave control pulses by mitigating and/or reducing the number of reflection points in a manner that minimizes and/or reduces unnecessary microwave connections (not always matched to a 50 ohm impedance). In addition, the present disclosure provides for more efficient removal of hot electrons from the control line through larger copper lines and copper vias incorporating attenuator designs. Thus, as will be discussed in further detail below, one or more aspects provided herein may perform better in both thermalization and microwave response than conventional techniques, in part due to the use of materials with high thermal stability, electrical conductivity, and precise design.

In more detail, for quantum processors, information may be input into the qubits to perform a computational function that may be performed if the qubits are in a stacked state. Although the superimposition state is fragile, it should last as long as possible. However, the superimposed state disappears and disappears due to thermal fluctuations propagating down the coaxial cable, as will be discussed in detail below.

Fig. 1 shows a schematic diagram of a side cross-sectional view of a cryostat 100 that may be used in quantum computing applications, according to one or more embodiments described herein. A "cryostat" is a device for maintaining cryogenic temperatures, and more specifically, for maintaining a quantum computing processor at cryogenic temperatures. Although discussed with respect to quantum applications, the disclosed aspects may be used with other cryogenic applications.

As shown, cryostat 100 may include an outer container 102, which outer container 102 may house one or more nestable plates (e.g., a refrigerator) to gradually lower the temperature from room temperature to the operating temperature. For example, there may be many different plates available for use in a thermalization environment (e.g., gradually lowering the temperature from room temperature to the operating temperature). Thus, radiant heat that may be introduced into various environments of different panels through coaxial cables may be mitigated and/or reduced.

The outer vessel 102 may be referred to as an external vacuum. Further, outer container 102 may be at room temperature (e.g., about 300 degrees kelvin (300 ° K), about 80 degrees fahrenheit (80 ° F), or about 27 degrees celsius (27 ℃)), and thus, may be referred to as a 300 kelvin plate. The plate nested within the outer container 102 may be in the form of a cylinder, which may be approximately two feet in diameter, although other shapes and/or diameters may also be used. Five plates are shown, namely a first plate 104, a second plate 106, a third plate 108, a fourth plate 110 and a fifth plate, referred to as a mixing chamber plate 112. One or more plates may be made of: according to one implementation. Although five plates are shown and described, various embodiments may utilize less than five plates, or greater than five plates, depending on the implementation.

The first plate 104 may be used to reduce the temperature from room temperature (e.g., the temperature of the outer vessel 102) to about 50 ° K. Thus, the first plate 104 may have a temperature of 50 ° K and may also be referred to as a 50 kelvin temperature plate. The second plate 106 may be utilized to reduce the temperature from 50 ° K to about 3 ° K (referred to as a 3 kelvin temperature plate). The third plate 108 may be used to reduce the temperature from 3 ° K to about 1 ° K (or about 0.71 ° K), and may also be referred to as a stationary plate. In addition, the fourth plate 110 may be used to reduce the temperature from about 1K to about 0.1K (100 millikelvin), and may also be referred to as a cold plate, on the mixing chamber plate 112, the temperature may be reduced from about 0.1K to about 0.01K (10 millikelvin), which may correspond approximately to-273 ℃ or-480F.

To transfer code/programs (e.g., quantum algorithms) for processing at one or more qubits 114 located in the mixing chamber plate 112, a cable 116 (or multiple cables or portions of a cable) may be utilized. The cable 116 may be, for example, a microwave cable, a coaxial cable, or other type of cable. An input signal 118 of code/program may be input at a first end of the cable 116, processing may be performed by one or more qubits 114, and an output signal 120 may be output at a second end of the cable 116.

For example, the input signal 118 may be provided by one or more devices (e.g., computers, processors, etc.) external to the cryostat 100. Thus, the one or more qubits 114 may be fixed on one or more silicon wafers or may be wire-bound for operable connection to one or more external devices. The cables 116 may facilitate connection between one or more external devices, and the cables 116 may pass through the respective plates (e.g., the first plate 104, the second plate 106, the third plate 108, the fourth plate 110, and the mixing chamber plate 112).

In more detail, the cable 116 may be inserted into the outer container 102 (e.g., at a first end of the cable) through an opening formed in the outer container 102 and attached with a connector. The cables 116 may pass through the nested layers (e.g., the first plate 104, the second plate 106, the third plate 108, the fourth plate 110, and the mixing chamber plate 112) through corresponding holes cut in each layer. The cable 116 may also be connected at a different device, such as a first attenuator device 122₁A second attenuator device 122₂A third attenuator device 122₃One or more other attenuator devices, and/or one or more qubits 114. Furthermore, the cable 116 may be routed back through nested layers (e.g., the mixing chamber plate 112, the fourth plate 110, the third plate 108, the second plate 106, and the first plate 104) and out through another opening formed in the outer vessel 102 (e.g., at a second end of the cable).

According to some embodiments, the cable 116 may be divided into multiple portions. For example, a first portion of a cable having connectors at both ends may be placed between the outer vessel 102 (e.g., a 300 kelvin temperature board) and the first board 104 (e.g., a 50 kelvin temperature board). A second portion of the cable has connectors at both ends that can be placed between the first plate 104 and the second plate 106 (e.g., a 3 kelvin board). A third portion of the cable with connectors at both ends may be placed between the second plate 106 and the third plate 108 (e.g., a stationary plate). A fourth portion of the cable with connectors at both ends may be placed between the third plate 108 and the fourth plate 110 (e.g., a cold plate). Furthermore, a fifth portion of the cable may be placed between the fourth plate 110 and the mixing chamber plate 112.

To attach portions of the cable 116, the attenuator (e.g., the first attenuator device 122)₁The second attenuator device 122₂The third attenuator device 122₃And/or other attenuator devices) may be operably attached (e.g., securely anchored) within (or directly to) the one or more panels. Thus, the entire chain of cables 116 may be connected to one or more qubits 114 through a plate.

To facilitate the connection of the cables between the boards, corresponding microwave connectors may be utilized at the one or more connection points. According to one aspect, the microwave connector may be an SMA (subminiature a) connector. However, other types of connectors may be used with one or more aspects discussed herein. Since the cable 116 passes through one or more plates, the connector should be heated appropriately so that heat does not transfer from the outer container 102 to the qubit(s) 114.

For example, due to the poor thermal conductivity of the substrate, housing, microwave connectors of different connector end types (e.g., type a and type B) (increasing the number of reflection points in the microwave line), a problem associated with conventional techniques is that the connection point (which may be a low temperature attenuator) and/or the attenuator only operate at about 77 ° K. In order to use the conventional technique for control lines for quantum processors, the attenuator should be embedded in a specially designed copper housing that is thermally anchored to the various parts of the dilution refrigerator. This adds cost and labor, in addition to the already poor thermal performance of conventional techniques. In this way, the attenuator is not properly thermalized, and thus, thermal noise from a room temperature external device may be transferred to the one or more qubits 114 via the cable 116.

Accordingly, various aspects discussed herein provide attenuators that may be attenuated to minimize and/or reduce thermal noise from room temperature electronics and down through various plates of cryostat 100. One or more attenuators provided herein. Improved thermal performance allows for better microwave hygiene. Additional details related to the attenuators provided herein will be discussed in further detail with reference to the following figures.

Although discussed with respect to a single cable (e.g., the cable 116), it should be noted that there may be more than one cable. For example, different portions of the cable may be utilized between the different layers and/or devices (e.g., attenuators, qubits, etc.). Furthermore, different portions of the cable may be formed of different materials (e.g., copper nickel (CuNi), niobium (Nb)). It should also be noted that cryostat 100 may include other devices (e.g., one or more low pass filters, one or more isolators, one or more amplifiers, one or more metal shields surrounding one or more qubits, etc.), but are not shown for simplicity.

Fig. 2 illustrates an exemplary non-limiting microwave design for an attenuator 200 according to one or more embodiments described herein. Repeated descriptions of similar elements employed in other embodiments described herein are omitted for the sake of brevity.

The attenuator 200 may be a 10 decibel (dB) value attenuator. Note that while various aspects discussed herein relate to 10dB value and/or 20dB value attenuators, the disclosed aspects are not limited to these implementations. Alternatively, other values of the attenuator (e.g., 30dB, 40dB, 50dB, etc.) can be fabricated utilizing the disclosed aspects. For example, for higher dB amounts, the disclosed aspects may be scaled linearly (e.g., by increasing the cross-shaped design accordingly). Various aspects may facilitate proper thermalization of microwave components and associated control lines to increase coherence times, thereby improving the functionality of a quantum processor.

The attenuator discussed herein may be a microwave attenuator device that may be used in low temperature environments. In connection with quantum applications, in some cases, thermal noise may increase due to joule heating in the resistor. In addition, substrates made of alumina may have poor thermal conductivity at low temperatures (e.g., low temperatures). Various aspects provided herein relate to a cross-shaped design microwave attenuator that includes a substrate having a high thermal conductivity. In addition, the heat sink may provide thermal efficiency.

The attenuator 200 may include a substrate 202, and the substrate 202 may provide a level of thermal conductivity greater than a defined level of thermal conductivity. For example, the thermal conductivity levels of alumina Tc (technetium) substrates that have traditionally been used in low temperature (e.g., quantum) environments have thermal conductivity levels of about 50 to 80W/m/K. However, according to one embodiment, the thermal conductivity level of the substrate 202 may be in the range of about 100 to about 200W/m/K. According to another example, the thermal conductivity level can have a lower limit of about 50 to 80W/m/K (e.g., alumina). According to another example, the upper limit of the thermal conductivity level may depend on the material used, which may be sapphire or may be another material with a higher thermal conductivity level. Thus, the substrate may have a thermal conductivity of about 50W/m/K or more.

The substrate 202 may include a material selected from the group consisting of sapphire, silicon, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs), or a combination thereof. In one example, the substrate may have a thickness of 1.0 millimeter or less. However, the disclosed aspects are not limited to this implementation and other dimensions may be utilized, including dimensions greater than 1.0 mm.

In one embodiment, the substrate 202 may be a sapphire substrate. The sapphire substrate may have a thermal conductivity level of about 200W/m/K. According to another embodiment, the substrate 202 may be a gallium arsenide (GaAs) substrate. The gallium arsenide substrate may have a thermal conductivity of about 100W/m/K.

The attenuator 200 may also include one or more thin film lines on the top surface of the substrate 202. As shown, the attenuator 200 may include a thin film wire 204. According to some embodiments, the thin film wire 204 may comprise an evaporated alloy. The alloy of the thin film lines 204 may be deposited (e.g., evaporated) on respective portions of the top surface of the substrate 202.

Evaporation is a technique used for thin film deposition. The source material can be evaporated in a vacuum that allows vapor particles to move directly to a target object (e.g., the substrate 202). Upon reaching the target object, the vapor particles may condense and return to a solid state.

In an example, the thin film wire 204 may include an alloy selected from a group including copper and nickel chromium alloy (NiCr). In accordance with one or more aspects, the thin film wire 204 may comprise an alloy including about seventy percent nickel and about thirty percent chromium (e.g., 70/30 NiCr). Note that the disclosed aspects are not limited to NiCr, but various metal alloys having relatively high resistivity (e.g., in the range of 100 micro-ohm centimeters (100uOhm cm)) may be used.

Additionally, the attenuator 200 may include one or more through-holes (e.g., holes) within the substrate 202. The one or more through-holes may be holes that may be formed by drilling into the substrate 202. In another example, the one or more vias may be holes that may be formed by chemically etching the substrate 202. However, the disclosed aspects may utilize other ways of forming the through-holes or vias.

The one or more vias may include a metal that may be evaporated within the holes. According to one embodiment, the metal may be copper, and thus, copper may be evaporated in the pores. The copper-filled via may be a heat spreader. The heat spreader, e.g., large copper pads and holes (e.g., vias), is electrically grounded and can effectively remove electrons. Additionally, there may be a copper ground plane beneath the substrate 202. The amount of copper evaporated in the via may be the same amount of copper, a similar amount of copper, or a different amount of copper.

The one or more vias may include respective first ends that may be substantially flush with a top surface of the substrate 202. Further, the one or more vias may include respective second ends, the second ends being electrically grounded.

For example, as shown, the attenuator 200 may include a first via 206₁And a second through hole 206₂. It is noted that although one or more through holes are shown as cylindrical, other geometries may be used for the through holes according to other embodiments. In addition, the vias on the substrate may have different shapes (e.g., a first via on the same substrate may be circular and a second via may be square).

The first through hole 206₁May include a first end 208₁And a second end 210₁. The second through hole 206₂May also include a first end 208₂And a second end 210₂. As shown, the first via 206₁First end 208 of₁And the second through hole 206₂First end 208 of₂May be substantially flush with the top surface of the substrate. The first through hole 206₁Second end 210 of₁And a second through hole 206₂Second end 210 of₂May be located within the substrate 202. In addition, the first through hole 206₁Second end 210 of₁And the second through hole 206₂Second end 210 of₂Is electrically grounded.

First film bond 214₁Can be located in the first through hole 206₁First end 208 of₁ Second film connection 214₂Can be located in the second through-hole 206₂First end 208 of₂To (3). Thus, a first end of the one or more vias may be connected to a respective membrane connection and a respective second end of the one or more vias may be connected to an electrical ground. For example, in the first through hole 206₁First end portion 208 of₁The first film connection 214₁A first connection (e.g., second end 210) which may be ground₁First via 206₁One of which is grounded (electrically grounded)). In a similar manner, at the second through hole 206₂First end portion 208 of₂Said second film connection 214₂May be a second connection to ground (e.g., the second via 206)₂Second of (2)End portion 210₂Is electrically grounded). According to an embodiment, the film connecting member (e.g., the first film connecting member 214)₁The second film connecting member 214₂) May be a pure copper film.

The attenuator 200 may include one or more resistors, shown as a first resistor 212₁A second resistor 212₂A third resistor 212₃And a fourth resistor 212₄. According to an embodiment, the first resistor 212₁A second resistor 212₂A third resistor 212₃And a fourth resistor 212₄May comprise an alloy. For example, the first resistor 212₁A second resistor 212₂A third resistor 212₃And a fourth resistor 212₄May comprise nickel chromium (NiCr). Note that the disclosed aspects are not limited to NiCr, but various metal alloys having relatively high resistivity (e.g., in the range of 100 micro-ohm centimeters (100uOhm cm)) may be used. Each film connecting member (e.g., the first film connecting member 214)₁A second film connecting member 214₂) Can be used to remove hot electrons from the resistor.

In addition, the first through hole 206 is formed₁And a second through hole 206₂May be coupled from the first resistor 212₁A second resistor 212₂A third resistor 212₃And a fourth resistor 212₄Absorbing heat. In one embodiment, the attenuator 200 may be a microwave attenuator device that may be used in low temperature environments. According to some embodiments, the attenuator 200 may include one or more control lines. In addition to these embodiments, the one or more thin film connections and the one or more vias may remove hot electrons from the one or more resistors.

According to some embodiments, the attenuator 200 may be placed in a housing. For example, the housing may have a high thermal conductivity. In one example, the enclosure may be an oxygen-free and/or electrolytic copper attenuator enclosure for improved thermalization of the refrigerator panels.

The microwave signal may propagate in the direction of arrow 216. In an example, connectors having the same end type (e.g., SMA first end type — SMA first end type microwave connectors) may be used with the disclosed aspects.

Specific information regarding an exemplary implementation of a 10dB attenuator (e.g., the attenuator 200) will be provided below. Note that the disclosed aspects are not limited to these specific details. Rather, these details are provided to facilitate understanding of the disclosed subject matter. According to an example embodiment, a first portion of the thin film line 204 (between edges of the substrate 202 (e.g., near the first location 218) and the fourth resistor 212₄May be between about 1 centimeter (cm) and about 2 cm. Similarly, a second portion of the thin film line 204 is at an opposite edge of the substrate 202 (e.g., near a second location 220) from the third resistor 212₃May be between about 1cm and about 2 cm. In addition, the first through hole 206₁And a second through hole 206₂May be about 0.55 millimeters (mm) in diameter, respectively. The first resistor 212₁And a second resistor 212₂May be about 0.79mm and may each be a resistance of about 70 ohms. In addition, a third resistor 212₃And a fourth resistor 212₄May be approximately 0.29 mm and the resistance may be 26 ohms each.

In an example, the substrate 202 may be on a ground plane. Since the transmission line used is a microstrip type transmission line, a ground plane may be used.

Fig. 3 illustrates an exemplary non-limiting microwave design of another attenuator 300 according to one or more embodiments described herein. Repeated descriptions of similar elements employed in other embodiments described herein are omitted for the sake of brevity.

The attenuator 300 may be a 20dB value attenuator. As indicated, although a 10dB value attenuator and/or a 20dB value attenuator have been shown and described herein, the disclosed aspects are not limited to these implementations. Alternatively, other attenuator values (e.g., 30dB, 40dB, 50dB, etc.) may be fabricated utilizing the disclosed aspects. For example, for higher dB amounts, the disclosed aspects may be scaled linearly (e.g., by increasing the cross-shaped design accordingly). Furthermore, as mentioned, the various aspects may facilitate proper thermalization of the microwave components and associated control lines to increase coherence time, thereby improving the functionality of the quantum processor.

The attenuator 300 may include a substrate 302, and the substrate 302 may provide a level of thermal conductivity greater than a defined level of thermal conductivity. For example, the thermal conductivity levels of alumina Tc (technetium) substrates that have traditionally been used in low temperature (e.g., quantum) environments have thermal conductivity levels of about 50 to 80W/m/K. However, according to one embodiment, the thermal conductivity level of the substrate 302 may be in the range of about 100 to about 200W/m/K. According to another example, the thermal conductivity level can have a lower limit of about 50 to 80W/m/K (e.g., alumina). According to another example, the upper limit of the thermal conductivity level may depend on the material used, which may be sapphire or may be another material with a higher thermal conductivity level. Thus, the substrate may have a thermal conductivity of about 50W/m/K or more. The substrate 302 may include a material selected from the group consisting of sapphire, silicon fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs), or combinations thereof.

The attenuator 300 may also include one or more thin film lines on the top surface of the substrate 302. As shown, the attenuator 300 may include a thin film wire 304. According to some embodiments, the thin film lines 304 may comprise evaporated alloys. The alloy of the thin film lines 304 may be deposited (e.g., evaporated) on the top surface of the substrate 302.

In an example, the thin film line 304 may include an alloy selected from the group consisting of copper and nickel chromium alloy (NiCr). In a particular example, the thin film wire 304 may include an alloy including approximately seventy percent nickel and approximately thirty percent chromium (e.g., 70/30 NiCr).

One or more through-holes may be formed in the substrate 302. For example, the substrate 302 may be etched, mechanically ground, orOne or more vias are formed in another manner. As shown in FIG. 3, the attenuator 300 may include a first via 306₁And a second via 306₂. Although the vias are illustrated as rectangular, other geometries may be used for the vias according to some embodiments.

According to an embodiment, the first through hole 306₁And a second via 306₂May include a metal, such as copper, that may be evaporated within the corresponding via (e.g., the first via 306)₁And a second via 306₂). The copper-filled via may be a heat spreader. The heat spreader, e.g., large copper pads and holes electrically connected to ground (e.g., the vias), can effectively remove electrons. Further, the respective amounts of copper evaporated in the vias may be the same amount of copper, similar amounts of copper, or different amounts of copper.

The one or more vias may include respective first ends that may be substantially flush with a top surface of the substrate. Further, the one or more vias may include second ends that are each electrically grounded. Furthermore, there may be a copper ground plane below the substrate 302.

For example, the first via 306₁May include a first end 308₁And a second end 310₁. The first end 308₁May be located on the top surface of the substrate 302, the second end 310₁May be located within the substrate 302. In addition, the second through hole 306₂May include a first end 308₂And a second end 310₂. The first end 308₂May be located on the top surface of the substrate 302 with the second end 310₂May be located within the substrate 302.

Referring also to FIG. 4, an enlarged view of a portion of the attenuator of FIG. 3 is shown, according to one or more embodiments described herein. Repeated descriptions of similar elements employed in other embodiments described herein are omitted for the sake of brevity. Different portions of the respective first portions of the vias (e.g., copper-filled heat spreaders) may be operatively connected to respective regions of the thin film lines.

The first through hole306₁First end 308 of₁First thin film connection 402 of the first portion of₁May be grounded (e.g., grounded vias). At the first through hole 306₁First end 308 of₁Second thin film connection 402 at a second portion of₂May be grounded. In addition, the second through hole 306₂First end 308 of₂Of the first portion of the first film connection 404₁May be grounded (e.g., grounded vias). At the second through hole 306₂First end portion 308 of₂The fourth membrane connection of the second portion of (a) may be connected to ground.

The attenuator may also include one or more resistors, shown as resistor 312₁、312₂、312₃、312₄、312₅、312₆、312₇And 312₈The resistor may comprise nichrome (nickel chromium). Further, the one or more heat sinks formed in the first and second through holes 3061 and 3062 may be removed from the resistor 312₁、312₂、312₃、312₄、312₅、312₆、312₇And 312₈Absorbing heat. In one embodiment, the attenuator 300 may be a microwave attenuator device that may be used in low temperature environments. According to some embodiments, the attenuator 300 may include one or more control lines. Thin film connection (e.g., first thin film connection 402)₁Second thin film connection 402₂Third thin film connection 404₁Fourth film connection 404₂) Can be used to remove hot electrons from the resistor.

According to some embodiments, the attenuator 300 may be placed in a housing. For example, the housing may have a high thermal conductivity. In one example, the enclosure may be an oxygen-free or electrolytic copper attenuator enclosure for improved thermalization of the cold panel

The microwave signal may propagate in the direction of arrow 316. In an example, connectors having the same tip type (e.g., SMA first tip type — SMA first tip type microwave connectors) may be used with the disclosed aspects.

Specific information regarding an exemplary implementation of a 20dB attenuator will be provided below. Note that the disclosed aspects are not limited to these specific details. Rather, these details are provided to facilitate understanding of the disclosed subject matter. According to an example embodiment, a first portion of the thin film line 304 is at an edge of the substrate 302 (e.g., near a first location 406) and the resistor 312₈May be between about 1 centimeter (cm) and about 2 cm. Similarly, a second portion of the thin film line 314 is at an opposite edge of the substrate 302 (e.g., near a second location 408) from the resistor 312₅The distance between₅And may be between about 1cm and about 2 cm. Further, the width of the thin film line 314 may be about 0.55 millimeters (mm). Further, the resistor 312₁、312₂、312₃And 312₄May be about 0.79mm in size. Further, the resistor 312₅、312₆、312₇And 312₈May be about 0.29 mm. Between resistors (e.g., resistor 312)₅And a resistor 312₆Resistor 312₆And between resistor 312₇And a resistor 312₈Between) may be about 0.55 mm.

In an example, the substrate 302 may be on a ground plane. Since the transmission line used is a microstrip type transmission line, a ground plane may be used.

FIG. 5 illustrates an exemplary non-limiting graph 500 for a microwave simulation of the attenuator design of FIG. 2, according to one or more embodiments described herein. Frequency 502 in GHz is shown on the horizontal axis (X-axis) and attenuation 504 in dB is shown on the vertical axis (Y-axis).

As shown in a first label block 506, a first curve 508 (e.g., bottom line) represents a microwave simulated transmission measurement (S (1,1)), and a second curve 510 (e.g., top curve) represents a microwave simulated reflection measurement (S (1, 2)). For the microwave analog transmission measurement (S (1,1)), a signal may be input on a first end (e.g., input connector) of the attenuator and a signal may be measured on a second end (e.g., output connector) of the attenuator. For the microwave analog reflection measurement (S (1,2)), a signal may be input at a first end of the attenuator, then bounce and return to the first end.

As shown in the second label box 512, the label 1(m1) associated with the second curve 510 indicates an attenuation of-10.0182 dB (Y-axis) when the frequency is 1.0GHz (X-axis). Further, as shown by the label 2(m2), in association with the second curve 510, when the frequency is 10.0GHz (X-axis), the attenuation is-9.4422 dB (Y-axis). Furthermore, as shown by the microwave simulated reflection measurement (S (1,2)) (e.g., second curve 510), the design shown may be used for frequencies from 1GHz to 10 GHz.

FIG. 6 illustrates an exemplary non-limiting graph 600 of a microwave simulation of time domain reflectometry (time domain reflectometry) parameters for the attenuator design of FIG. 2, according to one or more embodiments described herein. Time 602 in nanoseconds (ns) is shown on the horizontal axis (X-axis) and impedance 604 in dB is shown on the vertical axis (Y-axis).

As shown in the label block 606, a first line 608 represents a first analog Time Domain Reflectometry (TDR) parameter and a second line 610 represents a second analog TDR parameter. TRD involves testing the impedance provided by various portions of the device under test (e.g., the attenuator 200 of fig. 2).

The lines (e.g., first line 608 and second line 610) show the characteristic impedance of the transmission line (in this case the attenuator) as a function of time (assuming that a signal travels back and forth over the attenuator during this time). TDR is a standard measurement/simulation used to estimate the characteristic impedance of microwave applications. As shown in fig. 6, the 10dB attenuator designs provided herein can have a stable characteristic impedance approaching the desired 50 ohm level.

FIG. 7 illustrates an exemplary non-limiting graph 700 for a microwave simulation of the attenuator design of FIG. 3, according to one or more embodiments described herein. The frequency 702 in GHz is shown on the horizontal axis (X-axis) and the attenuation 704 in dB is shown on the vertical axis (Y-axis).

The first label box 706 indicates that a first curve 708 (e.g., the bottom curve) represents a microwave simulated transmission measurement (S (1,1)), and a second curve 710 (e.g., the top curve) represents a microwave simulated reflection measurement (S (1, 2)).

As shown in the second label box 712, a label 1(m1) associated with the second curve 710 indicates an attenuation of-20.0344 dB (Y-axis) when the frequency is 1.0GHz (X-axis). Further, as shown by the label 2(m2), in association with the second curve 710, the attenuation is-19.2340 dB (Y-axis) when the frequency is 10.0GHz (X-axis). Furthermore, the design shown may be used for frequencies from 1GHz to 10GHz, as shown by the microwave simulated reflection measurement (S (1,2)) (e.g., second curve 710).

FIG. 8 illustrates an exemplary non-limiting graph 800 of a microwave simulation of time domain reflectometry parameters for the attenuator design of FIG. 3, according to one or more embodiments described herein. Time 802 in nanoseconds (ns) is shown on the horizontal axis (X-axis) and attenuation 804 in dB is shown on the vertical axis (Y-axis).

As shown in the label block 806, a first line 808 represents a first analog Time Domain Reflectometry (TDR) parameter and a second line 810 represents a second analog TDR parameter. TRD involves testing the impedance provided by various portions of the device under test (e.g., attenuator 300 of fig. 3).

The lines (e.g., the first line 808 and the second line 810) show the characteristic impedance of the transmission line (in this case the attenuator) as a function of time (assuming that the signal travels back and forth over the attenuator during this time). TDR is a standard measurement/simulation used to estimate the characteristic impedance of microwave applications. As shown in fig. 8, the 20dB attenuator design provided herein can have a stable characteristic impedance approaching the desired 50 ohm level.

Fig. 9 shows a flow diagram of an exemplary non-limiting method 900 according to one or more embodiments described herein, the method 900 fabricating a microwave attenuator on a high thermal conductivity substrate for quantum applications. Repeated descriptions of similar elements employed in other embodiments described herein are omitted for the sake of brevity.

The method 900 begins at 902 when an alloy may be evaporated on a top surface of a substrate (e.g., substrate 202, substrate 302) to form one or more thin film lines (e.g., thin film line 204, thin film line 304). According to some embodiments, evaporating alloy on the top surface of the substrate may include evaporating a material selected from a group including copper and nickel chromium alloy (NiCr) to form one or more thin film lines. In one example, evaporating an alloy on the top surface of the substrate may include evaporating an alloy including about seventy percent nickel and about thirty percent chromium.

The substrate may provide a level of thermal conductivity that is greater than a defined level of thermal conductivity. In one example, the substrate may have a thermal conductivity level in the range of about 100 to 200W/m/K. However, in some embodiments, the substrate can have a thermal conductivity level of 50W/m/K or more. In another example, the substrate may have a thickness of 1.0 millimeter or less. However, the disclosed aspects are not limited to this implementation and other dimensions may be utilized, including dimensions greater than 1.0 mm. In yet another example, the substrate may include a material selected from sapphire, fused silica, quartz, magnesium oxide (MgO), and gallium arsenide (GaAs).

At 904, one or more vias (e.g., the first via 206) can be formed in the substrate₁A second through hole 206₂A first via 306₁A second through hole 306₂). At 906, a first end (e.g., the first end 208) of each of the one or more vias₁A first end 208₂A first end 308₁A first end 308₂) May be connected to a corresponding film connector. Further, respective second ends of the one or more vias (e.g., the second end 210) are coupled 908₁A second end 210₂A second end 310₁A second end 310₂) Is electrically grounded. According to some embodiments, copper may be evaporated within one or more vias.

As discussed herein, a dissipative apparatus in the form of a microwave attenuator is provided that can reduce and/or mitigate signal amplitude, reduce and/or mitigate thermal noise, and thermalize conductors in one or more stages (e.g., plates) in the dilution refrigerator (e.g., cryostat 100). The disclosed aspects provide a thermally aware microwave attenuator for quantum applications. The microwave attenuator design may reduce and/or mitigate thermal noise and optimize thermalization in dilution refrigerators for quantum applications while maintaining the latest microwave response state of the attenuator.

The various aspects include a self-contained microwave attenuator for low temperature applications on high thermal conductivity substrates. In addition, microstrip lines and thick (e.g., about 0.5mm to about 1mm) conductors, which can be applied to transmission lines and heat sinks, can be used. In addition, an improved design from a microwave and thermal perspective is provided. Microstrip lines may improve microwave signals and/or avoid slot line modes. The heat sink may rely on thermal conduction in addition to the electron-phonon coupling. Further, the attenuator design may be used over a temperature range of, for example, about 1 ° K to about 100 ° K.

For simplicity of explanation, the methods or computer-implemented methods are described and depicted as a series of acts. It is to be understood and appreciated that the subject innovation is not limited by the acts illustrated and/or by the order of acts, for example acts can occur in various orders and/or concurrently, and with other acts not presented and described herein. Moreover, not all illustrated acts may be required to implement a computer-implemented method in accordance with the disclosed subject matter. In addition, those skilled in the art will understand and appreciate that a computer-implemented method could alternatively be represented as a series of interrelated states via a state diagram or events. Additionally, it should be further appreciated that the computer-implemented methods disclosed hereinafter and throughout the specification are capable of being stored on an article of manufacture to facilitate transporting and transferring such computer-implemented methods to computers. The term "article of manufacture" as used herein is intended to encompass a computer program accessible from any computer-readable device or storage media.

In order to provide a context for the various aspects of the disclosed subject matter, FIG. 10 as well as the following discussion are intended to provide a general description of a suitable environment in which the various aspects of the disclosed subject matter may be implemented. FIG. 10 illustrates a block diagram of an example non-limiting operating environment in which one or more embodiments described herein can be facilitated. Repeated descriptions of similar elements employed in other embodiments described herein are omitted for the sake of brevity. With reference to FIG. 10, a suitable operating environment 1000 for implementing various aspects of the disclosure may also include a computer 1012. The computer 1012 also includes a processing unit 1014, a system memory 1016, and a system bus 1018. The system bus 1018 couples system components including, but not limited to, the system memory 1016 to the processing unit 1014. The processing unit 1014 can be any of various available processors. Dual microprocessors and other multiprocessor architectures also can be employed as the processing unit 1014. The system bus 1018 can be any of several types of bus structure(s) including the memory bus or memory controller, a peripheral bus or external bus, and/or a local bus using any available bus architecture including, but not limited to, Industry Standard Architecture (ISA), micro-channel architecture (MSA), extended ISA (eisa), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), card bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), Firewire (IEEE1394), and Small Computer Systems Interface (SCSI). The system memory 1016 may also include volatile memory 1020 and nonvolatile memory 1022. The basic input/output system (BIOS), containing the basic routines to transfer information between elements within the computer 1012, such as during start-up, contains the non-volatile memory 1022. By way of example, and not limitation, nonvolatile memory 1022 can include Read Only Memory (ROM), programmable ROM (prom), electrically programmable ROM (eprom), electrically erasable programmable ROM (eeprom), flash memory, or nonvolatile Random Access Memory (RAM) (e.g., ferroelectric RAM (feram)). Volatile memory 1020 can also include Random Access Memory (RAM), which acts as external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), Direct Rambus RAM (DRRAM), Direct Rambus Dynamic RAM (DRDRAM), and Rambus dynamic RAM.

Computer 1012 may also include removable/non-removable, volatile/nonvolatile computer storage media. Fig. 10 illustrates, for example a disk storage 1024. Disk storage 1024 can also include, but is not limited to, devices like a magnetic disk drive, floppy disk drive, tape drive, Jaz drive, Zip drive, LS-100 drive, flash memory device, memory card, or memory stick. Disk storage 1024 can also include storage media separately or in combination with other storage media. To facilitate connection of the disk storage devices 1024 to the system bus 1018, a removable or non-removable interface is typically used such as interface 1026. FIG. 10 also depicts software that the operating environment 1000 acts as an intermediary between users and the basic computer resources described as appropriate. Such software may also include, for example, an operating system 1028. Operating system 1028, which can be stored on disk storage 1024, acts to control and allocate resources of the computer 1012. System applications 1030 take advantage of the operating system 1028. Operating system 1028 manages resources through program modules 1032 and program data 1034 (e.g., program data stored in system memory 1016 or disk storage 1024). It is to be appreciated that the present disclosure can be implemented with various operating systems or combinations of operating systems. A user enters commands or information into the computer 1012 through one or more input devices 1036. Input devices 1036 include, but are not limited to, a pointing device such as a mouse, trackball, stylus, touch pad, keyboard, microphone, joystick, game pad, satellite dish, scanner, TV tuner card, digital camera, digital video camera, web camera, and the like. These and other input devices connect to the processing unit 1014 through the system bus 1018 via interface port(s) 1138. Interface port(s) 1038 include, for example, a serial port, a parallel port, a game port, and a universal port, a serial bus (USB). The output device 1040 uses some of the same type of port as the input device 1036. Thus, for example, a USB port may be used to provide input to computer 1012, and to output information from computer 1012 to an output device 1040. Output adapter 1042 is provided to illustrate that there are some output devices 1040 like monitors, speakers, and printers. In other output devices 1040, special adapters are required. By way of example, and not limitation, the output adapters 1042 include video and sound cards that provide a means of connection between the output device 1040 and the system bus 1018. It should be noted that other devices and/or systems of devices provide both input and output functionality, such as remote computer(s) 1044.

Computer 1012 can operate in a networked environment using logical connections to one or more remote computers, such as remote computer(s) 1044. The remote computer(s) 1044 can be a computer, a server, a router, a network PC, a workstation, a microprocessor based appliance, a peer device or other common network node and the like, and typically can include many or all of the elements described relative to computer 1012. For purposes of brevity, only a memory storage device 1046 is illustrated with remote computer(s) 1044. Remote computer(s) 1044 is logically connected to computer 1012 through a network interface 1048 and then physically connected via communication connection 1050. Network interface 1048 encompasses wire and/or wireless communication networks such as local-area networks (LAN), wide-area networks (WAN), cellular networks, and the like. LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), ethernet, token ring, and the like. WAN technologies include, but are not limited to, point-to-point links, circuit switching networks like Integrated Services Digital Networks (ISDN) and variations thereon, packet switching networks, and Digital Subscriber Lines (DSL). Communication connection(s) 1050 refers to the hardware/software employed to connect the network interface 1048 to the system bus 1018. While communication connection 1050 is shown for illustrative clarity inside computer 1012, it can also be external to computer 1012. The hardware/software for connection to the network interface 1048 also includes, for exemplary purposes only, internal and external technologies such as, modems including regular telephone grade modems, cable modems and DSL modems, ISDN adapters, and Ethernet cards.

The present invention may be a system, method, device, and/or computer program product at any possible level of integration detail. The computer program product may include a computer-readable storage medium having computer-readable program instructions thereon for causing a processor to perform various aspects of the present invention. The computer readable storage medium may be a tangible device that can hold and store the instructions for use by the instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic memory device, a magnetic memory device, an optical memory device, an electromagnetic memory device, a semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing. Computer-readable storage media as used herein is not to be construed as transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., optical pulses through a fiber optic cable), or electrical signals transmitted through electrical wires.

The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a respective computing/processing device, or to an external computer or external storage device over a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing/processing device. Computer program instructions for carrying out operations of the present invention may be assembly instructions, Instruction Set Architecture (ISA) instructions, machine related instructions, microcode, firmware instructions, state setting data, integrated circuit configuration data, or source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and procedural programming languages, such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present invention are implemented by personalizing an electronic circuit, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA), with state information of computer-readable program instructions, which can execute the computer-readable program instructions.

Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer-readable medium storing the instructions comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.

The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

While the subject matter has been described above in the general context of computer-executable instructions of a computer program product that runs on one or more computers, those skilled in the art will recognize that the disclosure also may be, or may be implemented in combination with, other program modules. Generally, program modules include routines, programs, components, data structures, etc. that perform particular tasks and/or implement particular abstract data types. Moreover, those skilled in the art will appreciate that the computer-implemented methods of the invention may be practiced with other computer system configurations, including single-processor or multiprocessor computer systems, minicomputers, mainframe computers, as well as hand-held computers, computing devices (e.g., PDAs, telephones), microprocessor-based or programmable consumer or industrial electronics, and the like. The illustrated aspects may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. However, some, if not all aspects of the disclosure may be practiced on stand-alone computers. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

As used in this application, the terms "component," "system," "platform," "interface," and the like may refer to and/or may comprise a computer-related entity or entities related to a computer. An operable machine having one or more specific functions. The entities disclosed herein may be hardware, a combination of hardware and software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a server and the server can be a component. One or more components can reside within a process and/or thread of execution and a component may be localized on one computer and/or distributed between two or more computers. In another example, various components can execute from various computer readable media having various data structures stored thereon. The components may communicate via local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network). As a connection to the internet via signals to other systems. As another example, a component may be a device having a particular function provided by a mechanical part operated by an electrical or electronic circuit, the mechanical part being operated by a software or firmware application executed by a processor. In this case, the processor may be internal or external to the device and may execute at least a portion of a software or firmware application. As yet another example, a component may be a device that provides specific functionality through an electronic component without mechanical parts, where the electronic component may include a processor or other device to execute software or firmware that imparts, at least in part, functionality to the electronic component. In an aspect, a component may simulate an electronic component via a virtual machine, for example, within a cloud computing system.

In addition, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless specified otherwise, or clear from context, "X employs A or B" is intended to mean any of the natural inclusive permutations. That is, if X employs A; b is used as X; or X employs both A and B, then "X employs A or B" is satisfied under any of the foregoing circumstances. In addition, the articles "a" and "an" as used in the subject specification and drawings should generally be construed to mean "one or more" unless specified otherwise or clear from context to be directed to a singular form. As used herein, the terms "example" and/or "exemplary" are used to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by these examples. Additionally, any aspect or design described herein as "exemplary" and/or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent exemplary structures and techniques known to those of ordinary skill in the art.

As used in this specification, the term "processor" may refer substantially to any computing processing unit or device, including, but not limited to, a single-core processor; such as a single core processor. A single processor with software multi-threaded execution capability; a multi-core processor; a multi-core processor having software multi-thread execution capability; a multi-core processor having hardware multithreading; a parallel platform; and a parallel platform with distributed shared memory. Additionally, a processor may refer to an integrated circuit, an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Field Programmable Gate Array (FPGA), a Programmable Logic Controller (PLC), a Complex Programmable Logic Device (CPLD), discrete gate or transistor logic, discrete hardware components. Further, processors may utilize nanoscale architectures such as, but not limited to, molecular and quantum dot based transistors, switches, and gates, in order to optimize space usage or enhance performance of user equipment. A processor may also be implemented as a combination of computing processing units. In this disclosure, terms such as "store," data store, "" database, "and substantially any other information storage component related to the operation and function of the component are used to refer to" memory. A component, an entity included in a "memory" or a component that includes storage. It will be appreciated that the memory and/or memory components described herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of illustration, and not limitation, nonvolatile memory can include Read Only Memory (ROM), programmable ROM (prom), electrically programmable ROM (eprom), electrically erasable ROM (eeprom), flash memory, or nonvolatile Random Access Memory (RAM) (e.g., ferroelectric RAM (feram)). Volatile memory can include RAM, which can serve as external cache, for example. By way of illustration and not limitation, RAM is available in many forms, such as Synchronous RAM (SRAM), Dynamic RRAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), Direct Rambus RAM (DRRAM), Direct Rambus Dynamic RAM (DRDRAM), and Rambus Dynamic RAM (RDRAM). Additionally, the memory components of systems or computer-implemented methods disclosed herein are intended to comprise, without being limited to, these and any other suitable types of memory.

What has been described above includes examples of systems and computer-implemented methods only. It is, of course, not possible to describe every conceivable combination of components or computer-implemented methods for purposes of describing the present disclosure, but one of ordinary skill in the art may recognize that many further combinations and permutations of the present disclosure are possible. Furthermore, to the extent that the terms "includes," "has," and the like are used in the detailed description, claims, appendices, and drawings, these terms are intended to be interpreted as "including" as similar to the term "comprising" as "comprising" is interpreted when employed as a transitional word in a claim. The description of the various embodiments has been presented for purposes of illustration, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope of the described embodiments. The terms used herein were chosen in order to best explain the principles of the embodiments, the practical application or technical improvements of the technology found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.