阅读说明：本技术 实时时钟模块、电子设备以及移动体 (Real-time clock module, electronic apparatus, and moving object ) 是由 松崎赏 于 2020-02-19 设计创作，主要内容包括：提供实时时钟模块、电子设备以及移动体,针对所输入的电源的电压值的变化,能够降低实时时钟模块的内部电压的电压值暂时发生变化的可能性。实时时钟模块具有：开关电路,其与被施加第1电源电压的第1节点以及被施加第2电源电压的第2节点电连接,对是输出第1电源电压还是输出第2电源电压进行切换；电源检测电路,其检测第1电源电压的电压值；开关控制电路,其根据电源检测电路的输出,对开关电路的切换进行控制；恒压电路,其根据开关电路的输出来输出恒压信号；以及电流控制电路,其对供给到恒压电路的电流进行控制,在开关控制电路对开关电路进行切换的情况下,电流控制电路使供给到恒压电路的电流增加。(Provided are a real-time clock module, an electronic apparatus, and a moving object, wherein the possibility that the voltage value of the internal voltage of the real-time clock module temporarily changes in response to a change in the voltage value of an input power supply can be reduced. The real-time clock module has: a switching circuit electrically connected to a 1 st node to which a 1 st power supply voltage is applied and a 2 nd node to which a 2 nd power supply voltage is applied, and switching whether to output the 1 st power supply voltage or the 2 nd power supply voltage; a power supply detection circuit which detects a voltage value of the 1 st power supply voltage; a switch control circuit that controls switching of the switch circuit based on an output of the power supply detection circuit; a constant voltage circuit that outputs a constant voltage signal according to an output of the switching circuit; and a current control circuit that controls the current supplied to the constant voltage circuit, wherein the current control circuit increases the current supplied to the constant voltage circuit when the switch control circuit switches the switch circuit.)

1. A real time clock module having:

a 1 st node to which a 1 st power supply voltage is applied;

a 2 nd node to which a 2 nd power supply voltage is applied;

a switching circuit electrically connected to the 1 st node and the 2 nd node, and configured to switch between outputting the 1 st power supply voltage and outputting the 2 nd power supply voltage;

a power supply detection circuit that detects a voltage value of the 1 st power supply voltage;

a switch control circuit that controls switching of the switch circuit based on an output of the power supply detection circuit;

a constant voltage circuit that outputs a constant voltage signal according to an output of the switching circuit; and

a current control circuit that controls a current supplied to the constant voltage circuit,

the current control circuit increases the current supplied to the constant voltage circuit when the switch control circuit switches the switch circuit.

2. The real time clock module of claim 1,

the switch control circuit switches the switch circuit after the current control circuit increases the current supplied to the constant voltage circuit.

3. A real time clock module according to claim 1 or 2,

the real-time clock module is provided with a 1 st power-on reset circuit, the 1 st power-on reset circuit outputs a 1 st reset signal to the switch control circuit and the current control circuit,

the constant voltage signal is input to the 1 st power-on-reset circuit.

4. The real time clock module of claim 1,

the constant voltage circuit includes: a 1 st transistor which controls a supplied current; and a 2 nd transistor having a driving capability larger than that of the 1 st transistor,

the current control circuit controls the 1 st transistor and the 2 nd transistor to be on when the current supplied to the constant voltage circuit is increased,

the current control circuit controls the 1 st transistor to be on and the 2 nd transistor to be off without increasing the current supplied to the constant voltage circuit.

5. The real time clock module of claim 4,

the real-time clock module has a 2 nd power-on reset circuit, the 2 nd power-on reset circuit outputs a 2 nd reset signal according to a voltage value of the 1 st power supply voltage,

the current control circuit controls a current supplied to the constant voltage circuit according to the 2 nd reset signal.

6. An electronic device having a real time clock module as claimed in any one of claims 1 to 5.

7. A moving body having the real-time clock module according to any one of claims 1 to 5.

Technical Field

The invention relates to a real-time clock module, an electronic apparatus, and a moving object.

Background

A real-time clock module is a circuit having a clock function, and is incorporated in various electronic devices such as a personal computer. In general, it is required that the timekeeping function incorporated in the real-time clock module continues to operate even when the main power supply is not supplied to the electronic device or when the main power supply is temporarily not supplied due to an instantaneous power failure or the like. Therefore, the electronic apparatus is provided with a circuit for switching the power supply of the real-time clock module to the backup power supply when the interruption of the main power supply is detected.

For example, patent document 1 discloses a real-time clock device having a main power supply and a backup power supply, which can be quickly switched to the backup power supply when the main power supply is shut off.

Patent document 1: japanese patent laid-open publication No. 2014-017965

However, when the power supply of the real-time clock module is switched, the voltage value of the power supply input to the real-time clock module changes before and after the switching due to the potential difference between the main power supply and the backup power supply. When the internal constant voltage circuit of the real-time clock module that generates the internal voltage cannot follow such a change in the voltage value of the power supply input to the real-time clock module, the voltage value of the internal voltage may temporarily change.

Disclosure of Invention

One embodiment of a real-time clock module according to the present invention includes:

a 1 st node to which a 1 st power supply voltage is applied;

a 2 nd node to which a 2 nd power supply voltage is applied;

a switching circuit electrically connected to the 1 st node and the 2 nd node, and configured to switch between outputting the 1 st power supply voltage and outputting the 2 nd power supply voltage;

a power supply detection circuit that detects a voltage value of the 1 st power supply voltage;

a switch control circuit that controls switching of the switch circuit based on an output of the power supply detection circuit;

a constant voltage circuit that outputs a constant voltage signal according to an output of the switching circuit; and

a current control circuit that controls a current supplied to the constant voltage circuit,

the current control circuit increases the current supplied to the constant voltage circuit when the switch control circuit switches the switch circuit.

In one embodiment of the real-time clock module, the real-time clock module may further include a clock signal generator,

the switch control circuit switches the switch circuit after the current control circuit increases the current supplied to the constant voltage circuit.

In one embodiment of the real-time clock module, the real-time clock module may further include a clock signal generator,

the real-time clock module has a 1 st power-on reset circuit, the 1 st power-on reset circuit outputs a 1 st reset signal to the switch control circuit and the current control circuit,

the constant voltage signal is input to the 1 st power-on-reset circuit.

In one embodiment of the real-time clock module, the real-time clock module may further include a clock signal generator,

the constant voltage circuit includes: a 1 st transistor which controls a supplied current; and a 2 nd transistor having a driving capability larger than that of the 1 st transistor,

the current control circuit controls the 1 st transistor and the 2 nd transistor to be on when the current supplied to the constant voltage circuit is increased,

the current control circuit controls the 1 st transistor to be on and the 2 nd transistor to be off without increasing the current supplied to the constant voltage circuit.

In one embodiment of the real-time clock module, the real-time clock module may further include a clock signal generator,

the real-time clock module has a 2 nd power-on reset circuit, the 2 nd power-on reset circuit outputs a 2 nd reset signal according to a voltage value of the 1 st power supply voltage,

the current control circuit controls a current supplied to the constant voltage circuit according to the 2 nd reset signal.

One embodiment of the electronic device according to the present invention includes one embodiment of the real-time clock module.

One embodiment of the mobile object of the present invention includes one embodiment of the real-time clock module.

Drawings

Fig. 1 is a diagram showing the configuration of a real-time clock module according to embodiment 1.

Fig. 2 is a diagram showing the structure of the switch circuit.

Fig. 3 is a diagram showing the structure of the voltage detection circuit.

Fig. 4 is a diagram showing the structures of the constant current circuit and the control voltage output circuit.

Fig. 5 is a diagram showing the structure of the oscillation circuit.

Fig. 6 is a flowchart for explaining the operation of the real-time clock module when the voltage value of the voltage VDD increases from the state where the voltage value of the voltage VDD is lower than the threshold voltage VR 2.

Fig. 7 is a flowchart for explaining the operation of the real-time clock module when the voltage value of the voltage VDD decreases from the state where the voltage value of the voltage VDD exceeds the threshold voltage VR 1.

Fig. 8 is a timing chart for explaining an operation in a case where voltage VDD supplied to the real-time clock block becomes a voltage having a voltage value lower than the voltage value of voltage VBAT and higher than threshold voltage VR 1.

Fig. 9 is a timing chart for explaining an operation in a case where voltage VDD supplied to the real-time clock block becomes a voltage having a voltage value higher than the voltage value of voltage VBAT and higher than threshold voltage VR 1.

Fig. 10 is a diagram showing the configuration of the real-time clock module according to embodiment 2.

Fig. 11 is a flowchart for explaining the operation of the real-time clock module in the case where the voltage value of voltage VDD increases from the state where the voltage value of voltage VDD is lower than threshold voltage VR2 in the real-time clock module according to embodiment 2.

Fig. 12 is a timing chart for explaining the operation of the real-time clock module according to embodiment 2.

Fig. 13 is a functional block diagram showing an example of the configuration of the electronic apparatus.

Fig. 14 is a diagram showing an example of an external appearance of a smartphone, which is an example of an electronic device.

Fig. 15 is a diagram illustrating an example of a moving body.

Description of the reference symbols

1: RTC module (real time clock module); 10: a switching circuit; 11. 12, 13: a transistor; 20: a power supply detection circuit; 21. 22, 23: a resistance; 24: a comparator; 25: a switch; 30: a constant current circuit; 31. 32, 33, 34: a transistor; 40: a control voltage output circuit; 41: a differential amplifier circuit; 42. 43, 44, 45, 46: a transistor; 47. 48: a capacitor; 50: a power-on reset circuit; 60: an oscillating voltage output circuit; 61: a current control circuit; 62. 63, 64, 65, 66, 67, 68, 69: a transistor; 70: an oscillation circuit; 71. 72, 73: a capacitor; 74. 75: a variable capacitance capacitor; 76. 77: a resistance; 80: a level shifter; 81. 82, 83, 84: a transistor; 85: an amplitude detection circuit; 90: a power-on reset circuit; 91: a vibrator; 92. 93: an electrode; 100: a logic circuit; 101: a switch control circuit; 102: a threshold switching control circuit; 103: a current control circuit; 210: a level shifter; 220: an output circuit; 230: a timing circuit; 240: an interface circuit; 300: an electronic device; 310: RTC module (real time clock module); 320: a CPU; 330: an operation section; 340: a ROM; 350: a RAM; 360: a communication unit; 370: a display unit; 380: a power supply unit; 390: a standby power supply unit; 400: a moving body; 410: RTC module (real time clock module); 420. 430, 440: a controller; 450: a battery; 460: and a backup battery.

Detailed Description

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. The drawings used are for ease of explanation. The embodiments described below do not limit the contents of the present invention described in the claims. Not all of the structures described below are necessarily essential components of the present invention.

1. Real-time clock module

1.1 embodiment 1

1.1.1 Structure of real-time clock Module

Fig. 1 is a diagram showing the configuration of an RTC (Real Time Clock) module 1 according to embodiment 1. The RTC module 1 has a switch circuit 10, a power supply detection circuit 20, a constant current circuit 30, a control voltage output circuit 40, a power-on reset circuit 50, an oscillation voltage output circuit 60, an oscillation circuit 70, a level shifter (L/S)80, a logic circuit 100, a level shifter (L/S)210, an output circuit 220, a timer circuit 230, and an interface (I/F) circuit 240. Terminals Vbat, Vout, Vdd, Vio, Fout, I/F _ io for connecting the RTC module 1 and the outside are provided in the RTC module 1. The RTC module 1 may be configured by omitting or changing a part of these elements or adding another element.

The RTC module 1 configured as described above operates with the voltage Vdd as the main power supply input from the terminal Vdd or the voltage Vbat as the backup power supply input from the terminal Vbat as the power supply voltage. Then, the RTC module 1 outputs a pulse signal of a predetermined frequency based on the oscillation signal OSC of a predetermined frequency outputted from the oscillation circuit 70, and generates and outputs timing data based on the pulse signal. Here, the voltage VDD may be, for example, a voltage generated based on a commercial power supply, a voltage output from a non-rechargeable primary battery, a voltage output from a rechargeable secondary battery, or the like, and the voltage VBAT may be a voltage output from the primary battery, a voltage output from the secondary battery, a voltage output from a large-capacity capacitor based on charges accumulated in the capacitor, or the like.

The switching circuit 10 receives voltages VDD and VBAT and power supply switching control signals CS1, CS2, and CS 3. The switch circuit 10 is electrically connected to the terminal Vdd and the terminal Vbat, and switches whether to output the voltage Vdd as the voltage VOUT or output the voltage Vbat as the voltage VOUT based on the power supply switching control signals CS1, CS2, and CS 3.

Here, an example of the configuration of the switch circuit 10 will be described with reference to fig. 2. Fig. 2 is a diagram showing the configuration of the switch circuit 10. As shown in fig. 2, the switching circuit 10 has transistors 11, 12, and 13. The transistors 11, 12, and 13 of the present embodiment are each described as a P-channel MOS transistor.

The power supply switching control signal CS1 is input to the gate of the transistor 11. The source of the transistor 11 is connected to the terminal Vdd. The drain of the transistor 11 is connected to the terminal Vout. The back gate of the transistor 11 is connected to the drain of the transistor 11. Thus, the transistor 11 controls the source-drain to be conductive when the power supply switching control signal CS1 of the L level is input, and controls the source-drain to be nonconductive when the power supply switching control signal CS1 of the H level is input. In the following description, a state in which the transistor 11 is on between the source and the drain is sometimes referred to as "on", and a state in which the transistor is off between the source and the drain is sometimes referred to as "off".

The power supply switching control signal CS2 is input to the gate of the transistor 12. The source of the transistor 12 is connected to the drain of the transistor 13. The drain of the transistor 12 is connected to the terminal Vout. The back gate of the transistor 12 is connected to the drain of the transistor 12. Thus, the transistor 12 controls the source-drain to be conductive when the power supply switching control signal CS2 of the L level is input, and controls the source-drain to be nonconductive when the power supply switching control signal CS2 of the H level is input. In the following description, a state in which the transistor 12 is on between the source and the drain is sometimes referred to as "on", and a state in which the transistor 12 is off between the source and the drain is sometimes referred to as "off".

The power supply switching control signal CS3 is input to the gate of the transistor 13. The source of the transistor 13 is connected to the terminal Vbat. The drain of the transistor 13 is connected to the source of the transistor 12. The back gate of the transistor 13 is connected to the source of the transistor 13. Thus, the transistor 13 controls the source-drain to be conductive when the power supply switching control signal CS3 of the L level is input, and controls the source-drain to be nonconductive when the power supply switching control signal CS3 of the H level is input. In the following description, a state in which the transistor 13 is on between the source and the drain is sometimes referred to as "on", and a state in which the transistor is off between the source and the drain is sometimes referred to as "off".

That is, the transistor 11 switches whether or not to output the voltage Vdd supplied to the terminal Vdd as the voltage VOUT to the terminal VOUT in accordance with the logic level of the power supply switching control signal CS1, and the transistors 12 and 13 switch whether or not to output the voltage Vbat supplied to the terminal Vbat as the voltage VOUT to the terminal VOUT in accordance with the logic levels of the power supply switching control signals CS2 and CS3, respectively.

As described above, the switch circuit 10 switches between outputting the voltage VDD as the voltage VOUT to the terminal VOUT and outputting the voltage VBAT as the voltage VOUT to the terminal VOUT by controlling the transistors 11, 12, and 13 in accordance with the power supply switching control signals CS1, CS2, and CS 3. The switch circuit 10 of the present embodiment outputs the voltage VDD as the voltage VOUT when the power supply switching control signals CS1, CS2, and CS3 are signals of L, H, H level, respectively, and outputs the voltage VBAT as the voltage VOUT when the power supply switching control signals CS1, CS2, and CS3 are signals of H, L, L level, respectively.

A diode having a source side as an anode and a drain side as a cathode is formed between the source and the drain of the transistor 11. Thus, when the transistor 11 is controlled to be off, the supply of current and voltage from the terminal Vout to the terminal Vdd is cut off. In other words, the transistor 11 is controlled to be off in accordance with the power supply switching control signal CS1, so that the possibility of a current flowing back to the terminal Vdd can be reduced.

A diode having a source side as an anode and a drain side as a cathode is formed between the source and the drain of the transistor 12. Thus, when the transistor 12 is controlled to be off, the supply of current and voltage from the terminal Vout to the terminal Vbat is cut off. Therefore, in the case where the transistor 12 is controlled to be off, overcharge of the voltage VBAT as the backup power supply can be prevented.

A diode having a source side as a cathode and a drain side as an anode is formed between the source and the drain of the transistor 13. Thus, when the transistor 13 is controlled to be off, the supply of current and voltage from the terminal Vbat to the terminal Vout is cut off. Therefore, when the transistor 13 is controlled to be off, wasteful power consumption in the backup power supply can be reduced.

Here, the voltage VDD is an example of the 1 st power supply voltage, and the terminal VDD to which the voltage VDD is applied is an example of the 1 st node. The voltage VBAT is an example of the 2 nd power supply voltage, and the terminal VBAT to which the voltage VBAT is applied is an example of the 2 nd node. Further, a wiring line for transmitting the voltage VDD and connecting the terminal VDD and the source of the transistor 11 is also an example of the 1 st node in a broad sense, and a wiring line for transmitting the voltage VBAT and connecting the terminal VBAT and the source of the transistor 13 is also an example of the 2 nd node in a broad sense.

In the present embodiment, as shown in fig. 2, the switching circuit 10 switches between outputting the voltage VDD as the voltage VOUT and outputting the voltage VBAT as the voltage VOUT by controlling the 3 transistors 11, 12, and 13, but the switching circuit 10 is not limited to this configuration. For example, the switching circuit 10 may be configured without the transistor 13, and switch between outputting the voltage VDD or the voltage VBAT as the voltage VOUT by controlling the transistors 11 and 12. The switching circuit 10 may not include the transistors 12 and 13, and may switch between outputting the voltage VDD or the voltage VBAT as the voltage VOUT by controlling the transistor 11.

A capacitor, not shown, is mounted on the terminal Vout. This stabilizes the voltage value of the voltage Vout generated at the terminal Vout.

Returning to fig. 1, the voltages VDD and VOUT and the threshold control signal CT are input to the power supply detection circuit 20. The power supply detection circuit 20 detects the voltage value of the voltage VDD. Then, the power supply detection circuit 20 compares the detected voltage value of the voltage VDD with a predetermined threshold value, and outputs the comparison result as a voltage detection signal VDET.

Here, an example of the configuration of the power supply detection circuit 20 will be described with reference to fig. 3. Fig. 3 is a diagram showing the configuration of the power supply detection circuit 20. The power supply detection circuit 20 includes resistors 21, 22, and 23, a comparator 24, and a switch 25. The voltage VDD is input to one end of the resistor 21. The other end of the resistor 21 is connected to one end of the resistor 22. The other end of the resistor 22 is connected to one end of the resistor 23. The other end of the resistor 23 is connected to the ground. That is, the resistors 21, 22, and 23 are connected in series.

One end of the switch 25 is connected to one end of the resistor 22, and the other end of the switch 25 is connected to the other end of the resistor 22. That is, the switch 25 is connected in parallel with the resistor 22. Then, the threshold control signal CT is input to the switch 25 as a control signal. The switch 25 switches whether to turn on or off the switch 25 in accordance with the threshold control signal CT. The switch 25 according to the present embodiment is not turned on when the H-level threshold control signal CT is input, and is turned on when the L-level threshold control signal CT is input. In the following description, the state in which the switch 25 is turned on may be referred to as "on" and the state in which the switch is turned off may be referred to as "off".

The comparator 24 operates with the voltage VOUT as an operating power source. The comparator 24 has two inputs and 1 output. One input terminal of the comparator 24 is connected to one terminal of the resistor 23. The other input terminal of the comparator 24 is inputted with a reference voltage Vref 1. Then, the comparator 24 compares the voltage values of the signals respectively input to the two input terminals, generates a voltage detection signal VDET based on the comparison result, and outputs it from the output terminal. The comparator 24 of the present embodiment is described as outputting the H-level voltage detection signal VDET when the voltage value input to one input terminal is equal to or greater than the reference voltage Vref1 input to the other input terminal, and outputting the L-level voltage detection signal VDET when the voltage value input to one input terminal is smaller than the reference voltage Vref1 input to the other input terminal.

When the supply of the voltage VDD is stopped, the voltage value input to the one input terminal of the comparator 24 is substantially the ground potential. Therefore, it is smaller than the voltage value of the reference voltage Vref1 input to the other input terminal. Therefore, the power supply detection circuit 20 outputs the voltage detection signal VDET at the L level. Although detailed later, in this case, the threshold control signal CT of the H level is input to the switch 25.

Then, the voltage VDD starts to be supplied, and the voltage value of the voltage VDD rises. As the voltage VDD rises, the voltage value input to one input terminal of the comparator 24 also rises. At this time, since the threshold control signal CT of the H level is input to the switch 25, the switch 25 is controlled to be off. Therefore, a voltage obtained by dividing the voltage VDD by the resistors 21 and 22 and the resistor 23 is input to one input terminal of the comparator 24.

Then, when the voltage value of the voltage VDD rises and the voltage value input to one input terminal of the comparator 24 is equal to or greater than the voltage value of the reference voltage Vref1 input to the other input terminal of the comparator 24, the power supply detection circuit 20 outputs the voltage detection signal VDET at the H level. Then, the threshold control signal CT input to the switch 25 is controlled to L level by setting the voltage detection signal VDET to H level. Here, the voltage value of the voltage VDD increases, and the voltage value of the voltage VDD when the voltage value input to one input terminal of the comparator 24 is equal to or greater than the voltage value of the reference voltage Vref1 input to the other input terminal of the comparator 24 is referred to as a threshold voltage VR 1.

Thereafter, when the supply of the voltage VDD is stopped, the voltage value of the voltage VDD decreases. As the voltage VDD decreases, the voltage value input to one input terminal of the comparator 24 also decreases. In this case, since the threshold control signal CT of the L level is input to the switch 25, the switch 25 is controlled to be on. Therefore, a voltage obtained by dividing the voltage VDD by the resistor 21 and the resistor 23 is input to one input terminal of the comparator 24. Thereafter, the voltage value of the voltage VDD drops, and when the voltage value input to one input terminal of the comparator 24 is lower than the voltage value of the reference voltage Vref1 input to the other input terminal of the comparator 24, the power supply detection circuit 20 outputs the voltage detection signal VDET at the L level. Then, the threshold control signal CT is controlled to the H level by setting the voltage detection signal VDET to the L level. Here, the voltage value of the voltage VDD is lowered, and the voltage value of the voltage VDD when the voltage value input to one input terminal of the comparator 24 is lower than the voltage value of the reference voltage Vref1 input to the other input terminal of the comparator 24 is referred to as a threshold voltage VR 2.

Returning to fig. 1, the voltage VOUT is input to the constant current circuit 30. Then, the constant current circuit 30 generates a current regulation signal Vg for regulating the current supplied to the control voltage output circuit 40 and the oscillation voltage output circuit 60, and outputs the current regulation signal Vg to the control voltage output circuit 40 and the oscillation voltage output circuit 60. The control voltage output circuit 40 receives a voltage VOUT, a current regulation signal Vg, and current control signals CC1 and CC 2. The control voltage output circuit 40 converts the voltage VOUT into a constant voltage VLOGIC, and outputs the voltage VLOGIC to the logic circuit 100. The oscillation voltage output circuit 60 receives the voltage VOUT, the current regulation signal Vg, and the current control signals CC1 and CC 2. The oscillation voltage output circuit 60 converts the voltage VOUT into a voltage VOSC of a constant voltage and outputs the voltage VOSC to the oscillation circuit 70.

Here, an example of the configuration of the constant current circuit 30, the control voltage output circuit 40, and the oscillation voltage output circuit 60 will be described with reference to fig. 4. Fig. 4 is a diagram showing the structures of the constant current circuit 30 and the control voltage output circuit 40. In addition, the control voltage output circuit 40 and the oscillating voltage output circuit 60 have the same configuration, and only differ in the voltage value of the reference voltage Vref2 and whether the output signal is the voltage LOGIC or the voltage VOSC. Therefore, in fig. 4, the configuration of the control voltage output circuit 40 will be described, and the description of the oscillation voltage output circuit 60 will be omitted.

The constant current circuit 30 has transistors 31, 32, 33, and 34. In the present embodiment, the transistors 31 and 32 are P-channel MOS transistors, and the transistors 33 and 34 are N-channel MOS transistors. Next, in this embodiment, the transistor 33 is a depletion transistor. Note that the transistor 31 and the transistor 32 have the same driving capability. Here, the driving capability of the transistor refers to a current flowing between the drain-source terminal in accordance with a current supplied to the gate terminal, and is determined by, for example, a shape ratio such as a W/L ratio of the transistor.

The transistor 31 and the transistor 32 constitute a current mirror circuit. Specifically, the voltage VOUT is input to the source of the transistor 31 and the source of the transistor 32. The gate and drain of the transistor 31 are commonly connected to the gate of the transistor 32. The drain of the transistor 31 is also connected to the drain of the transistor 33.

The gate and source of the transistor 33 are connected to the ground terminal. As described above, the transistor 33 is a depletion type. Therefore, a low current of, for example, about several nA flows between the drain and the source of the transistor 33, and the low current is a current when there is no potential difference between the gate and the source. Therefore, a low current of about several nA equal to the current flowing between the drain and the source of the transistor 33 flows between the source and the drain of the transistor 31 connected in series to the transistor 33 and between the transistor 31 and the source and the drain of the transistor 32 constituting the current mirror circuit. In the following description, a current flowing between the source and the drain of the transistor 31 may be simply referred to as a current flowing through the transistor 31, a current flowing between the source and the drain of the transistor 32 may be simply referred to as a current flowing through the transistor 32, and a current flowing between the drain and the source of the transistor 33 may be simply referred to as a current flowing through the transistor 33.

A drain of transistor 32 is connected to a drain and a gate of transistor 34. The source of the transistor 34 is connected to the ground terminal. Accordingly, a voltage based on the current flowing through the transistor 33 is generated at the drain and the gate of the transistor 34. Then, the constant current circuit 30 outputs a voltage generated at the drain and the gate of the transistor 34 as a current regulation signal Vg.

The control voltage output circuit 40 generates and outputs a voltage VLOGIC from the voltage VOUT which is an output of the switching circuit 10. The control voltage output circuit 40 includes a differential amplifier circuit 41 and a current control circuit 61. The differential amplifier circuit 41 includes transistors 42, 43, 44, 45, and 46, and capacitors 47 and 48. In this embodiment, the transistors 42, 43, and 46 are P-channel MOS transistors, and the transistors 44 and 45 are N-channel MOS transistors. Note that the transistor 42 and the transistor 43 are transistors having the same driving capability.

In the differential amplifier circuit 41, the transistor 42 and the transistor 43 constitute a current mirror circuit. The current mirror circuit and the transistors 44 and 45 constitute a differential pair circuit.

Specifically, the voltage VOUT is input to the source of the transistor 42 and the source of the transistor 43. The gate of the transistor 42 is commonly connected to the gate and the drain of the transistor 43. A drain of transistor 42 is connected to a drain of transistor 44. The reference voltage Vref2 is input to the gate of the transistor 44. A drain of the transistor 43 is connected to a drain of the transistor 45. A gate of transistor 45 is connected to a source of transistor 46. A source of transistor 44 is connected to a source of transistor 45. The back gate of the transistor 44 and the back gate of the transistor 45 are both connected to the ground. The drain of transistor 44 is connected to the gate of transistor 46. The voltage VOUT is input to the source of the transistor 46. A capacitor 47 is provided between the gate-drain of the transistor 46. Also, a capacitor 48 is provided between the source of the transistor 46 and the ground.

In the differential amplifier circuit 41 configured as described above, the transistors 44 and 45 are driven based on the potential difference between the reference voltage Vref2 input to the gate of the transistor 44 and the voltage VLOGIC input to the gate of the transistor 45. Then, the transistor 46 is driven in accordance with the driving of the transistors 44, 45.

Specifically, when the voltage value of the reference voltage Vref2 is larger than the voltage value of the voltage VLOGIC, the current between the drain and the source of the transistor 44 is larger than the current between the drain and the source of the transistor 45. As a result, the drain of the transistor 46 is output to the voltage VOUT side. On the other hand, when the voltage value of the reference voltage Vref2 is smaller than the voltage value of the voltage VLOGIC, the current between the drain and the source of the transistor 44 is smaller than the current between the drain and the source of the transistor 45. As a result, the drain of the transistor 46 is output to the VSS side. The differential pair circuit of the present embodiment is connected to the drain of the transistor 46 and the gate of the transistor 45. This constitutes a negative feedback circuit (negative feedback). Therefore, the differential pair circuit operates so that the difference between the voltage value of the drain of the transistor 46 and the reference voltage Vref2 becomes small. Thus, a constant voltage value is output as the voltage VLOGIC. Capacitor 47 functions as a phase compensation capacitor for suppressing VLOGIC voltage oscillation, and capacitor 48 functions as a potential maintaining capacitor for reducing voltage value variation of voltage VLOGIC due to load variation of a circuit driven by VLOGIC voltage.

The current control circuit 61 controls the current supplied to the control voltage output circuit 40. The current control circuit 61 includes transistors 62, 63, 64, 65, 66, 67, 68, 69. In this embodiment, the transistors 62, 63, 64, 65, 66, 67, 68, and 69 are each an N-channel MOS transistor.

A gate of transistor 62 is connected to a gate and a drain of transistor 34. A drain of transistor 62 is connected to a drain of transistor 44 and a drain of transistor 45. A source of transistor 62 is connected to a drain of transistor 66. The back gate of the transistor 62 is connected to the ground terminal. The current control signal CC2 is input to the gate of transistor 66. A source of the transistor 66 is connected to ground.

Among the transistors 62 and 66 connected as described above, the transistor 62 and the transistor 34 included in the constant current circuit 30 constitute a current mirror circuit. The transistor 66 switches between conduction and non-conduction between the drain and the source in accordance with a current control signal CC 2. Then, when the drain-source of the transistor 66 is controlled to be on by the current control signal CC2, a current flows between the drain and the source of the transistor 62 based on the driving capability of the transistor 62 and the current regulation signal Vg. When the drain-source of the transistor 66 is controlled to be non-conductive by the current control signal CC2, no current flows between the drain and the source of the transistor 62. In the following description, a current flowing between the drain and the source of the transistor 62 may be simply referred to as a current flowing through the transistor 62. The state in which the transistor 66 is on between the drain and the source is sometimes referred to as "on", and the state in which the transistor is off between the drain and the source is sometimes referred to as "off".

A gate of transistor 63 is connected to a gate and a drain of transistor 34. A drain of transistor 63 is connected to a drain of transistor 44 and a drain of transistor 45. A source of transistor 63 is connected to a drain of transistor 67. The back gate of the transistor 63 is connected to the ground terminal. The current control signal CC1 is input to the gate of the transistor 67. A source of the transistor 67 is connected to the ground terminal.

Of the transistors 63 and 67 connected as described above, the transistor 63 and the transistor 34 included in the constant current circuit 30 constitute a current mirror circuit. The transistor 67 is switched between conduction and non-conduction between the drain and the source in accordance with a current control signal CC 1. Then, when the drain-source of the transistor 66 is controlled to be on by the current control signal CC1, a current flows between the drain and the source of the transistor 63 based on the driving capability of the transistor 63 and the current regulation signal Vg. When the drain-source of the transistor 67 is controlled to be non-conductive by the current control signal CC1, no current flows between the drain and the source of the transistor 63. In the following description, a current flowing between the drain and the source of the transistor 63 may be simply referred to as a current flowing through the transistor 63. The state in which the transistor 67 is on between the drain and the source is sometimes referred to as "on", and the state in which the transistor is off between the drain and the source is sometimes referred to as "off".

A gate of transistor 64 is connected to a gate and a drain of transistor 34. A drain of transistor 64 is connected to a drain of transistor 46. A source of transistor 64 is connected to a drain of transistor 68. The back gate of the transistor 64 is connected to the ground terminal. The current control signal CC1 is input to the gate of transistor 68. A source of the transistor 68 is connected to ground.

Of the transistors 64 and 68 connected as described above, the transistor 64 and the transistor 34 included in the constant current circuit 30 constitute a current mirror circuit. The transistor 68 switches between conduction and non-conduction between the drain and the source in accordance with a current control signal CC 1. Then, when the drain-source of the transistor 68 is controlled to be on by the current control signal CC1, a current flows between the drain and the source of the transistor 64 based on the driving capability of the transistor 64 and the current regulation signal Vg. When the drain-source of the transistor 68 is controlled to be non-conductive by the current control signal CC1, no current flows between the drain and the source of the transistor 64. In the following description, a current flowing between the drain and the source of the transistor 64 may be simply referred to as a current flowing through the transistor 64. The state in which the transistor 68 is on between the drain and the source is sometimes referred to as "on", and the state in which the transistor is off between the drain and the source is sometimes referred to as "off".

A gate of transistor 65 is connected to a gate and a drain of transistor 34. A drain of transistor 65 is connected to a drain of transistor 46. A source of transistor 65 is connected to a drain of transistor 69. The back gate of the transistor 65 is connected to the ground terminal. The current control signal CC2 is input to the gate of the transistor 69. The source of the transistor 69 is connected to the ground terminal.

In the transistors 65 and 69 configured as described above, the transistor 65 and the transistor 34 included in the constant current circuit 30 constitute a current mirror circuit. The transistor 69 is switched between conduction and non-conduction between the drain and the source in accordance with a current control signal CC 2. That is, when the drain-source of the transistor 69 is controlled to be on by the current control signal CC2, a current flows between the drain and the source of the transistor 65 based on the driving capability of the transistor 65 and the current regulation signal Vg. When the drain-source of the transistor 69 is controlled to be non-conductive by the current control signal CC2, no current flows between the drain and the source of the transistor 65. In the following description, a current flowing between the drain and the source of the transistor 65 may be simply referred to as a current flowing through the transistor 65. The state in which the transistor 69 is on between the drain and the source is sometimes referred to as "on", and the state in which the transistor is off between the drain and the source is sometimes referred to as "off".

As described above, the current control circuit 61 controls the current supplied to the control voltage output circuit 40 including the differential amplifier circuit 41 based on the input current control signals CC1 and CC 2.

Here, in the present embodiment, when it is desired to operate the control voltage output circuit 40 with a low current consumption, the H-level current control signal CC1 and the L-level current control signal CC2 are input to the current control circuit 61. That is, without increasing the current supplied to the control voltage output circuit 40, the transistors 63 and 64 are controlled so as to flow a current, and the transistors 62 and 65 are controlled so as not to flow a current. Thereby, a current obtained by adding the current flowing through the transistor 63 and the current flowing through the transistor 64 is supplied to the control voltage output circuit 40.

When it is desired to improve the operation stability such as the response and the output follow-up of the control voltage output circuit 40 by supplying a large amount of current to the control voltage output circuit 40, the H-level current control signal CC1 and the H-level current control signal CC2 are input to the current control circuit 61. That is, when the current supplied to the control voltage output circuit 40 is increased, the transistors 62, 63, 64, and 65 are controlled so as to flow the current. Thereby, a current obtained by adding together the current flowing through the transistor 62, the current flowing through the transistor 63, the current flowing through the transistor 64, and the current flowing through the transistor 65 is supplied to the control voltage output circuit 40.

As described above, the transistors 62 and 65 operate so as to flow a current when it is desired to supply a large amount of current to the control voltage output circuit 40, and do not operate when it is desired to operate the control voltage output circuit 40 with a low current consumption. Therefore, the driving capability of the transistors 62 and 65 is preferably larger than that of the transistors 63 and 64. That is, when it is desired that the RTC module 1 operates with a low current consumption, only the transistors 63 and 64 having a smaller driving capability than the transistors 62 and 65 are driven, and when it is desired to supply a large current to the control voltage output circuit 40, the transistors 62 and 65 having a large driving capability are driven in addition to the transistors 63 and 64. This can satisfy both low power consumption of the RTC module 1 and improvement in operation stability.

Here, the transistor 63 is an example of a 1 st transistor, and the transistor 62 is an example of a 2 nd transistor. The transistor 64 is another example of the 1 st transistor, and the transistor 65 is another example of the 2 nd transistor. The control voltage output circuit 40, which outputs the voltage VLOGIC based on the voltage VOUT which is the output of the switching circuit 10, is an example of a constant voltage circuit, and the voltage VLOGIC is an example of a constant voltage signal. The oscillating voltage output circuit 60 having the same configuration as the control voltage output circuit 40 is another example of the constant voltage circuit, and the voltage VSOC output by the oscillating voltage output circuit 60 is another example of the constant voltage signal.

The voltage VLOGIC output from the control voltage output circuit 40 configured as described above is input to the logic circuit 100 and the power-on reset circuit 50. The voltage VOSC output from the oscillation voltage output circuit 60 is input to the oscillation circuit 70.

Returning to fig. 1, the voltage VLOGIC is input to the power-up reset circuit 50. Then, the reset signal RS1 is output according to whether or not the voltage VLOGIC is equal to or higher than a predetermined voltage value. Specifically, when the voltage value of the voltage VLOGIC is lower than a predetermined voltage value, the power-on reset circuit 50 outputs the reset signal RS1 for resetting the operation of the logic circuit 100.

The voltage VOSC is input to the oscillation circuit 70. The oscillation circuit 70 operates in accordance with the voltage VOSC, and outputs an oscillation signal OSC having a predetermined frequency, such as 32.768 kHz.

Fig. 5 is a diagram showing the structure of the oscillation circuit 70. The oscillation circuit 70 includes capacitors 71, 72, and 73, variable capacitance capacitors 74 and 75, resistors 76 and 77, transistors 81, 82, 83, and 84, and an amplitude detection circuit 85. The oscillator circuit 70 is connected to the vibrator 91 via the electrodes 92 and 93. In this embodiment, the transistors 81 and 83 are P-channel MOS transistors, and the transistors 82 and 84 are N-channel MOS transistors. The vibrator 91 may be a tuning fork quartz vibrator, an AT cut quartz vibrator, an SC cut quartz vibrator, or the like, or may be a piezoelectric vibrator or the like. The vibrator 91 may be a MEMS (Micro Electro Mechanical Systems) vibrator using a silicon semiconductor as a material.

The voltage VOSC is input to the source of the transistor 81. The gate of the transistor 81 is connected to the electrode 92 via the capacitor 72. A drain of the transistor 81 is connected to a drain of the transistor 82. A gate of the transistor 82 is connected to the electrode 92 via the capacitor 73. A source of the transistor 82 is connected to the ground terminal. A connection point between the drain of the transistor 81 and the drain of the transistor 82 is connected to the electrode 93 via the resistor 77.

The variable capacitance capacitor 74 is disposed between the electrode 92 and ground. The variable capacitance capacitor 75 is provided between the electrode 93 and the ground. The resistor 76 is provided between the gate and the drain of the transistor 81.

A gate of the transistor 83 is connected to a gate of the transistor 81. The voltage VOSC is input to the source of the transistor 83. A drain of the transistor 83 is connected to a drain of the transistor 84. A gate of transistor 84 is connected to a gate of transistor 82. A source of the transistor 84 is connected to ground. Further, an oscillation signal OSC is output from a connection point between the drain of the transistor 83 and the drain of the transistor 84.

In the oscillation circuit 70 configured as described above, the oscillator 91 continues oscillation through the transistors 81 and 82, the capacitors 72 and 73, the variable capacitance capacitors 74 and 75, and the resistors 76 and 77, thereby generating an oscillation signal. Then, the transistors 83 and 84 correct the oscillation signal into a rectangular wave and output the square wave as an oscillation signal OSC.

The oscillation circuit 70 of the present embodiment includes an amplitude detection circuit 85. One end of the amplitude detection circuit 85 is connected to the electrode 92 via the capacitor 71. The other end of the amplitude detection circuit 85 is connected to the gate of the transistor 82. Amplitude detection circuit 85 connected as described above detects the amplitude level of the oscillation output signal of oscillator 91 input via capacitor 71 and electrode 92, and controls the amplitude level of the signal input to the gate of transistor 82 based on the detection result.

Specifically, when the oscillation output signal inputted to oscillator 91 at one end is larger than a predetermined amplitude, amplitude detection circuit 85 performs control so as to reduce the amplitude of the signal inputted to the gate of transistor 82. When the oscillation output signal inputted to oscillator 91 at one end is smaller than a predetermined amplitude, amplitude detection circuit 85 controls to increase the amplitude of the signal inputted to the gate of transistor 82. This enables adjustment of the amplitude level of the oscillation output signal output from the electrode 92. Therefore, the possibility of generating a through current in the transistors 81 and 82 and the transistors 83 and 84 is reduced. This enables the RTC module 1 to consume less power.

Returning to fig. 1, the oscillation signal OSC and the voltage VLOGIC are input to the level shifter 80. Then, the level shifter 80 level-shifts the voltage value of the oscillation signal OSC to a voltage value based on the voltage VLOGIC, and outputs to the logic circuit 100.

The logic circuit 100 receives a voltage VLOGIC, an oscillation signal OSC level-shifted to a voltage value based on the voltage VLOGIC, a reset signal RS1, and a voltage detection signal VDET. The logic circuit 100 includes a switch control circuit 101, a threshold switching control circuit 102, and a current control circuit 103. Various configurations of the logic circuit 100 including the switch control circuit 101, the threshold switching control circuit 102, and the current control circuit 103 operate with the voltage VLOGIC as a power supply voltage.

The switch control circuit 101 generates power supply switching control signals CS1, CS2, and CS3 based on the input voltage detection signal VDET, and controls the transistors 11, 12, and 13 included in the switch circuit 10. That is, the switch control circuit 101 controls switching of the switch circuit 10 by controlling switching of the transistors 11, 12, and 13 included in the switch circuit 10 based on the voltage detection signal VDET output from the power supply detection circuit 20. Thus, the switch circuit 10 switches whether to output the voltage VDD as the voltage VOUT to the terminal VOUT or to output the voltage VBAT as the voltage VOUT to the terminal VOUT.

Specifically, when the voltage detection signal VDET output from the power supply detection circuit 20 is a signal indicating the H level at which the voltage value of the voltage VDD is higher than the predetermined threshold voltage VR1, the switch control circuit 101 outputs the power supply switching control signals CS1, CS2, and CS3 at L, H, H levels, respectively, in order to output the voltage VDD as the voltage VOUT. When the voltage detection signal VDET output from the power supply detection circuit 20 is a signal at the L level indicating that the voltage value of the voltage VDD is lower than the predetermined threshold voltage VR2, the switch control circuit 101 outputs the power supply switching control signals CS1, CS2, and CS3 at the H, L, L level, respectively, in order to output the voltage VBAT as the voltage VOUT.

The threshold switching control circuit 102 generates a threshold control signal CT based on the voltage detection signal VDET, and outputs the threshold control signal CT to the power supply detection circuit 20 to control the switch 25 included in the power supply detection circuit 20. Thus, the power supply detection circuit 20 can perform detection using different detection thresholds when the voltage VDD increases and when the voltage VDD decreases. That is, the threshold switching control circuit 102 controls switching of the detection threshold of the voltage VDD in the power supply detection circuit 20.

Specifically, the threshold switching control circuit 102 outputs the threshold control signal CT at the L level when the voltage detection signal VDET output from the power supply detection circuit 20 is at the H level, and the threshold switching control circuit 102 outputs the threshold control signal CT at the H level when the voltage detection signal VDET output from the power supply detection circuit 20 is at the L level.

The current control circuit 103 outputs current control signals CC1, CC2 corresponding to the voltage detection signal VDET to the control voltage output circuit 40 and the oscillation voltage output circuit 60. Then, the transistors 66, 67, 68, and 69 of the control voltage output circuit 40 and the oscillation voltage output circuit 60 are controlled by the current control signals CC1 and CC2, respectively. Thereby, the currents supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60 are controlled, respectively. That is, the current control circuit 103 controls the currents supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60, respectively. The relationship between the current control signals CC1 and CC2 output from the current control circuit 103 and the voltage detection signal VDET will be described later.

Further, a reset signal RS1 is input from the power-on reset circuit 50 to the logic circuit 100. In other words, the power-on reset circuit 50 outputs the reset signal RS1 to the switch control circuit 101, the threshold switching control circuit 102, and the current control circuit 103 included in the logic circuit 100.

When the logic level of the input reset signal RS1 is switched from the L level to the H level, the logic circuit 100 operates with the voltage VLOGIC input from the control voltage output circuit 40 as the power supply voltage. On the other hand, in the logic circuit 100, when the logic level of the input reset signal RS1 is switched from the H level to the L level, it is considered that the voltage value of the voltage VLOGIC input from the control voltage output circuit 40 is insufficient, and the logic circuit 100 executes the reset process. Here, the reset signal RS1 is an example of the 1 st reset signal, and the power-on reset circuit 50 is an example of the 1 st power-on reset circuit.

The oscillation signal OSC level-shifted to the voltage value of the voltage VLOGIC by the level shifter 80 is input to the logic circuit 100. Then, the logic circuit 100 outputs the input oscillation signal OSC level-shifted to the voltage value of the voltage VLOGIC as the oscillation signal CLK. The logic circuit 100 may include an oscillation signal output control circuit, not shown, that switches whether or not to output the oscillation signal OSC level-shifted to the voltage value of the voltage VLOGIC as the oscillation signal CLK.

The level shifter 210 is input with the oscillation signal CLK and the voltage VIO. Then, the level shifter 210 level-shifts the voltage value of the oscillation signal CLK to a voltage value based on the voltage VIO corresponding to the specification of the RTC module 1.

The output circuit 220 is input with a signal that level-shifts the oscillation signal CLK to a voltage value based on the voltage VIO. Then, the output circuit 220 performs waveform correction or the like on a signal level-shifted by the input oscillation signal CLK to a voltage value based on the voltage VIO, and outputs the signal as an output signal FOUT from a terminal FOUT.

The oscillation signal CLK is input to the timing circuit 230. The timing circuit 230 includes a frequency dividing circuit not shown. Then, the frequency of the oscillation signal CLK is divided by the frequency dividing circuit to generate a signal of a desired frequency. The timing circuit 230 performs a timing operation based on the divided oscillation signal CLK. The timer circuit 230 generates, for example, timer data indicating time in seconds, timer data indicating time in years, and the like as a timer operation.

The interface circuit 240 is an interface for performing communication between the RTC module 1 and an external device not shown, receives various commands from the external device, and reads out timing data in accordance with the received commands. The Interface Circuit 240 may be an Interface Circuit for various serial buses, such as an Interface Circuit for an I2C (Inter-Integrated Circuit) bus and an Interface Circuit for an SPI (serial peripheral Interface) bus, or may be an Interface Circuit for a parallel bus. Then, the signal converted into the desired transmission form by the interface circuit is output from the terminal I/F _ IO as an output signal I/F _ IO.

Here, in the RTC module that switches between supplying the main power supply as the power supply voltage and supplying the backup power supply as the power supply voltage, when switching from the main power supply to the backup power supply or switching from the backup power supply to the main power supply, a temporary voltage value change may occur in the constant voltage signal generated inside the RTC module.

If the voltage value of the constant voltage signal supplied to the oscillation circuit among the constant voltage signals generated inside the RTC module changes, the operation of the oscillation circuit is temporarily stopped, and the timing accuracy of the timing function that operates based on the output of the oscillation circuit may decrease. Further, when a voltage value of a constant voltage signal supplied to a logic circuit among constant voltage signals generated inside the RTC module changes, a power-on reset circuit connected to the logic circuit may operate to initialize the logic circuit.

The above problem arises because the responsiveness of the constant voltage generation circuit that generates the constant voltage signal is low due to the RTC module being operated with a low consumption current in order to suppress the consumption of the backup power supply, and therefore the constant voltage signal generation operation of the constant voltage generation circuit cannot follow the change in the voltage value of the supply voltage that occurs when the supply destination of the power supply is switched.

Therefore, the RTC module 1 of the present embodiment includes a current control circuit 103, and the current control circuit 103 controls currents to be supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60, respectively, the control voltage output circuit 40 outputs a voltage VLOGIC as a constant voltage signal from a voltage VOUT, the oscillating voltage output circuit 60 outputs a voltage VOSC as a constant voltage signal from the voltage VOUT, and the current control circuit 103 controls to increase a current to be supplied to at least one of the control voltage output circuit 40 and the oscillating voltage output circuit 60 when the switching control circuit 101 switches the voltage VOUT supplied to the RTC module 1 from the voltage VDD to the voltage VBAT or from VBAT to the voltage VDD. This improves the following ability of the constant voltage signal generating operation of the control voltage output circuit 40 and the oscillating voltage output circuit 60 to the variation of the voltage value of the voltage VOUT. Therefore, the possibility of a temporary change in the voltage VLOGIC or VOSC generated inside the RTC module 1 is reduced.

1.1.2 supply Voltage switching control

As described above, in the RTC module 1 of the present embodiment, when voltage switching control is performed to switch whether the voltage VBAT is supplied as the voltage VOUT of the switching control circuit 101 or the voltage VDD is supplied as the voltage VOUT of the switching control circuit 101, the current control circuit 103 performs current increase control to increase the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60, and the possibility that the voltages VLOGIC and VOSC generated inside the RTC module 1 will cause a temporary change in the voltage value is reduced.

Therefore, in the RTC module 1 of the present embodiment, a relationship between the voltage switching control of the switch control circuit 101 and the current increase control of the current control circuit 103 will be described with reference to fig. 6 and 7.

Fig. 6 is a flowchart for explaining the operation of the RTC module 1 when the voltage value of the voltage VDD increases from a state in which the voltage value of the voltage VDD is lower than the threshold voltage VR 2. Here, the state in which the voltage value of the voltage VDD is lower than the threshold voltage VR2 includes a state in which the voltage VDD is not supplied to the RTC module 1.

When the commercial power supply for generating voltage VDD is turned on again, the primary battery is replaced, and the secondary battery is recharged in a state where the voltage value of voltage VDD is lower than threshold voltage VR2, the voltage value of voltage VDD increases (step S110). Then, the power supply detection circuit 20 determines whether or not the voltage value of the voltage VDD exceeds the threshold voltage VR1 (step S120).

When the voltage value of the voltage VDD is equal to or lower than the threshold voltage VR1 (no in step S120), the power supply detection circuit 20 continues to determine whether or not the voltage value of the voltage VDD exceeds the threshold voltage VR1 (step S120). On the other hand, when the power supply detection circuit 20 determines that the voltage value of the voltage VDD exceeds the threshold voltage VR1 (yes in step S120), the current control circuit 103 controls the transistors 66 and 69 to be on (step S130). Specifically, the current control circuit 103 inverts the voltage detection signal VDET from the L level to the H level to output the current control signal CC2 at the H level. Thereby, the transistors 66, 69 are controlled to be on. Then, by controlling the transistors 66 and 69 to be on, a current flows through the transistors 62 and 65, respectively. Although the description is omitted, in the flowchart of fig. 6, the current control signal CC1 continues to maintain the H level.

After the current control circuit 103 sets the current control signal CC2 to the H level, the switch control circuit 101 controls the transistor 11 to be on and controls the transistors 12 and 13 to be off (step S140). Specifically, the switch control circuit 101 sets the power supply switching control signals CS1, CS2, and CS3 to L, H, H levels. Thus, the switch circuit 10 outputs the voltage VDD as the voltage VOUT.

Then, after the voltage VDD is output as the voltage VOUT, the current control circuit 103 controls the transistors 66, 69 to be off (step S150). Specifically, the current control circuit 103 sets the current control signal CC2 to the L level. Thereby, the transistors 66 and 69 are controlled to be off. Then, by turning off the transistors 66 and 69, the current flowing through the transistors 62 and 65 is cut off.

Fig. 7 is a flowchart for explaining the operation of the RTC module 1 when the voltage value of the voltage VDD decreases from the state where the voltage value of the voltage VDD exceeds the threshold voltage VR 1.

In a state where the voltage value of voltage VDD exceeds threshold voltage VR1, the voltage value of voltage VDD decreases due to a stop of a commercial power supply for generating voltage VDD, a shortage of the remaining battery capacities of the primary battery and the secondary battery, and the like (step S210). Then, the power supply detection circuit 20 determines whether or not the voltage value of the voltage VDD is lower than the threshold voltage VR2 (step S220).

When the voltage value of the voltage VDD is equal to or higher than the threshold voltage VR2 (no in step S220), the power supply detection circuit 20 continues to determine whether the voltage value of the voltage VDD is lower than the threshold voltage VR2 (step S220). On the other hand, when the power supply detection circuit 20 determines that the voltage value of the voltage VDD is lower than the threshold voltage VR2 (yes in step S220), the current control circuit 103 controls the transistors 66 and 69 to be on (step S230). Specifically, the current control circuit 103 outputs the current control signal CC2 at the H level by inverting the voltage detection signal VDET from the H level to the L level. Thereby, the transistors 66, 69 are controlled to be on. Then, by controlling the transistors 66 and 69 to be on, a current flows through the transistors 62 and 65, respectively. Although the explanation is omitted, in the flowchart of fig. 7, the current control signal CC1 continues to maintain the H level.

After the current control circuit 103 outputs the H-level current control signal CC2, the switch control circuit 101 controls the transistor 11 to be off and controls the transistors 12 and 13 to be on (step S240). Specifically, the switch control circuit 101 sets the logic level of the power supply switching control signals CS1, CS2, and CS3 to H, L, L level. Thus, the switching circuit 10 outputs the voltage VBAT as the voltage VOUT.

Then, after the voltage VBAT is output as the voltage VOUT, the current control circuit 103 controls the transistors 66, 69 to be off (step S250). Specifically, the current control circuit 103 sets the current control signal CC2 to the L level. Thereby, the transistors 66 and 69 are controlled to be off. Then, by turning off the transistors 66 and 69, the current flowing through the transistors 62 and 65 is cut off.

As described above, in the RTC module 1 of the present embodiment, when the switch control circuit 101 switches the switch circuit 10 based on the voltage detection signal VDET, the current control circuit 103 increases the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60. Thus, even when the voltage value of the voltage VOUT changes, the following performance of the operation of the control voltage output circuit 40 for generating the voltage VLOGIC and the operation of the oscillating voltage output circuit 60 for generating the voltage VOSC is improved. Therefore, the voltage VLOGIC and the voltage VOSC having constant voltage values are less likely to change in response to a change in the voltage value of the voltage VOUT when the voltage supplied to the RTC module 1 is switched from the voltage VDD to the voltage VBAT or from the voltage VBAT to the voltage VDD.

In this case, as shown in this embodiment, it is preferable that the switching control circuit 101 switches the switching circuit 10 after the current control circuit 103 increases the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60. That is, it is preferable to increase the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60 when the voltage VOUT switches from the voltage VDD to the voltage VBAT or from the voltage VBAT to the voltage VDD. Thus, the possibility of the voltage VLOGIC and the voltage VOSC changing with respect to a change in the voltage value of the voltage VOUT when the voltage supplied to the RTC module 1 is switched from the voltage VDD to the voltage VBAT or from the voltage VBAT to the voltage VDD can be further reduced.

Here, a specific example of the voltage switching control and the current increase control in the case where the supply of the voltage VDD is started will be described with reference to fig. 8 and 9 for the RTC module 1 of the present embodiment.

Fig. 8 is a timing chart for explaining an operation in the case where the voltage VDD supplied to the RTC module 1 is a voltage having a voltage value lower than the voltage VBAT and higher than the threshold voltage VR 1.

First, until time t1, the voltage VDD is not supplied to the RTC module 1. Therefore, as the voltage VOUT, the voltage VBAT is supplied. In other words, the power supply switching control signals CS1, CS2, CS3 are controlled to H, L, L level. Since the voltage VDD is not supplied, the power supply detection circuit 20 outputs the voltage detection signal VDET at the L level, and the threshold switching control circuit 102 outputs the threshold control signal CT at the H level in accordance with the voltage detection signal VDET. Further, the H-level current control signal CC1 and the L-level current control signal CC2 are input to the control voltage output circuit 40 and the oscillation voltage output circuit 60. That is, the control voltage output circuit 40 and the oscillating voltage output circuit 60 operate with low current consumption.

At time t1, the voltage VDD is supplied to the RTC module 1, whereby the voltage value of the voltage VDD rises. Then, at time t2, when the voltage value of the voltage VDD exceeds the threshold voltage VR1, the power supply detection circuit 20 changes the voltage detection signal VDET from the L level to the H level. Then, after the voltage detection signal VDET is at the H level, at time t3 when a predetermined time has elapsed, the threshold switching control circuit 102 sets the threshold control signal CT at the L level and the current control circuit 103 sets the current control signal CC2 at the H level. Thereby, the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60 increases. Then, after the current control signal CC2 becomes H level, at time t4 after a predetermined time has elapsed, the switch control circuit 101 sets the power supply switching control signals CS1, CS2, and CS3 to L, H, H level. Thus, the voltage VDD is supplied as the voltage VOUT.

At time t4, the voltage value of voltage VOUT decreases by switching the voltage shared as voltage VOUT from voltage VBAT to voltage VDD. At this time, since the current control signal CC2 is at the H level, the control voltage output circuit 40 and the oscillating voltage output circuit 60 can generate the voltages VLOGIC and VOSC of the constant voltages even when the voltage value of the voltage VOUT decreases. That is, as the voltage VOUT decreases, the voltage VLOGIC outputted from the control voltage output circuit 40 and the voltage VOSC outputted from the oscillation voltage output circuit 60 may decrease in voltage value.

After time t4, the current control circuit 103 sets the current control signal CC2 to the L level at time t5 after a predetermined period has elapsed. This can reduce the current consumption of the RTC module 1 while the switching control of the power supply voltage is not performed.

Here, immediately after the voltage detection signal VDET is inverted from the L level to the H level, the current control circuit 103 may set the current control signal CC2 to the H level, and after the voltage detection signal VDET is inverted from the L level to the H level, the current control circuit 103 may set the current control signal CC2 to the H level after a predetermined period of time has elapsed. Further, the current control circuit 103 may change the current control signal CC2 from the H level to the L level after a predetermined time has elapsed since the voltage detection signal VDET is inverted from the L level to the H level, or after a predetermined period has elapsed since the power supply switching control signals CS1, CS2, and CS3 are switched to the L, H, H level.

Fig. 9 is a timing chart for explaining an operation in the case where the voltage VDD supplied to the RTC module 1 is a voltage having a voltage value higher than the voltage value of the voltage VBAT and higher than the threshold voltage VR 1.

First, until time t11, the voltage VDD is not supplied to the RTC module 1. Therefore, the voltage VBAT is supplied as the voltage VOUT. In other words, the power supply switching control signals CS1, CS2, CS3 are controlled to H, L, L level. Since the voltage VDD is not supplied, the power supply detection circuit 20 outputs the voltage detection signal VDET at the L level, and the threshold switching control circuit 102 outputs the threshold control signal CT at the H level in accordance with the voltage detection signal VDET. Further, the H-level current control signal CC1 and the L-level current control signal CC2 are input to the control voltage output circuit 40 and the oscillation voltage output circuit 60. Therefore, the control voltage output circuit 40 and the oscillating voltage output circuit 60 operate with low current consumption.

At time t11, the voltage VDD is supplied to the RTC module 1, whereby the voltage value of the voltage VDD rises. Then, at time t12, when the voltage value of the voltage VDD exceeds the threshold voltage VR1, the power supply detection circuit 20 changes the voltage detection signal VDET from the L level to the H level. Then, after the voltage detection signal VDET is at the H level, at time t13 when a predetermined time has elapsed, the threshold switching control circuit 102 sets the threshold control signal CT at the L level and the current control circuit 103 sets the current control signal CC2 at the H level. Thereby, the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60 increases. Then, after the current control signal CC2 becomes H level, at time t14 after a predetermined time has elapsed, the switch control circuit 101 sets the power supply switching control signals CS1, CS2, and CS3 to L, H, H level. Thus, the voltage VDD is supplied as the voltage VOUT.

Here, when the voltage value of the voltage VDD is higher than the voltage value of the voltage VBAT as shown in fig. 9, the voltage value of the voltage VOUT is the voltage value of the voltage VDD supplied via a diode formed in the transistor 11. In other words, the voltage VOUT may be limited by the voltage value of the voltage VDD regardless of the power supply switching control signals CS1, CS2, and CS 3. Even in such a case, the current control signal CC2 is controlled to the H level according to the voltage value of the voltage VDD, and the control voltage output circuit 40 and the oscillating voltage output circuit 60 can generate the voltages VLOGIC, VOSC of the constant voltage value without depending on the change in the voltage value of the voltage VOUT by increasing the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60.

The logic levels of the various signals in the present embodiment are merely examples, and are not limited thereto.

1.1.3 Effect

As described above, the RTC module 1 of the present embodiment includes the current control circuit 103, and the current control circuit 103 controls the currents supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60, respectively, in which the control voltage output circuit 40 outputs the voltage VLOGIC which is a constant voltage signal in accordance with the voltage VOUT, the oscillating voltage output circuit 60 outputs the voltage VOSC which is a constant voltage signal in accordance with the voltage VOUT, and the current control circuit 103 performs control to increase the current supplied to at least one of the control voltage output circuit 40 and the oscillating voltage output circuit 60 when the switching control circuit 101 causes the switching circuit 10 to switch the voltage VOUT supplied to the RTC module 1 from the voltage VDD to the voltage VBAT or from VBAT to the voltage VDD. This improves the follow-up of the constant voltage signal generation operation of the control voltage output circuit 40 and the oscillating voltage output circuit 60 to the variation of the voltage value of the voltage VOUT, and reduces the possibility that the voltages VLOGIC and VOSC generated inside the RTC module 1 will generate a temporary variation of the voltage value.

1.2 embodiment 2

Next, the RTC module 1 of embodiment 2 will be described. In the description of the RTC module 1 according to embodiment 2, the same components as those of the RTC module 1 according to embodiment 1 are denoted by the same reference numerals, and illustration and description thereof are omitted or simplified.

Fig. 10 is a diagram showing the structure of the RTC module 1 according to embodiment 2. The RTC module 1 according to embodiment 2 is different from the RTC module 1 according to embodiment 1 in that, when operating with VBAT as a backup power source, the threshold switching control circuit 102, which is a part of the logic circuit 100, performs a so-called intermittent operation in which a rest period and an operation period are repeated. The RTC module 1 according to embodiment 2 is different from the RTC module 1 according to embodiment 1 in that a power-on reset circuit 90 is provided, and the power-on reset circuit 90 detects a voltage value of the voltage VDD and outputs a reset signal RS2 according to the detection result.

In the RTC module 1 according to embodiment 2 that performs such intermittent operation, the consumption of the backup power supply can be reduced. However, when the RTC module 1 operates intermittently, the power supply detection circuit 20 stops the detection of the voltage value of the voltage VDD during the off period. Therefore, when the voltage value of the voltage VDD increases during the idle period, the power supply detection circuit 20 cannot detect the voltage value of the voltage VDD. Therefore, when the voltage value of the voltage VDD rises during the rest period and exceeds the voltage value of the voltage VBAT, the voltage VDD is supplied as the voltage VOUT via a diode formed in the transistor 11. As a result, the voltage value of the voltage VOUT changes.

In response to such a change in the voltage value of the voltage VOUT that cannot be detected by the power supply detection circuit 20, the RTC module 1 according to embodiment 2 includes the power-on reset circuit 90 that outputs the reset signal RS2 in accordance with the voltage value of the voltage VDD, thereby reducing the possibility that the voltage VLOGIC output by the control voltage output circuit 40 and the voltage VOSC output by the oscillation voltage output circuit 60 change.

As shown in fig. 10, a voltage VDD is input to one end of the power-up reset circuit 90. When the voltage VDD reaches a predetermined voltage value, the H-level reset signal RS2 is output to the logic circuit 100. When the input reset signal RS2 changes from the L level to the H level, the logic circuit 100 outputs the current control signal CC2 at the H level from the current control circuit 103.

Thus, in the RTC module 1 which operates intermittently at the voltage VBAT, even when the voltage value of the voltage VDD increases in the off period of the intermittent operation, the current supplied to the control voltage output circuit 40 and the current supplied to the oscillating voltage output circuit 60 can be increased. Therefore, in the RTC module 1 that performs the intermittent operation, even when the voltage value of the voltage VOUT changes due to the rise of the voltage value of the voltage VDD, the possibility of the voltage values of the voltage VLOGIC and the voltage VOSC changing can be reduced.

Fig. 11 is a flowchart for explaining the operation of the RTC module 1 in the RTC module 1 according to embodiment 2 when the voltage value of the voltage VDD increases from the state where the voltage value of the voltage VDD is lower than the threshold voltage VR 2.

In the same manner as in embodiment 1, when the voltage value of voltage VDD is lower than threshold voltage VR2, the voltage value of voltage VDD is increased by turning on the commercial power supply for generating voltage VDD again, replacing the primary battery, recharging the secondary battery, and the like (step S110).

Then, the power-on reset circuit 90 determines whether or not the voltage value of the voltage VDD exceeds the threshold voltage VR3 (step S111). When the power-on reset circuit 90 determines that the voltage value of the voltage VDD is equal to or less than the threshold voltage VR3 (no in step S111), the logic circuit 100 determines whether or not a predetermined time has elapsed during the rest period of the intermittent operation (step S112).

When determining that the predetermined time has not elapsed during the off period of the RTC module 1 (no in step S112), the logic circuit 100 causes the power-on reset circuit 90 to continue determining whether or not the voltage value of the voltage VDD exceeds the threshold voltage VR3 (step S111). That is, the RTC module 1 continues to be in the inactive period during the intermittent operation.

When the logic circuit 100 determines that the predetermined time has elapsed since the off period of the RTC module 1 (yes in step S112), the power supply detection circuit 20 determines whether or not the voltage value of the voltage VDD exceeds the threshold voltage VR1 (step S120). That is, the RTC module 1 shifts to an operation period during the intermittent operation. Note that the operation of the RTC module after the transition to the operation period is the same as that in embodiment 1, and the description thereof is omitted.

When the power-on reset circuit 90 determines that the voltage value of the voltage VDD exceeds the threshold voltage VR3 (yes in step S111), the power-on reset circuit 90 outputs the reset signal RS2 at the H level. Then, the reset signal RS2 input to the logic circuit 100 changes from the L level to the H level, whereby the current control circuit 103 controls the transistors 66, 69 to be on (step S130). Thereafter, the RTC module 1 performs the same operations as steps S140 and S150 of embodiment 1.

Fig. 12 is a timing chart for explaining the operation of the RTC module 1 according to embodiment 2. In addition, fig. 12 shows the state information Sinfo for explaining the intermittent operation of the RTC module 1. Fig. 12 shows that the state information Sinfo is set to the H level when the RTC module 1 is in the operating period, and the state information Sinfo is set to the L level when the RTC module 1 is in the off period.

At time t21, the RTC module 1 is in operation. In this case, the voltage VDD is equal to or lower than the threshold voltage VR 1.

Then, at time t22 in the off period of the RTC module 1, the voltage value of the voltage VDD rises, and thereafter, the voltage value of the voltage VDD exceeds the threshold voltage VR 1. At this time, since the RTC module 1 is in the off period, the power supply detection circuit 20 does not change the logic level of the voltage detection signal VDET.

At time t23, the voltage value of voltage VDD exceeds the threshold voltage VR 3. Thereby, the power-on reset circuit 90 outputs the reset signal RS2 of the H level to the logic circuit 100. The reset signal RS2 input to the logic circuit 100 changes from the L level to the H level, and the current control circuit 103 thereby sets the current control signal CC2 to the H level. Thereby, the current supplied to the control voltage output circuit 40 and the oscillating voltage output circuit 60 increases.

At time t24, the RTC module 1 is in operation. At this time, since the voltage value of the voltage VDD exceeds the threshold voltage VR1, the power supply detection circuit 20 sets the voltage detection signal VDET to the H level. Thereafter, at times t25, t26, and t27, the RTC module 1 performs the same operations as at times t13, t14, and t15 of embodiment 1, respectively.

As described above, in the RTC module 1 according to embodiment 2, the power-on reset circuit 90 detects the voltage value of the voltage VDD and outputs the reset signal RS2 based on the detection result. Then, the reset signal RS2 input to the logic circuit 100 changes from the L level to the H level, whereby the current control circuit 103 outputs the current control signal CC2 as the H level. Thus, even when the voltage value of the voltage VOUT changes in the RTC module 1 that operates intermittently in the case of operation by the voltage VBAT as the backup power supply, the possibility of the voltage VLOGIC output by the control voltage output circuit 40 and the voltage VOSC output by the oscillating voltage output circuit 60 changing can be reduced.

Here, the power-on reset circuit 90 is an example of the 2 nd power-on reset circuit, and the reset signal RS2 output from the power-on reset circuit 90 is an example of the 2 nd reset signal.

2. Electronic device

Fig. 13 is a functional block diagram showing an example of the configuration of the electronic device 300 according to the present embodiment. Fig. 14 is a diagram showing an example of an external appearance of a smartphone, which is an example of the electronic device 300 according to the present embodiment.

The electronic device 300 of the present embodiment includes an RTC (Real Time Clock) module 310, a CPU (Central Processing Unit) 320, an operation Unit 330, a ROM (Read Only Memory) 340, a RAM (Random Access Memory) 350, a communication Unit 360, a display Unit 370, a power supply Unit 380, and a backup power supply Unit 390. The electronic device 300 according to the present embodiment may be configured such that a part of the components shown in fig. 13 is omitted or changed, or another component is added.

The power supply unit 380 generates and outputs a power supply voltage for operating each unit of the electronic device 300. When the output of the power supply voltage from power supply unit 380 is stopped due to an instantaneous power failure or a stop of the operation of power supply unit 380, backup power supply unit 390 generates and outputs a backup power supply voltage for maintaining the operating state of electronic device 300.

The RTC module 310 includes a vibrator and a timer circuit, not shown. Then, a constant frequency signal of 32.786kHz, timing data indicating time in seconds or time in years, or the like is generated from the oscillation signal of the transducer and output to the CPU 320.

The CPU320 is a processing section that performs various kinds of calculation processing and control processing using the time data input from the RTC module 310 according to a program stored in the ROM 340 or the like. CPU320 performs various processes in accordance with an operation signal from operation unit 330, a process of controlling communication unit 360 for data communication with an external device, a process of transmitting a display signal for displaying various information on display unit 370, and the like.

The operation unit 330 is an input device including operation keys, button switches, and the like, and outputs an operation signal corresponding to an operation by the user to the CPU 320.

The ROM 340 is a storage unit that stores programs, data, and the like for the CPU320 to perform various kinds of calculation processing and control processing.

The RAM 350 is used as a work area of the CPU320, and is a storage unit that temporarily stores programs and data read from the ROM 340, data input from the operation unit 330, calculation results executed by the CPU320 in accordance with various programs, and the like.

The communication section 360 performs various controls for establishing data communication between the CPU320 and an external device.

The display unit 370 is a display device including an lcd (liquid Crystal display) and displays various information in accordance with a display signal input from the CPU 320. A touch panel that functions as the operation unit 330 may be provided on the display unit 370.

By applying the RTC module 1 of each of the above embodiments as the RTC module 310, for example, when the voltage supplied to the RTC module 310 is switched from the power supply voltage supplied from the power supply section 380 to the backup power supply voltage supplied from the backup power supply section 390, it is possible to reduce the possibility that the voltage value of the constant voltage signal generated inside the RTC module 310 changes. This enables the electronic device 300 to be highly reliable.

As such an electronic device 300, various electronic devices are considered, and examples thereof include a personal computer such as a mobile type, a laptop type, a tablet type, or the like, a mobile terminal such as a smartphone or a mobile phone, an ink jet type discharge device such as a digital camera or an ink jet type printer, a storage area network device such as a router or a switch, a local area network device, a device for a mobile terminal base station, a television, a video camera, a video recorder, a car navigation device, a real-time clock device, a pager, an electronic organizer, an electronic dictionary, a calculator, an electronic game device, a game controller, a word processor, a workstation, a video phone, a video monitor for theft prevention, an electronic binocular, a POS terminal, an electronic thermometer, a sphygmomanometer, a blood glucose meter, an electrocardiograph, an ultrasonic diagnostic device, a medical device such as an electronic endoscope, a fish detector, a fish school detector, a fish finder, various measuring devices, metering instruments such as vehicles, airplanes and ships, flight simulators, head-mounted displays, motion trackers, motion followers, motion controllers, Pedestrian autonomous navigation (PDR) devices and the like.

3. Moving body

Fig. 15 is a diagram showing an example of the mobile unit 400 according to the present embodiment. The mobile unit 400 shown in fig. 15 includes an RTC (Real Time Clock) module 410, controllers 420, 430, and 440 for performing various controls of an engine system, a brake system, a keyless entry system, and the like, a battery 450, and a backup battery 460. In addition, the mobile unit 400 according to the present embodiment may be configured such that a part of the components shown in fig. 15 is omitted or other components are added.

The RTC module 410 includes a vibrator and a timer circuit, not shown. Then, a constant frequency signal of 32.786kHz, timing data indicating time in seconds or time in years, or the like is generated from the oscillation signal of the oscillator, and output from the external terminal of the RTC module 410 to the controllers 420, 430, and 440.

The battery 450 supplies power to the RTC module 410 and the controllers 420, 430, 440. The backup battery 460 supplies power to the RTC module 410 and the controllers 420, 430, 440 when the output voltage of the battery 450 is lower than a threshold value.

By applying the RTC module 1 of each of the above embodiments as the RTC module 410, for example, when the voltage supplied to the RTC module 410 is switched from the power supply voltage supplied from the battery 450 to the backup power supply voltage supplied from the backup battery 460, it is possible to reduce the possibility that the voltage value of the constant voltage signal generated inside the RTC module 410 changes. This enables the mobile body 400 to be realized with high reliability.

As such a mobile body 400, various mobile bodies 400 are conceivable, and examples thereof include automobiles such as electric automobiles, airplanes such as jet airplanes and helicopters, ships, rockets, artificial satellites, and the like.

The embodiments and the modifications have been described above, but the present invention is not limited to these embodiments, and various embodiments can be implemented without departing from the scope of the invention. For example, the above embodiments may be combined as appropriate.

The present invention includes substantially the same structures (for example, structures having the same functions, methods, and results, or structures having the same objects and effects) as those described in the embodiments. The present invention includes a structure in which an immaterial portion of the structure described in the embodiment is replaced. The present invention includes a structure that can achieve the same operational effects or the same objects as the structures described in the embodiments. The present invention includes a configuration in which a known technique is added to the configuration described in the embodiment.