阅读说明：本技术 一种矩阵键盘的按键识别方法及系统 (Key identification method and system of matrix keyboard ) 是由 刘奎奎 张良吉 于 2020-07-27 设计创作，主要内容包括：本发明提出一种矩阵键盘的按键识别方法和系统,包括：键盘上电后该键盘的主控芯片进入低功耗模式,按键按下后会触发并接通按键所在的行和列,行IO产生电平突变信号,该电平突变信号通过输入IO唤醒该主控芯片并触发IO中断；该主控芯片对按键位置进行定位得到按键触发信号,并对按键触发信号进行抖动检测判断其是否为有效触发,若是,则将该按键位置的按键动作作为按键识别结果,否则按键识别失败,该主控芯片进入低功耗模式。本发明可实现超低功耗、IO中断不够的情况也能实现矩阵的多按键唤醒检测以及支持对组合键的识别。(The invention provides a key identification method and a key identification system of a matrix keyboard, which comprise the following steps: after the keyboard is powered on, a main control chip of the keyboard enters a low power consumption mode, a key is pressed down and then a row and a column where the key is located are triggered and connected, a row IO generates a level jump signal, and the level jump signal wakes up the main control chip through an input IO and triggers IO interruption; the main control chip positions the key position to obtain a key trigger signal, and carries out jitter detection on the key trigger signal to judge whether the key trigger signal is effectively triggered, if so, the key action of the key position is taken as a key identification result, otherwise, the key identification fails, and the main control chip enters a low power consumption mode. The invention can realize the condition of ultra-low power consumption and insufficient IO interruption, and can also realize the multi-key awakening detection of the matrix and support the identification of the combination key.)

1. A method for identifying keys of a matrix keyboard, comprising:

step 1, after the keyboard is powered on, a main control chip of the keyboard enters a low power consumption mode, a key is pressed down and then a row and a column where the key is located are triggered and connected, a row IO generates a level jump signal, and the level jump signal wakes up the main control chip through an input IO and triggers an IO interrupt;

and 2, the main control chip positions the key position to obtain a key trigger signal, and carries out jitter detection on the key trigger signal to judge whether the key trigger signal is effectively triggered, if so, the key action of the key position is taken as a key identification result, otherwise, the key identification fails, and the main control chip enters a low power consumption mode.

2. The method of claim 1, wherein the step 1 comprises:

and 11, respectively connecting the line IO of the main control chip which is not configured to the wake-up source and the IO interruption with the input end of one diode, collecting the output end of each diode into one path and then connecting the path to another appointed IO, and when the line IO of the main control chip has high-level input, simultaneously enabling the high level to enter the appointed IO configured to the wake-up source through the diodes, waking up the main control chip to work and triggering the IO interruption.

3. The method of claim 1, wherein the jitter detection specifically comprises:

and when IO interruption triggering is detected, starting a timer to scan the rows and the columns of the keys at regular time, judging that the key triggering signal is effective triggering if the row and column results of the pressed keys obtained by each scanning are consistent, and judging that the keys are jittered if the row and column results of the pressed keys are consistent, and taking the key triggering signal as ineffective triggering.

4. The method of claim 1, wherein the low power mode is reserved for GPIO operation as wake-up source only.

5. The method of claim 1, wherein the step 2 comprises: and obtaining a row number with level mutation through the level mutation signal, controlling all the column IO of the keyboard to poll and output a preset level, saving the column number currently outputting the preset level when the row IO of the row number has the preset level input, and saving the row number and the column number as the key trigger signal.

6. A key identification system for a matrix keyboard, comprising:

the main control awakening module is used for enabling a main control chip of the keyboard to enter a low power consumption mode after the keyboard is powered on, a row and a column where the key is located can be triggered and connected after the key is pressed down, a row IO generates a level mutation signal, and the level mutation signal awakens the main control chip through an input IO and triggers an IO interrupt;

and the key identification module is used for positioning the key position through the main control chip to obtain a key trigger signal, detecting the key trigger signal in a shaking way to judge whether the key trigger signal is effectively triggered, if so, taking the key action of the key position as a key identification result, otherwise, failing to identify the key, and enabling the main control chip to enter a low power consumption mode.

7. The system of claim 6, wherein the main control wake-up module comprises:

and the main control awakening submodule is used for respectively connecting the main control chip to the line IO which is not configured to the awakening source and the IO interruption with the input end of one diode, collecting the output end of each diode into one path and then connecting the path to another appointed IO, and when the line IO of the main control chip has high-level input, the high level simultaneously enters the appointed IO configured to the awakening source through the diodes, awakens the main control chip to work and triggers the IO interruption.

8. The system of claim 6, wherein the jitter detection comprises:

and when IO interruption triggering is detected, starting a timer to scan the rows and the columns of the keys at regular time, judging that the key triggering signal is effective triggering if the row and column results of the pressed keys obtained by each scanning are consistent, and judging that the keys are jittered if the row and column results of the pressed keys are consistent, and taking the key triggering signal as ineffective triggering.

9. The system of claim 6, wherein the low power mode is reserved for GPIO operation as wake-up source only.

10. The key identification system of a matrix keyboard of claim 6, wherein the key identification module comprises: and obtaining a row number with level mutation through the level mutation signal, controlling all the column IO of the keyboard to poll and output a preset level, saving the column number currently outputting the preset level when the row IO of the row number has the preset level input, and saving the row number and the column number as the key trigger signal.

Technical Field

The invention relates to the field of embedded development, in particular to an anti-shake method and an anti-shake system for a matrix keyboard.

Background

The common key structure circuit is divided into independent keys and determinant keys, the independent keys are that each key occupies an I/O line, and the I/O port structure is directly used to form a single key circuit, but the I/O port structure occupies more lines and is only suitable for application with a small number. The I/O of the line-row keyboard adopts a line-row structure formed by mouth lines, and keys are arranged on the intersection points of the line-row. When the number of keys is more, I/O port lines can be saved. But when the number of the keyboards is more, more singlechip port lines are occupied. Moreover, the scanning code cannot be directly obtained in both modes, and the scanning code must be obtained through calculation.

At present, the key is the most commonly used input method, and the common key circuit has two types, namely one-to-one direct connection and dynamic scanning matrix connection.

One-to-one direct connection is that one key corresponds to one CPU input port, and when the CPU input port is in a high level normally, a certain key is pressed to be in a low level. The one-to-one direct connection key circuit is simple in connection, but can be directly used when the number of keys is small and the number of input ports is large, and when the number of keys is large, the number of input ports may not be enough, so that a matrix type key circuit is required.

The matrix key circuit is formed by arranging keys in a row-column matrix manner, wherein each row shares one scanning line, each column shares one interrupt line, and if 9 keys are arranged, only 6 ports are needed. Assuming that the effective level of the pressed key is low level, the effective level of the lifted key is high level, when the level of the interrupt line is detected to be low level, the pressed key is considered to be pressed, otherwise, the pressed key is considered to be lifted. However, due to the jitter of the mechanical layer of the key or the external environment, the key scanning algorithm may have poor interference resistance, and cannot accurately detect whether the key is pressed or lifted, or even detect no low level at all. In the key scanning in the prior art, the peripheral key scanning module detects the key function, the row and column layout has limitation, IO layout needs to be realized according to the key scanning module design, the power consumption is large, and the flexibility of circuit design is reduced.

In addition, after the system is dormant, a matrix key circuit with special requirements of the system needs to be awakened by a key, a pull-down resistor is connected below a scanning line on the common matrix key circuit in series, after the key is pressed, the level of an interrupt line is pulled down and then is always low due to the serially connected pull-down resistor, so that the portability of a general key scanning algorithm is poor, and the key scanning algorithm cannot be used for detecting the matrix key circuit with special requirements.

The problems of the prior art include:

1. the combination key can not be realized without key scanning module and IO interruption loss;

2. when the resources are insufficient, the key function cannot be realized;

3. the keys are in a static non-operation state most of the time, and the key scanning module consumes power all the time;

4. the layout of the combined keys is limited by the design of the key scanning module;

5. the debounce process relies on hardware.

Disclosure of Invention

Aiming at the defects of the prior art, the invention provides a chip-based method capable of detecting key operation with high precision, which can solve the technical problem that the chip detects the defects of a large number of key response IO interrupts and the de-jittering process depends on a hardware key scanning module, and realizes a flexible and convenient keyboard design scheme.

Specifically, the invention provides a key identification method of a matrix keyboard, which comprises the following steps:

step 1, after the keyboard is powered on, a main control chip of the keyboard enters a low power consumption mode, a key is pressed down and then a row and a column where the key is located are triggered and connected, a row IO generates a level jump signal, and the level jump signal wakes up the main control chip through an input IO and triggers an IO interrupt;

and 2, the main control chip positions the key position to obtain a key trigger signal, and carries out jitter detection on the key trigger signal to judge whether the key trigger signal is effectively triggered, if so, the key action of the key position is taken as a key identification result, otherwise, the key identification fails, and the main control chip enters a low power consumption mode.

The key identification method of the matrix keyboard, wherein the step 1 comprises the following steps:

and 11, respectively connecting the line IO of the main control chip which is not configured to the wake-up source and the IO interruption with the input end of one diode, collecting the output end of each diode into one path and then connecting the path to another appointed IO, and when the line IO of the main control chip has high-level input, simultaneously enabling the high level to enter the appointed IO configured to the wake-up source through the diodes, waking up the main control chip to work and triggering the IO interruption.

The key identification method of the matrix keyboard, wherein the jitter detection specifically comprises the following steps:

and when IO interruption triggering is detected, starting a timer to scan the rows and the columns of the keys at regular time, judging that the key triggering signal is effective triggering if the row and column results of the pressed keys obtained by each scanning are consistent, and judging that the keys are jittered if the row and column results of the pressed keys are consistent, and taking the key triggering signal as ineffective triggering.

According to the key identification method of the matrix keyboard, the low power consumption mode is that only GPIO (general purpose input/output) which is used as a wake-up source is reserved to work.

The key identification method of the matrix keyboard, wherein the step 2 comprises the following steps: and obtaining a row number with level mutation through the level mutation signal, controlling all the column IO of the keyboard to poll and output a preset level, saving the column number currently outputting the preset level when the row IO of the row number has the preset level input, and saving the row number and the column number as the key trigger signal.

The invention also provides a key identification system of the matrix keyboard, which comprises the following components:

the main control awakening module is used for enabling a main control chip of the keyboard to enter a low power consumption mode after the keyboard is powered on, a row and a column where the key is located can be triggered and connected after the key is pressed down, a row IO generates a level mutation signal, and the level mutation signal awakens the main control chip through an input IO and triggers an IO interrupt;

and the key identification module is used for positioning the key position through the main control chip to obtain a key trigger signal, detecting the key trigger signal in a shaking way to judge whether the key trigger signal is effectively triggered, if so, taking the key action of the key position as a key identification result, otherwise, failing to identify the key, and enabling the main control chip to enter a low power consumption mode.

The key identification system of the matrix keyboard, wherein the main control awakening module comprises:

and the main control awakening submodule is used for respectively connecting the main control chip to the line IO which is not configured to the awakening source and the IO interruption with the input end of one diode, collecting the output end of each diode into one path and then connecting the path to another appointed IO, and when the line IO of the main control chip has high-level input, the high level simultaneously enters the appointed IO configured to the awakening source through the diodes, awakens the main control chip to work and triggers the IO interruption.

The key identification system of the matrix keyboard, wherein the jitter detection specifically comprises:

and when IO interruption triggering is detected, starting a timer to scan the rows and the columns of the keys at regular time, judging that the key triggering signal is effective triggering if the row and column results of the pressed keys obtained by each scanning are consistent, and judging that the keys are jittered if the row and column results of the pressed keys are consistent, and taking the key triggering signal as ineffective triggering.

The key identification system of the matrix keyboard is characterized in that the low power consumption mode is that only GPIO (general purpose input/output) which is used as a wake-up source is reserved to work.

The key identification system of the matrix keyboard, wherein the key identification module comprises: and obtaining a row number with level mutation through the level mutation signal, controlling all the column IO of the keyboard to poll and output a preset level, saving the column number currently outputting the preset level when the row IO of the row number has the preset level input, and saving the row number and the column number as the key trigger signal.

According to the scheme, the invention has the advantages that:

1. the power consumption is ultra-low, only the IO awakening function is reserved, and the chip is flexible and enters the lowest power consumption;

2, the problem of multi-key awakening detection of the matrix can be solved smoothly under the condition of insufficient IO interruption;

3. the single-row and combined keys can be flexibly supported, a plurality of combined keys are supported to be pressed down, and the combined keys are supported to be identified;

4. the chip can realize the key wake-up function as long as the chip supports IO wake-up, and due to high code reusability, the internal parameters can be flexibly configured only after corresponding IO configuration is carried out on rows and columns of a matrix during function initialization, the applicability of the chip with different wake-up time is met, and the jitter removal effect can be configured to have good performance;

5. the matrix keyboard is based on GPIO, and can realize anti-shaking through software, thereby saving the traditional hardware key scanning module, and further achieving the technical effects of reducing power consumption and reducing circuit area.

Drawings

FIG. 1 is a circuit diagram of the present invention;

FIG. 2 is a flow chart of detecting key operation according to the present invention;

FIG. 3 is a block diagram of the system of the present invention.

Detailed Description

The technology of the invention is mainly used for the matrix key detection function, the scheme adopts a mode of regularly scanning and detecting the matrix IO after the key triggers the IO interruption to carry out key shake removal detection operation, and the scheme is provided with: scanning interval, total scanning times, effective times of scanning judgment, a plurality of variable conditions of line IO and column IO of a keyboard, interruption trigger IO and the like, so that the scheme has the characteristics of flexible debugging, convenience in use and wide application range. The outstanding advantage of scheme design lies in when IO breaks down to press a button to detect the use inadequately, adds the diode design in external hardware, can make a plurality of IOs break down through an IO and detect the use, and to a great extent has solved a lot of chips because IO breaks down to lead to not detecting the limitation of a large amount of buttons inadequately.

In order to make the aforementioned features and effects of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

As shown in fig. 1, the circuit of the present invention comprises: D2-D5: diode, PD 7: input GPIO interrupt trigger pin, PD3-PD 6: for keystroke row input, GPIO interrupts for MCU are not enough to handle, PD0-PD2 keystroke row input, corresponding wake-up source and IO interrupts can be configured respectively, PC0-PC2 are keystroke columns (output high).

The row IO that can control matrix keyboard in the procedure all outputs the high level, when the button is pressed, can switch on the row and the row at button place, row IO has the high level input this moment, can trigger IO and break off, the testing procedure can judge through inside inquiry logic which button is pressed, the biggest drawback that can appear this moment is that the row and the row of matrix keyboard are all comparatively many, the IO of chip breaks off or awakens the source and is not enough one-to-one row IO, this kind of condition is a large amount of button detection work that can't satisfy the matrix, the solution: the method includes the steps that diodes are added on row IOs which are not configured with wake-up sources and IO interruption, the diodes are connected to another appointed IO (such as PD7 in fig. 1), when the row IOs have high-level input, the high-level input is simultaneously carried out on the appointed IO through the diodes, the IO only needs one path of IO interruption and corresponds to the wake-up sources, and therefore the problem that the IO interruption or the wake-up sources of a chip are insufficient can be solved, and subsequent program detection work is carried out.

For example, when there are 4 IO interrupt and wake-up sources of the chip, but a matrix keyboard with 10 rows and n columns needs to be detected, it is required that one IO interrupt is configured for each row in order to detect an IO trigger in a matrix keyboard program with 10 rows. The first 3 rows of IO are configured into 3 corresponding IO interruption and awakening sources, and the remaining 6 rows of IO interruption and awakening sources can be used only by 1 path of IO, under the condition, the 6 rows of IO are respectively connected with one diode, then the output of each diode is collected into one path to be connected to the other appointed IO, and the IO can be configured with the remaining path of IO interruption and awakening source. Thus, the hardware configuration and the internal processing of the software are added, and the IO interruption and wake-up source of 4 paths can meet the IO use requirement of 10 paths. The appointed IO refers to PD7 in the picture, the IOs used in the method all belong to one main control chip, namely the PD7 configures the last path of awakening source and IO interruption to be used as trigger interruption, and the corresponding IO pins can be configured according to different main control chips.

As shown in fig. 2, the program flow of the present invention includes: after the keys are initialized, the system enters a dormant state, when the keys are triggered, the system can be awakened to enter GPIO interrupt processing, key scanning is carried out after the triggering, the positions of the keys are detected, debouncing operation is detected regularly, if the key detection is successful and the key positions are reported, otherwise, key identification fails.

The debounce operation process comprises the steps of judging whether a trigger signal of the trigger key is jittered, if so, taking the trigger signal as an invalid signal, abandoning the trigger signal, and if not, taking the trigger signal as an effective signal to perform subsequent signal processing. Specifically, when IO interruption triggering is detected, it is indicated that a key is pressed down or lifted up, at this time, a timer is started, signals of the IO are scanned regularly, after multiple scanning, the specified detection times result is consistent, the IO key is determined to be pressed down or lifted up, otherwise, the IO key is regarded as key shaking, and follow-up operation is not performed.

As shown in fig. 3, the system of the present invention comprises: mcu the operating system includes (sleep mechanism and other mechanisms), the sleep mechanism includes (key sleep wake-up function and other functions), the key sleep wake-up includes (hardware and software), the hardware includes (key detection, key debounce, key report) the flowchart of the process of fig. 2.

Specifically, the detailed steps of the invention are as follows:

1. hardware connectivity and software initial configuration

When the main control chip enters the sleep state, all rows (PD 0-PD 6) of the matrix keyboard and the main control chip IO corresponding to the special IO (PD7) are configured to be in an input pull-down mode, namely, a low level is input. Here, the PD0-PD2 may use 3 wake sources and 3 IO interrupts, and if the main control chip has only 4 wake sources and 4 IO interrupts, the remaining rows PD3-PD6 that are not configured may be respectively connected to a diode, and after connecting these diodes to the PD7, the PD7 may use 1 wake source and 1IO interrupt. Then, the main control chip IO corresponding to all columns (PC 0-PC 3) of the matrix keyboard is in an output high level mode.

2. Work execution flow

(1) Key triggering phase

When a key is pressed down, a row and a column where the key is located are switched on, the output high level of the column IO is input to the corresponding row IO, the row IO is changed from the input low level to the high level to generate a rising edge, thus the dormant main control chip is awakened through the input IO, the awakening chip can trigger IO interruption at the same time, the important point is that the row PD0-PD2 has an own configured awakening source and IO interruption, the high level of the PD3-PD6 can input own IO and can also be input to the PD7 through a diode to trigger the chip IO interruption and the awakening, and when the program detects that the IO interruption is triggered, the software identification key position mode is entered.

(2) Software key position identification stage

After the keys trigger IO interruption, the program can input high level through specific IO rows to judge the rows corresponding to the pressed key positions, then the program can control all IO rows of the matrix keyboard to output high level in a polling mode, when the determined IO rows have high level input again, the program can identify the specific IO rows output high level, the rows corresponding to the pressed key positions are also known, the rows and the columns of the pressed key positions are known, the key position value is also located, the key trigger signal containing the key position value is obtained, and then the software key shaking removing stage can be started.

(3) Software key debounce phase

The internal query logic judges which key is pressed, the program starts a timer, the timer scans and detects corresponding row IO (input high) and column IO (output high) of the pressed key at regular time, the scanning times and time are configurable modes, a user can configure the key through different application occasions, if the scanning result is consistent with the initial result within the specified times and time, the debouncing is completed, the scanned key is determined to be pressed actually, the program reports the key position value, otherwise, the key is shaken, the key is not pressed, and the program does not report the key position value. Key-up debounce is also such an operation.

(4) Key lifting detection stage

When the pressed key is lifted, the corresponding line and column lines of the key are disconnected, the IO of the corresponding line is changed from high level to low level, the interrupt is triggered, and after the key is shaken and is determined to be pressed, the chip enters the dormancy state.

The design has the advantages that:

as used in the above example, the main control chip has only 4 wake-up sources and rows PD0-PD2 of 4 IO interrupt matrix keys, which have already been configured with 3 wake-up sources and IO interrupts, and the remaining rows PD3-PD6 have only 1 wake-up source and 1IO interrupt, and these remaining non-configured rows of IO are respectively connected to diodes, which are then connected to specify an IO, and this IO is configured to have one remaining wake-up source and IO interrupt.

Through a large amount of software processing modes, the defect that a plurality of keys cannot be identified without scanning the peripheral by keys by some main control chips is overcome.

When the low-power chip is used with the key scanning peripheral, the hardware can continuously scan whether the key is pressed or not, so that the chip can be waken continuously, a large amount of power consumption is generated, the key scanning peripheral does not need to be used by using the design scheme, and the power consumption generated by using the key scanning peripheral is avoided

The software design flexibility is higher, the usability is simpler, both single-column and combination keys can be flexibly supported, a user can flexibly configure the software for use according to the corresponding application design, namely the debounce scanning times can be configured, the number of the combination keys can also be configured, and the pin initialization of IO corresponding to rows and columns can also be used through simple configuration.

The application range is wide, and not only the keyboard scheme can use the design, but also the application scheme designed to recognize the keys can be used, such as a mouse, a remote controller and the like.

The following are system examples corresponding to the above method examples, and this embodiment can be implemented in cooperation with the above embodiments. The related technical details mentioned in the above embodiments are still valid in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the above-described embodiments.

The invention also provides a key identification system of the matrix keyboard, which comprises the following components:

the main control awakening module is used for enabling a main control chip of the keyboard to enter a low power consumption mode after the keyboard is powered on, a row and a column where the key is located can be triggered and connected after the key is pressed down, a row IO generates a level mutation signal, and the level mutation signal awakens the main control chip through an input IO and triggers an IO interrupt;

and the key identification module is used for positioning the key position through the main control chip to obtain a key trigger signal, detecting the key trigger signal in a shaking way to judge whether the key trigger signal is effectively triggered, if so, taking the key action of the key position as a key identification result, otherwise, failing to identify the key, and enabling the main control chip to enter a low power consumption mode.

The key identification system of the matrix keyboard, wherein the main control awakening module comprises:

and the main control awakening submodule is used for respectively connecting the main control chip to the line IO which is not configured to the awakening source and the IO interruption with the input end of one diode, collecting the output end of each diode into one path and then connecting the path to another appointed IO, and when the line IO of the main control chip has high-level input, the high level simultaneously enters the appointed IO configured to the awakening source through the diodes, awakens the main control chip to work and triggers the IO interruption.

The key identification system of the matrix keyboard, wherein the jitter detection specifically comprises:

and when IO interruption triggering is detected, starting a timer to scan the rows and the columns of the keys at regular time, judging that the key triggering signal is effective triggering if the row and column results of the pressed keys obtained by each scanning are consistent, and judging that the keys are jittered if the row and column results of the pressed keys are consistent, and taking the key triggering signal as ineffective triggering.

The key identification system of the matrix keyboard is characterized in that the low power consumption mode is that only GPIO (general purpose input/output) which is used as a wake-up source is reserved to work.

The key identification system of the matrix keyboard, wherein the key identification module comprises: and obtaining a row number with level mutation through the level mutation signal, controlling all the column IO of the keyboard to poll and output a preset level, saving the column number currently outputting the preset level when the row IO of the row number has the preset level input, and saving the row number and the column number as the key trigger signal.