阅读说明：本技术 使用目标数字信号的位需求优化的数字信号的改进卷积 (Improved convolution of a digital signal using bit demand optimization of the target digital signal ) 是由 G·米洛特 于 2018-10-15 设计创作，主要内容包括：本发明涉及数字信号的改进的卷积。当第一数字信号与第二数字信号卷积以获得输出数字信号时,随后将使用有限的位数进行转换。为了防止信息丢失,并且因此防止将来转换时输出数字信号的劣化,第一和第二数字信号中的至少一个由合适值形成,这些值将来自第一数字信号的信息存储在输出数字信号的最高有效位内。(The present invention relates to improved convolution of a digital signal. When the first digital signal is convolved with the second digital signal to obtain the output digital signal, a limited number of bits will be used for the conversion subsequently. In order to prevent information loss and thus degradation of the output digital signal at future transitions, at least one of the first and second digital signals is formed of suitable values that store information from the first digital signal in the most significant bits of the output digital signal.)

1. A digital circuit (210a, 210b, 210c) configured to perform a convolution of an input digital signal (S1) and a digital signal representing a transform (St) to obtain an output digital signal (S2), at least one of the input digital signal and the digital signal representing a transform comprising one or more samples obtained by bit demand optimization of a target digital signal.

2. The digital circuit according to claim 1, wherein the transform (St) is an oversampling of the input digital signal.

3. The digital circuit of claim 1, wherein the bit demand optimization comprises defining values of samples of at least one of the input digital signal and the digital signal representing a transform as a first integer divided by a second integer power of 2.

4. The digital circuit of claim 3, wherein the second integer is equal to or less than an upper limit of an application of a decreasing function defining a number of bits as an absolute value of a target sample of the target digital signal.

5. The digital circuit of claim 4, wherein the decreasing function defines a number of bits equal to or less than a maximum number of bits.

6. The digital circuit of claim 4 or 5, wherein the decreasing function is a binary logarithm of a precision number of bits minus the absolute value of the target sample of the target digital signal.

7. The digital circuit according to claim 6, wherein the number of precision bits is defined according to a target precision of the transformation.

8. The digital circuit according to claim 7, wherein said bit demand optimized value comprises a value of said sample selected among a set of suitable values based on said target value of said target sample.

9. The digital circuit according to claim 8, wherein the precision number of bits is equal to the precision number of bits in the digital signal having a form]1/2^N+1；1/2^N]An upper limit of the binary logarithm of the target number of suitable values within the range of (a).

10. The digital circuit of claim 9, wherein the digital circuit has a form]1/2^N+1；1/2^N]Is equal to 6 divided by the average target step between two suitable values,the unit is dB.

11. The digital circuit of any of claims 8 to 10, wherein the set of suitable values is further defined by a maximum suitable value and comprises:

the power of the digits of the precision value of 2, equal to:

first integer value, precision exponentiation of 1 to 2, divided by

2 to the power of the maximum number of bits;

for each range of a plurality of ranges defined by a second integer value, the second integer value comprised between the binary logarithm of the maximum suitable value and the maximum number of bits minus 1:

the number of bits of precision of 2, reduced by a power equal to:

a first integer value raised to the power of 1 to the precision number of bits of 2 divided by the power of 2 to a second integer value.

12. The digital circuit according to claim 3, wherein the second integer is comprised between a minimum number (K) and a maximum number (K + D) and is equal to an increasing function of converting samples to absolute values of differences between representations using a minimum number of bits.

13. The digital circuit according to claim 12, wherein the second integer is comprised between a minimum number (K) and a maximum number (K + D) and is equal to an increasing function of converting samples to an absolute value of a difference between representations using the minimum number of bits divided by a value of the sample.

14. The digital circuit according to any of claims 1 to 13, wherein the input digital signal has an input bit depth (n |)₁) And the output digital signal has a bit depth (n) greater than or equal to the input bit depth (n)₁) Output bit depth (n)₂)。

15. The digital circuit of claim 14, wherein the number representing the transformationThe value of the sample of signal is an integer value, the digital circuitry is configured to perform a complete conversion of a sample of the input digital signal to have the output bit depth (n)₂) And multiplying the converted samples by one or more samples of the digital signal representing the transform.

16. The digital circuit according to claim 15, wherein the value of said sample representing said transformed digital signal is an integer value equal to a suitable value having said input bit depth and belonging to a predefined set of suitable values multiplied by 2 to the power of the difference between said output bit depth and said input bit depth, said digital circuit being configured to perform the conversion of a sample of said input digital signal into a converted sample having said output bit depth and to multiply a converted sample by the value of said sample representing said transformed digital signal.

17. An apparatus (200a, 200b, 200c) comprising:

the digital circuit according to one of claims 14 to 16;

connection to a digital-to-analog converter (220a, 220b, 220c) configured to use a bit depth (n) included in the input bit depth₁) And the output bit depth (n)₂) Conversion accuracy (n) between_c) The output digital signal is converted into a digital output digital signal (S2) to an output analog signal (S2').

18. The apparatus of claim 17, further comprising a connection to one or more attenuators or amplifiers to apply amplitude variations to the output analog signal (S2') using a fixed gain or a variable gain having a finite number of possible values.

19. A method (800) of convolving an input digital signal (S1) and a digital signal representing a transform (St) to obtain an output digital signal (S2), at least one of the input digital signal and the digital signal representing a transform comprising one or more samples obtained by bit requirement optimization of a target digital signal.

20. A computer program product, comprising: computer code instructions configured to perform a convolution of an input digital signal (S1) and a digital signal representing a transform (St) to obtain an output digital signal (S2), at least one of the input digital signal and the digital signal representing a transform comprising one or more samples obtained by bit demand optimization of a target digital signal.

21. A method of creating a first digital signal to be convolved with a second digital signal comprises optimizing the bit requirements of a target digital signal.

Technical Field

The present invention relates to the field of digital signal processing. More particularly, the present invention relates to digital circuits that apply transfer functions, filters, and more generally modify an input digital signal.

Background

Today, signals are often represented, used, and modified in digital form. For example, in the case of visual or image signals, which are typically represented in the form of a digital matrix representing the amplitude of the pixel luminance of one or more color layers, and for audio signals, which are typically represented for one or more audio channels by temporal sampling of the amplitude of a succession of audio tracks on each audio channel.

In many applications, the digital signal may be modified. This is the case, for example, when it is desired to change the amplitude of the audio signal, to modify the brightness or contrast of the image, or more generally to perform filtering on the signal. Signal filtering may be performed for a large number of applications, for example to perform denoising, to adapt the audio signal to be listened to, or more generally to apply any type of effect to the signal.

In practice, the modification of a digital signal is usually performed by convolution with another digital signal. Convolution involves multiplying and adding the values of two signals over a time window to obtain a modified signal. The simplest case of convolution is simply to multiply a sample of the input digital signal by a single coefficient to apply a change in amplitude to the input digital signal and thereby obtain an amplified or attenuated output digital signal.

In many other examples of filters, such as denoising filters, low pass filters, high pass filters, etc. …, a filter may be theoretically applied to an input digital signal by convolving the input digital signal with a signal representing the filter over a time window of infinite size. However, in most cases, the convolution is limited to a window of limited size. A filter defined by multiplying coefficients over a window of finite size is called a Finite Impulse Response (FIR) filter. When such a filter is applied to an impulse or dirac delta function, an output signal called the impulse response of the filter is generated, which is formed by samples having amplitudes equal to the filter coefficients, respectively.

A digital signal is formed of samples stored over a number of bits, referred to as the bit depth of the signal. For example, audio signals typically have a bit depth of 16 or 24 bits, while image signals typically have a bit depth comprised between 8 and 16 bits. When applying filters, transforms, transfer functions or convolutions to the input digital signal, the resulting output digital signal typically has a bit depth that is higher than the bit depth of the input digital signal in order to preserve as much information as possible from the input digital signal and the transforms. For example, the result of the attenuation of a 16-bit input digital signal may be stored on 24 bits or even 32 bits in order to have as high a precision as possible in the output digital signal.

The number of bits typically used by the computing power for computing operations is typically much higher than the number of bits used to store the digital signal. For example, most processors perform operations with 32 bits or 64 bits, while most audio signals have a bit depth of 16, and most image signals have a bit depth of 8. This characteristic is used by digital signal processing systems to achieve as high a filtering accuracy as possible. For example, the attenuation of a signal is typically expressed in dB. A common operation of audio processing involves applying a gain expressed in dB to the audio signal. The number of bits allowed by the processing power is widely used to obtain very accurate values of the amplitude variations of the audio signal. In a similar way, when applying a FIR filter, the maximum number of bits is used in order to obtain an impulse response of the FIR filter that is as close as possible to the theoretical/ideal impulse response.

However, such output signals need to be converted in order to be sensed by the user. For example, the conversion of the audio output digital signal may be performed by a digital-to-analog converter (DAC), which converts the output digital signal to an analog signal for listening using a speaker. For example, the image output digital signal may be viewed by activating pixels of a brightness level defined by the values of the samples of the output digital signal.

It should be noted that this conversion itself, which allows the user to sense the output digital signal, is performed using a defined number of bits. For example, although most audio DACs convert audio samples having bit depths up to 24 bits, in practice lower bit depths (e.g., 21 bits) are used to convert audio digital signals. Thus, the performance of such a DAC corresponds approximately to the 21 most significant bits of the audio digital signal when it is converted into an audio analog signal to be listened to. This loss of information can lead to degradation of the audio signal, which can significantly alter the quality of audio listening.

Similar degradations may also occur when converting other types of digital signals (e.g., digital image signals) after applying the increased number of bits of the transform.

However, when applying a filter to a signal, such information loss due to the conversion of the digital signal may affect not only the signal itself, but also the response of the filter.

Therefore, there is a need for a device that is capable of performing a transformation (e.g., a change in amplitude or filtering) of a digital signal while reducing the degradation perceived by a user of the digital signal when converting the digital signal using a limited number of bits in the future. There is also a need for an apparatus that is capable of performing conversion of a digital signal when said digital signal is converted in the future using a limited number of bits, while reducing the degradation perceived by the user of the conversion.

Disclosure of Invention

To this end, the invention discloses a digital circuit configured to perform a convolution on an input digital signal and a digital signal representing a transformation to obtain an output digital signal, at least one of the input digital signal and the digital signal representing a transformation comprising one or more samples obtained by a bit requirement optimization of a target digital signal.

Advantageously, the transform (St) is an oversampling of the input digital signal.

Advantageously, the bit requirement optimization comprises defining values of samples of the at least one of the input digital signal and the digital signal representing a transform as a second integer power of a first integer divided by 2.

Advantageously, said second integer is comprised between a minimum number (K) and a maximum number (K + D) and is equal to an increasing function using the minimum number of bits to convert the samples into an absolute value of the difference between the representations.

Advantageously, said second integer is comprised between a minimum number (K) and a maximum number (K + D) and is equal to an increasing function of the minimum number of bits divided by the value of the sample to convert the sample into an absolute value representative of the difference between the representations.

Advantageously, the decreasing function defines a number of bits equal to or smaller than the maximum number of bits.

Advantageously, the decreasing function is a binary logarithm of the absolute value of the target sample of the target digital signal subtracted by the number of bits of precision.

Advantageously, the number of bits of precision is defined in terms of the target precision of the transformation.

Advantageously, the value of the bit requirement optimization comprises selecting the value of the sample among a set of suitable values based on the target value of the target sample.

Advantageously, the number of bits of precision is equal to the number of bits in the form of]1/2^N+1；1/2^N]An upper limit of the binary logarithm of the target number of suitable values within the range of (a).

Advantageously, in the form of]1/2^N+1；1/2^N]Is equal to 6 divided by the average target step between two suitable values, in dB.

Advantageously, the set of suitable values is further defined by the maximum suitable value and comprises: the power of the digits of the precision value of 2, equal to: a first integer value raised to the power of 1 to 2 precision digits divided by the power of 2 maximum digits; for each of a plurality of ranges defined by a second integer value comprised between the binary logarithm of the maximum suitable value and the maximum number of bits minus 1: the number of precision bits of 2, reduced by the power of 1, is equal to: a first integer value raised from 1 plus 2 to the power of 2 divided by 2.

Advantageously, said at least one of said input digital signal and a digital signal representative of a transformation comprises a plurality of samples; each sample is associated with a number of bits of precision according to the precision required for the sample; the value of each sample is selected in a discrete set of suitable values defined by at least the number of bits of precision associated with the sample.

Advantageously, the digital signal representing the transform comprises a single sample representing a coefficient to be applied to the amplitude variation of the input digital signal.

Advantageously, the digital circuitry is configured to: determining a maximum absolute value of the input digital signal over a time window; calculating a maximum amplitude variation coefficient based on the maximum absolute value and a predefined maximum saturation coefficient; selecting, among said set of suitable values, a value of said single sample representing an amplitude variation coefficient less than said maximum amplitude variation coefficient, said maximum amplitude variation coefficient being closest to a target amplitude variation coefficient.

Advantageously, the value of one or more samples is selected among the suitable values according to a target value of the samples of the target digital signal and a selection rule of the suitable values.

Advantageously, the selection rule selects a suitable value that is closest to the target value.

Advantageously, the selection rule selects the appropriate value based on a combination of errors between the target value and the appropriate value and the number of additional bits required for the appropriate value.

Advantageously, the selection rule first selects the candidate suitable value that is closest to the target value; if the first integer of the candidate fitness value is an odd number, the selection rule selects (if any) a fitness value from the set of fitness values that is a neighbor of the candidate fitness value, and the first integer of which is a multiple of 4.

Advantageously, the rule is selected: adding the first appropriate value closest to the target value to an empty list of candidate values; iteratively, for each candidate value added to the list of candidate values: defining the candidate value as a first odd integer divided by 2 to a power of a second integer; verifying whether the first additional value (equal to the first odd integer plus 1 divided by the second integer power of 2) is within an error range around the target value; if so, adding the first additional value to the list of candidate values; verifying whether the second additional value (equal to the first odd integer minus 1 divided by the second integer power of 2) is within an error range around the target value; if so, adding the second additional value to the list of candidate values; the candidate value is selected in a list of candidate values, which has been defined as the first odd integer divided by the power of 2 to the second integer, which is the smallest of the candidate values.

Advantageously, the input digital signal has an input bit depth and the output digital signal has an output bit depth which is higher than or equal to the input bit depth.

Advantageously, the values representing the samples of the transformed digital signal are integer values, the digital circuitry being configured to perform a complete conversion of the samples of the input digital signal into converted samples having an output bit depth, and to multiply the converted samples by one or more samples representing the transformed digital signal.

Advantageously, the value representing a sample of the transformed digital signal is an integer value equal to the value of a suitable coefficient multiplied by 2 raised to the power of the difference between said output bit depth and said input bit depth, said digital circuitry being configured to perform the conversion of a sample of the input digital signal into a converted sample having the output bit depth and to multiply the converted sample by the value representing a sample of the transformed digital signal.

The invention also discloses a device comprising: the digital circuit of the present invention; a connection to a digital-to-analog converter configured to convert the output digital signal to a digital output digital signal to an output analog signal using a conversion precision contained between the input bit depth and the output bit depth.

Advantageously, the apparatus further comprises a connection to one or more attenuators or amplifiers to apply amplitude variations to the output analogue signal using a fixed gain or a variable gain having a finite number of possible values.

The invention also discloses a method of convolving an input digital signal with a digital signal representing a transform to obtain an output digital signal, at least one of said input digital signal and said digital signal representing a transform comprising one or more samples obtained by bit demand optimization of a target digital signal.

The invention also discloses a computer program comprising computer code instructions configured to perform a convolution on an input digital signal and a digital signal representing a transformation to obtain an output digital signal, at least one of the input digital signal and the digital signal representing a transformation comprising one or more samples obtained by a bit requirement optimization of a target digital signal.

The invention also discloses a method of creating a first digital signal to be convolved with a second digital signal, comprising bit requirement optimization of a target digital signal.

The invention also discloses a digital circuit configured to convolve an input digital signal with a digital signal representing a transform to obtain an output digital signal, at least one of said input digital signal and said digital signal representing a transform comprising one or more samples whose values belong to a discrete set of suitable values, wherein: said discrete set of suitable values is defined by at least one decreasing function defining a number of bits as a function of the absolute value of said suitable values; a suitable value is equal to the first integer divided by 2 to the power of a second integer, said second integer being equal to or less than the upper limit of the absolute value to which the decreasing function is applied.

Advantageously, said discrete set of suitable values is further defined by a maximum number of bits; each second integer for each suitable coefficient is equal to or less than the maximum number of bits.

Advantageously, the decreasing function is a binary logarithm of the absolute value of said suitable value subtracted from the number of bits of precision.

Advantageously, the number of bits of precision is defined in terms of the target precision of the transformation.

Advantageously, the number of bits of precision is equal to the number of bits in the form of]1/2^N+1；1/2^N]An upper limit of the binary logarithm of suitable values of the target number within the range of (a).

Advantageously, in the form of]1/2^N+1；1/2^N]Is equal to 6 divided by the average target step between two suitable values, in dB.

Advantageously, the set of suitable values is further defined by the maximum suitable value and comprises: the power of the digits of the precision value of 2, equal to: a first integer value that is a power of a number of bits of precision from 1 to 2 divided by a maximum number of bits of power of 2; for each of a plurality of ranges defined by a second integer value comprised between the binary logarithm of the maximum suitable value and the maximum number of bits minus 1: the number of precision bits of 2, reduced by the power of 1, is equal to: a first integer value raised to the power of 1 to the precision number of bits raised to 2, and raised to the power of 2 to the precision number of bits raised to 2 divided by a second integer value raised to the power of 2.

Advantageously, one of the input digital signal and the digital signal representing the transform comprises a plurality of samples; each sample is associated with a plurality of precision bits according to the precision required for the sample; the value of each sample belongs to a discrete set of suitable values defined at least by the number of precision bits associated with the sample.

Advantageously, the digital signal representing the transform comprises a single sample representing a coefficient to be applied to the amplitude variation of the input digital signal.

Advantageously, the digital circuitry is configured to: determining a maximum absolute value of the input digital signal over a time window; calculating a maximum amplitude variation coefficient based on the maximum absolute value and a predefined maximum saturation coefficient; selecting a value for the single sample among the set of suitable values, the suitable value representing a magnitude change coefficient that is less than the maximum magnitude change coefficient that is closest to a target magnitude change coefficient.

Advantageously, the value of one or more samples is selected among the suitable values according to a target value and a selection rule of suitable values.

Advantageously, the selection rule selects a suitable value that is closest to the target value.

Advantageously, the selection rule selects the appropriate value based on a combination of errors between the target value and the appropriate value and the number of additional bits required for the appropriate value.

Advantageously, the selection rule first selects the candidate suitable value that is closest to the target value; if the first integer of the candidate suitable values is an odd number, the selection rule selects (if any) a suitable value of the set of suitable values that is a neighbor of the candidate suitable value, and whose first integer is a multiple of 4.

Advantageously, the rule is selected: adding the first appropriate value closest to the target value to an empty list of candidate values; iteratively, for each candidate value added to the list of candidate values: defining the candidate value as a first odd integer divided by 2 to a power of a second integer; verifying whether the first additional value (equal to the first odd integer plus 1 divided by the second integer power of 2) is within an error range around the target value; if so, adding the first additional value to the list of candidate values; verifying whether the second additional value (equal to the first odd integer minus 1 divided by the second integer power of 2) is within an error range around the target value; if so, adding the second additional value to the list of candidate values; a candidate value is selected in a list of candidate values, the candidate value being defined as the first odd integer divided by 2 to the power of a second integer, the second integer being the smallest of the candidate values.

Advantageously, the input digital signal has an input bit depth and the output digital signal has an output bit depth which is higher than or equal to the input bit depth.

Advantageously, the value representing a sample of the transformed digital signal is an integer value, the digital circuitry being configured to perform a complete conversion of a sample of the input digital signal into a converted sample having an output bit depth, and to multiply the converted sample by one or more samples representing the transformed digital signal.

Advantageously, the value representing a sample of the transformed digital signal is an integer value equal to the value of a suitable coefficient multiplied by 2 raised to the power of the difference between said output bit depth and said input bit depth, said digital circuitry being configured to perform the conversion of a sample of the input digital signal into a converted sample having the output bit depth and to multiply the converted sample by the value representing a sample of the transformed digital signal.

The invention also discloses a device comprising: the digital circuit of the present invention; a connection to a digital-to-analog converter configured to convert the output digital signal to a digital output digital signal to an output analog signal using a conversion precision comprised between the input bit depth and the output bit depth.

Advantageously, the apparatus comprises a connection to one or more attenuators or amplifiers to apply amplitude variations to the output analogue signal using a fixed gain or a variable gain having a finite number of possible values.

The invention also discloses a method of convolving an input digital signal with a digital signal representative of a transform to obtain an output digital signal, at least one of said input digital signal and said digital signal representative of a transform comprising one or more samples whose values belong to a discrete set of suitable values, wherein: said discrete set of suitable values is defined by at least a decreasing function defining a plurality of bits as a function of the absolute value of said suitable values; each suitable value is equal to the first integer divided by 2 to the power of a second integer equal to or less than the upper limit of the absolute value to which the decreasing function is applied.

The invention also discloses a computer program product comprising computer code instructions configured to perform a convolution of an input digital signal and a digital signal representing a transform to obtain an output digital signal, at least one of said input digital signal and digital signal representing a transform containing one or more samples whose values belong to a discrete set of suitable values, wherein: said discrete set of suitable values is defined by at least a decreasing function defining a plurality of bits as a function of the absolute value of said suitable values; each suitable value is equal to the first integer divided by 2 to the power of a second integer equal to or less than the upper limit of the absolute value to which the decreasing function is applied.

The invention also discloses a method of creating a first digital signal to be convolved with a second digital signal, comprising: obtaining a target value of a sample of the first digital signal; for each target value of the sample, selecting a suitable value belonging to a set of suitable values, wherein: said discrete set of suitable values is defined by at least a decreasing function defining a plurality of bits as a function of the absolute value of said suitable values; each suitable value being equal to the first integer divided by 2 to the power of a second integer, said second integer being equal to or less than the upper limit of the absolute value to which the decreasing function is applied; the value of the sample is set to the appropriate value.

The present invention greatly improves the perception of the digital signal and/or its transformations by the user.

The invention is applicable to any system that performs a convolution of two digital signals in order to improve the perception of the resulting digital signal by the user.

The present invention can be tailored to provide a compromise between improving the user's perception of one of the two digital signals being convolved and the proximity of the second signal to the target digital signal.

The present invention can be applied to the number of bits of an input digital signal and an output digital signal, and the number of bits for converting the output digital signal.

Drawings

The present invention may be better understood, and its numerous features and advantages made apparent from the following description of various exemplary embodiments, which are provided for purposes of illustration only, and the accompanying drawings of which:

FIGS. 1a and 1b show two digital signals, respectively;

FIGS. 2a, 2b and 2c show three examples of devices in various embodiments of the invention;

FIG. 3 shows an example of a system for managing audio devices in an automobile in various embodiments of the invention;

FIG. 4 shows an example of a compressor apparatus in various embodiments of the present invention;

FIG. 5 shows an example of an audio amplifier device in various embodiments of the invention;

FIG. 6 shows an example of a high fidelity processor in various embodiments of the invention;

FIG. 7 shows an example of a mixer in various embodiments of the invention;

FIG. 8 illustrates a method of performing convolution of two digital signals in various embodiments of the present invention;

FIG. 9 illustrates a method of creating a first digital signal to be convolved with a second digital signal in accordance with the present invention;

10a, 10b and 10c show the frequency response of a prior art low-pass filter whose coefficients are quantized with 16 bits, the frequency response of a low-pass filter of the invention and the impulse response of a low-pass filter of the invention, respectively;

11a, 11b and 11c show the frequency response of a prior art RIAA filter whose coefficients are quantized using 16 bits, the frequency response of a RIAA filter of the present invention and the impulse response of a RIAA filter of the present invention, respectively;

fig. 12a, 12b and 12c show the impulse responses of a low pass filter according to the invention using 8-bit coefficients, 16-bit coefficients and 8 to 16-bit coefficients optimized with respect to bit requirements, respectively.

Detailed Description

Fig. 1a and 1b show two digital signals, respectively.

Fig. 1a schematically shows a first digital signal S.

The signal S1 is defined by a plurality of successive time values called samples, each sample having a value or amplitude. The signal itself as a whole has an amplitude which may be referred to in particular by the difference between the maximum and minimum (possibly negative) values exhibited by the signal, by half of the difference or by the average of the absolute values of the values exhibited by the signal.

The first signal S1 shows consecutive samples defining the amplitude of the signal at consecutive times t1, t2, t3, t4, t5 … …. The continuous time may be sampled at different frequencies. For example, the audio signal may be sampled at 22050Hz (22050 samples per second), 24000Hz, 44100Hz, 48000Hz, 88200Hz, or 96000 Hz.

The first signal S1 is represented in digital form such that each sample at times t1, t2, t3, t4, t5 has a value or amplitude V1, V2, V3, V4, V5, … …, and each is equal to the discrete level ND. The number of discrete levels may depend on the representation of each sample. A number of different representations of the signal S1 are possible.

For example, the samples of signal S1 may be represented using signed 16-bit integers, i.e., using-32768 (-1x 2)¹⁵) To 32 767(2¹⁵-1) integer values in the range from-1 to 1 (exactly 1-2) respectively¹⁵Since the highest value that can be obtained is equal to) Of the scale of (a). Similarly, the samples of signal S1 may be represented using signed 24-bit integers, i.e., using-8388608 (-1x 2)²³) To 8388607 (2)²³-1) integer values in the range from-1 to 1 (exactly 1-2) respectively^-23Since the highest value that can be obtained is equal to

) Of the scale of (a). It can generally be seen that the more bits used to represent a signal, the higher the accuracy that can be obtained in the amplitude of the signal. 16-bit signed integers and 24-bit signed integers are used to represent audio signals in 16-bit and 24-bit PCM (pulse code modulation), respectively.

The samples of signal S1 may also be represented using unsigned integers. For example, representations using unsigned 16-bit integers use from 0 to 65535 (2)¹⁶-1, corresponding to an unsigned integer value from 0X0000 to 0xFFFF, where 0X0000 corresponds to zero), and using a representation of a 24-bit integer from 0 to 16777215 (2)²⁴1, corresponding to hexadecimal values from 0x000000 to 0XFFFFFF, where 0x000000 corresponds to zero).

These examples are provided by way of example only, and so long as the bit depth used is sufficient to represent a signal with the requisite precision, the signal S1 may be represented using an unsigned or signed integer of any bit depth. The signal S1 may also be represented using discrete values that are not integers (e.g., floating point values).

The signal may also be represented by a floating point representation conforming to the IEEE 754 standard, where the normalization step is applied to the exponent and mantissa, and the representation includes additional bits that are always equal to 1, and thus remains implicit.

Here, the first signal S1 represents a sound signal. Then, the first values V1, V2, V3, V4, V5, … … may be values of acoustic overpressure or underpressure, or voltage values representing the sound signal, or digital values without any specific element attached, which represent the sound signal.

As a variant, the first signal may also represent a luminous signal, a radio signal, or a position or evolution of any other quantity of the object over time.

Fig. 1b shows an example of a digital signal representing an image. In such a signal, the value of the sample corresponds to the value of the luminance intensity of the pixels of the color layer. The pixels are represented by their position starting from a corner of the image, e.g. the upper left corner.

In the example of FIG. 1b, the image is formed by a single color layer having a bit depth of 8 bits. Thus, each value represents the luminance intensity of a unique gray level of the image, ranging in scale from 0 (no luminance-black) to 255 (2)⁸Maximum brightness-white). In the example of fig. 1b, pixel 101b has a value corresponding to 157 of medium gray, pixel 102b has a value corresponding to 206 of light gray, and pixel 103b has a value of 6 corresponding to very dark gray.

This example is provided as an example only. There are many other representations of pixels of an image. For example, the values of the pixels may be stored using different bit depths, such as 12 bits or 16 bits. Similarly, an image may contain more than one color layer. For example, an image may include 3 color layers corresponding to RGB (red green blue) components of a color, 3 color layers corresponding to YCbCr (luminance blue chrominance red chrominance) components of an image, or 4 color layers corresponding to CMYK (cyan magenta yellow black) colors of an image. In these cases, each pixel may contain up to 3 or 4 values corresponding to the components of the image.

Fig. 2a, 2b and 2c show three examples of the device of the invention.

Fig. 2a shows a first example of a device according to the invention.

The device 200a is configured to apply a transformation to the input digital signal S1. The input digital signal S1 may be any digital signal, in particular the digital signal discussed with reference to fig. 1a and 1bOne of the numbers. The input digital signal S1 is characterized by a sampling frequency f₁And input bit depth n₁. In various embodiments of the present invention, the sampling frequency and/or bit depth of the input digital signal may vary over time. In such embodiments, the input digital signal S1 may be divided into successive time windows, where the signal S1 has a constant sampling frequency and bit depth, and the present invention may be applied to each time window separately. Similarly, the input digital signal may include multiple channels (e.g., left and right channels of a stereo audio file). In this case, the present invention can be applied to each channel in parallel.

To apply the transform, the device 200a comprises processing logic 210a configured to perform a convolution of the input digital signal S1 and a digital signal St representing the transform to obtain a transformed output digital signal S2. During this application, the signal St will generally be referred to as "transform signal".

The operation of convolution may be performed, for example, by multiplication and addition of signals S1 and St, such as: https:// en. wikipedia. org/wiki/convention explained. In various embodiments of the present invention, the convolution of St corresponds to the application of a Finite Impulse Response (FIR) filter to the input digital signal S1, as explained, for example, in https:// en. wikipedia.org/wiki/finish _ impulse _ response. In this case, the value of each sample of St corresponds to the coefficient of the FIR filter, and when the input digital signal S1 is Dirac, the output digital signal S2 is the impulse response of the FIR filter, i.e., each sample of S2 is equal to the sample of St, i.e., the coefficient of the FIR.

As will be discussed in more detail below, the transformation may be any type of transformation of the input digital signal S1. For example, the transformation may be applied to an input digital signal S1a filter, such as a low pass, high pass, denoising filter, or any other type of filter. In various embodiments of the present invention, signal St comprises a single sample of coefficients representing the amplitude variation of input digital signal S1. In such embodiments, the device 200a is configured to perform attenuation or amplification of the input digital signal S1.

In this application, the processing logic may be a processor operating in accordance with software instructions, a hardware configuration of the processor, or a combination thereof. The processing logic may also be special purpose processing logic such as a DSP (digital signal processor) or FPGA (field programmable gate array). It should be understood that any or all of the functions discussed herein may be implemented in a purely hardware implementation and/or by a processor operating in accordance with software instructions and a configuration of a machine learning engine or neural network. The processing logic may also be a multi-core processor, a series of processors, or a combination thereof that perform operations in parallel. It should also be understood that any or all of the software instructions may be stored in a non-transitory computer readable medium. The term "configuration of processing logic" refers to any unit (e.g., hardware configuration, software instructions, machine learning, training, or neural networks, or any other suitable unit or combination thereof) that configures processing logic to perform operations. Processing logic may also be referred to as "digital circuitry".

The output digital signal S2 is further provided to a digital-to-analog converter (DAC)220a to be converted into an analog digital signal S2'. The analog-digital signal S2' may be sensed directly or indirectly by a user or another device. For example, if the signal is an audio signal, the analog output signal S2' may be provided to a speaker so that the audio track is heard by the user.

In the embodiment shown in fig. 2a, the conversion is performed using an external DAC220 a to obtain an analog output signal S2'. However, the present invention is not limited to this example. For example, the conversion may be performed using a DAC within the device 200 a.

In other embodiments of the present invention, rather than converting to a digital output signal using DAC220 a, the output digital signal may also be converted to other digital output signals using a digitizer that uses conversion having a bit depth that is less than the bit depth of the output digital signal. This is the case, for example, when the audio signal is transmitted to the audio device in digital form using a wireless transmission protocol. An example of such a system is Apple airport^TMSystems in which an audio stream is transmitted at 44.1KHz, typically in digital form using 16-bit samples. If it is notThe output digital signal S2 has a bit depth greater than 16 bits, information from the input digital signal S1 may be lost for the same reason as when a DAC is used.

The signal St representing the transform has a bit depth n_tAnd the output digital signal has an output bit depth n₂. The input digital signal S1, the transform signal St and the output digital signal S2 may be stored to perform a convolution on the memory of the device 200a according to their respective bit depths.

In an exemplary apparatus that performs attenuation of an audio signal, the input digital signal S1 has a bit depth of 16, the transform digital signal St includes a single sample having a bit depth of 8, and the output digital signal has a bit depth of 23 or 24 bits (23 bits (22 bit data +1 bit sign if the input digital signal and the transform digital signal are both signed integers, and 24 bits otherwise), and is obtained by multiplying the input digital signal S1 by the unique sample of the transform digital signal St.

The DAC220 a converts the output digital signal S2 into a converted output digital signal S2' with an accuracy (in terms of number of bits) that will be defined hereinafter as "conversion accuracy". Most DACs currently on the market for audio applications, although used as input signals up to 24 bits, have a low conversion accuracy (e.g. 21 bits). In the example of fig. 2a, the DAC220 a has a conversion accuracy of 21 bits, which means that although the output analog audio signal D2 'is created based on 24 bits of the output digital signal S2, the output analog audio signal D2' is capable of faithfully reproducing only the 21 most significant bits of D2.

As explained above, in prior art systems, when performing convolution to apply a function, as many bits as possible are used to make the definition of the transform as accurate as possible. For example, in a related art apparatus for performing amplitude variation of an audio signal, in order to perform very precise amplitude variation, a transform signal and an output digital signal have a very large number of bits. For example, prior art systems for varying the amplitude of variation of an audio signal often use an output digital signal having a bit depth of 24 or 32, and apply coefficients of amplitude variation tailored to apply very precise gain, e.g., -30,00 dB. However, this implies that information related to the input digital signal is distributed into all bits of the output digital signal. Since the DAC typically provides conversion accuracy corresponding to a number of bits smaller than the bit depth of the output digital signal, a large portion of the information from the input digital signal is lost, and this results in a degraded audio track. In particular, analog output audio for such systems suffers from distortion associated with signal truncation.

This problem affects not only the audio track but also other types of digital signals, such as image signals.

In various embodiments of the present invention, to overcome this problem, the samples of the transform signal St are obtained by applying an operation called "bit demand optimization" to the samples of the target transform signal. The target transform signal represents a transform signal that would be applied if the present invention were not used. For example, it corresponds to an impulse response of the filter to be applied or to a as accurate as possible representation of the amplitude variation coefficients to be applied.

Bit demand optimization includes modification of the values of the samples so that the value of the optimized sample can be represented using as many bits as possible. Thus, when a sample of another signal is multiplied or convolved with the optimized sample, the result of the operation is stored in the most significant bits of the output digital signal. For example, if a gain is applied to an input digital signal having a bit depth of 16 bits, an output digital signal having a bit depth of 24 bits is obtained by multiplying the input digital signal by a transform signal containing integer coefficients having a bit depth of 8 bits. The target sample of transform coefficients has a target value of 129, corresponding to the gain coefficientThe target value 129 corresponds to the binary value 10000001 and requires 8 bits to represent. Thus, the digital signal and coefficients are input

The product of (c) requires 8 additional bits to represent without error.

Bit requirement optimization for converting digital signalsTo include the gain value

Replacement of

The gain valueCorresponding to the binary value 10000000 and requiring 8 bits to represent. Thus, such optimized coefficients have values very close to the target coefficient, but require only one bit to represent. Thus, the digital signal is input with optimized coefficients

Only 1 additional bit is needed to represent the product without error. This does not significantly affect the transformation applied to the input digital signal, but may significantly reduce information loss when the output digital signal is converted using a limited number of bits.

In various embodiments of the present invention, bit requirement optimization of a transform signal depends on the value of the target transform signal. In practice, the precision required to represent these values may depend on the value of the target transform signal. More specifically, values very close to zero, corresponding to very low gains, can be represented with higher precision than higher values and therefore with a higher number of additional bits.

The bit requirement optimization of the transformed signal may also depend on the required precision of the samples of the transformed signal.

Fig. 2a shows an example of obtaining a transformed signal by bit demand optimization of a target transformed signal in order to preserve information from an input digital signal. In other embodiments of the present invention, the input digital signal is obtained by bit demand optimization of the target input digital signal to preserve information from the converted digital signal, or the input digital signal and the converted digital signal are obtained by bit demand optimization of the target input digital signal and bit demand optimization of the target converted digital signal, respectively, to preserve information from both the input digital signal and the converted digital signal.

One example of bit requirement optimization includes selecting the values of the samples of the transform signal St to be able to perform the required transform while preserving as much information as possible from the input digital signal S1 in the most significant bits of the output digital signal S2 to preserve that information when converted by the DAC220 a.

To do so, the transform signal St comprises one or more samples whose values belong to a discrete set of suitable values defined at least by a decreasing function defining the number of additional bits as a function of the absolute value of said suitable values. Each suitable value is equal to the first integer divided by 2 to the power of a second integer equal to or less than the upper limit of the absolute value to which the growing function is applied.

The transformation signal St is thus formed by suitable coefficients, which may be in the form ofWherein k is an integer and n is defined as a formIs a decreasing function of the appropriate coefficients in (1).

Will be adopted throughout the present specification as

The coefficients of the transform signal St. In fact, an interesting property of this formula is that it allows to characterize the number of bits required to save all the information of the input digital signal. For example, if the input digital signal has an input bit depth n₁16 and multiplied by a factor

All information of the input digital signal can be stored using the integer value represented on the 16+ 4-20 bits. If the output digital signal S2 has a bit depth n 2-24 bits and the DAC220 a provides 21 bits of conversion accuracy, it will be appreciated that, after applying the transform,the information from the input digital signal S1 is contained within the 20 most significant bits of S2, and the output analog signal S2 'will contain all the information from S1, thereby avoiding the above-described problems in the output analog signal S2'.

Now, if in the same configuration, the input digital signal S1 is multiplied by a factorAll information of the input digital signal may be stored using an integer value represented by 16+ 6-22 bits in the output digital signal S2. Thus, at a conversion with 21-bit precision, a small amount of information may be lost during the conversion by the DAC220 a. However, this information loss is still much smaller than that produced by using randomly selected coefficients that will distribute the information from the input digital signal S1 over the entire range of the output digital signal S2.

The number of bits required for each suitable coefficient to hold all the information from the input digital signal S1 will be referred to as the "additional number of bits". The object of the invention is to obtain as low an additional number of bits as possible and thus to preserve as much information as possible from the input digital signal, while ensuring that the target transform can be applied with the required accuracy.

An important property of the fitness value of the invention is that the lower the absolute value of the fitness value, the higher n can be, since n is obtained as a growing function of the fitness value. This makes it possible to use an additional number of bits, which is lower for high values and higher for low values. In fact, in many applications, the input digital signal S1 is multiplied by a low value. This is the case, for example, when important attenuation is applied to the audio digital signal, thus corresponding to multiplication by a coefficient close to zero. This is also the case when an FIR filter having a large number of coefficients is applied to the input digital signal S1. Generally, the values of the coefficients of the FIR filter decrease with the number of FIR coefficients.

Thus, the device 200a allows to multiply the value of a sample of the input digital signal S1 by a value having a low value nAnd therefore has a low number of additional bits for high coefficients, and a value with a higher value nAnd therefore has a high number of additional bits for low coefficients whose absolute values are closer to zero. For low coefficients with an absolute value close to zero it is necessary to use a higher number of additional bits in order to have enough steps between the two coefficients. Therefore, the information of the input digital signal S1 is saved by using as low an additional bit number as possible according to the value by which the input digital signal is to be multiplied.

In embodiments of the present invention, the discrete set of suitable coefficients is further defined by a maximum number of bits, and each second integer for each suitable coefficient is equal to or less than the maximum number of bits.

This allows setting the boundaries of the additional number of bits. For example, if the maximum number of bits is equal to 8, each suitable value may be in the form of n ≦ 8And (4) showing. Therefore, a maximum number of additional bits of 8 is used. In the example shown in fig. 2a, the bit depth of the input digital signal S1 is equal to 8, using a maximum number of bits of 8 allows all information from S1 to be preserved within the output digital signal S2 having a bit depth of 16+ 8-24.

However, this limits the range of values of the samples that can be used. For example, using a maximum number of bits equal to 8 means that the absolute value of all suitable coefficients is at least equal to

In various embodiments of the present invention, the decreasing function is a binary logarithm of the absolute value of the proper value subtracted from the number of bits of precision.

The number of bits of precision defines a trade-off between the number of additional bits used by each fitness coefficient and the number of fitness coefficients available, while the use of a binary logarithm as a favorable condition sets the number of additional bits according to the absolute value of the fitness coefficient.

For example, if the number of bits of precision is equal to 3:

at a suitable value [ 1/2; 1[ within an absolute value range, a second integer n may be defined such that:

CEILING(3–log2(1/2))≥n>CEILING(3–log2(1))；

CEILING(3–(-1))≥n>CEILING(3–0)；

CEILING(4)≥n>CEILING(3)；

4≥n>3；

thus n is 4, and ranges]1/2；1]May be in the range]1/2；1]Form (A) to (B)Is selected, that is, the value

At ] 1/4; 1/2], a second integer n may be defined such that:

CEILING(3–log2(1/4))≥n>CEILING(3–log2(1/2))；

CEILING(3–(-2))≥n>CEILING(3–(-1))；

CEILING(5)≥n>CEILING(4)；

5≥n>4；

thus n is 5 and ranges]1/4；1/2]May be in the range]1/4；1/2]Form (A) to (B)Is selected from the values in (1), that is, the values

Thus, the use of binary logarithm naturally defines the form as]1/2^N+1；1/2^N]All of which contain the same number of suitable values. Therefore, it is possible to fit the set of coefficientsThe value of the sample of the transform signal St is selected with an accuracy approximately proportional to the value of the fitting coefficient itself, and the number of additional bits is ensured to be as low as possible according to the value of the fitting coefficient and the number of bits of accuracy.

Thus, the number of bits of precision NPREC defines a form of]1/2^N+1；1/2^N]Number of suitable values in each range of values of (a), which is equal to 2^NPREC。

The number of bits of precision may be defined in terms of the target precision of the transformation. This allows to ensure that each suitable coefficient uses an additional number of bits just sufficient to apply the suitable coefficient to the target precision.

For example, can be in the form of]1/2^N+1；1/2^N]Define a target number of suitable values within each range. The number of suitable values in this range is equal to 2^NPRECThe number of bits of the precision NPREC can be set to have a form]1/2^N+1；1/2^N]An upper limit of the binary logarithm of the target number of suitable values in the range of (a).

In various embodiments of the invention, in the form of]1/2^N+1；1/2^N]Is equal to 6 divided by the average target step between two suitable values, in dB.

In other words, it should be noted that in an embodiment, the value of the appropriate sample represents a change in the amplitude of the input digital signal S1 expressed in dB, the form]1/2^N+1；1/2^N]Has an amplitude of 6 dB. Thus, by dividing 6 by the average target number of steps between two appropriate values, the target number of appropriate values in dB can be obtained directly within the range. This therefore defines the optimum number of bits of precision to bring the set of suitable values to the target precision, while retaining as low an additional number of bits as possible for each suitable value and preserving the maximum amount of information per sample from the input digital signal S1.

This allows the definition of a set of suitable values. For example, the following table defines a set of suitable values corresponding to suitable values comprised between 0 and 4 for an average target step of 0,75dB between the two values and a maximum number of bits of 8.

Based on this information, it can be found to have a form]1/2^N+1；1/2^N]8(6/0,75) suitable values for each range required. Therefore, the number of bits with the accuracy NPREC of log2(8) of 3 is selected.

A set of suitable values may be defined by setting suitable values defined as follows, for example the set shown in table 1 below:

the power of 2 digits of the precision value, respectively equal to the first integer value, the power of 1 to 2 digits of precision divided by the power of 2 maximum digits. In this example, this corresponds to 16 (2) at the bottom of the table⁴) Value, which corresponds to slave

To

Is appropriate (i.e., from 1 to 2)⁴By a first integer value of 2⁸And 8 is the maximum number of bits here;

for each of a plurality of ranges defined by a second integer value comprised between the binary logarithm of the maximum suitable value and the maximum number of bits minus 1:

the bit reduction of precision 2 by a power of one, respectively equals:

a first integer value from 1 plus 2 bits of precision minus the power of 1 to the power of 2 bits of precision divided by

2 to the power of a second integer value.

In the present example, the maximum appropriate value is set to 4. Thus, it may be obtained using a second integer value equal to log2(4) +1 ═ 2+1 ═ 3. Thus, for each second integer value n from 2 to 7(8-1), 8 (2) is defined^4-1) Suitably values, respectively, equal to and contained in 2^4-1+1 ═ 9 to 2⁴-16, said first integer value divided by 2ⁿI.e. from

To

For n-3, …, 7. Thus, each second integer value n defines a range of one value, and the set of suitable values thus obtained may be represented in the following table:

table 1-set of up to 4 suitable values, with 3-bit precision, and a maximum number of bits of 8

As shown in the table above, the set of fitness values defines a complete fitness value range. Each row represents a suitable value and the columns have the following meanings:

the range is as follows: appropriate value ranges are defined. When the values are expressed in dB, a range is defined for each second integer value, and corresponds to a range of variation of 6dB in amplitude;

a first integer value: a first integer value k defining a suitable value;

a second integer value: defining a second integer value (n) of suitable values;

appropriate values: the 4 columns represent each appropriate value in 4 different ways:

fraction 1: a second integer (n) to the power of a first integer (k) divided by 2;

and 2, fraction: represents a simplification of the fraction 1, if possible, as an odd integer divided by 2 to as small an integer power as possible. Interestingly, this representation provides a direct indication of the number of additional bits required by the appropriate coefficients;

decimal value: representing each suitable coefficient as a decimal value;

decibel: each suitable coefficient is expressed in decibels.

For example, a suitable value defined by the following row in the range "-6/-12 dB":

with a first number k equal to 12 and a second number n equal to 5. Thus, the appropriate value may be expressed as:

this suitable value satisfies all the conditions defined above:

it can be expressed as a scoreWherein k is 5 and n is 5;

where 3 is the number of bits of precision and 0,375 is a suitable value.

It should therefore be noted that not all values in the set of suitable values defined by the present invention are suitable values. E.g., equal to-6/-12 dB in the same range

The value of (a) will not be appropriate. In practice, this fraction cannot be further reduced to a lower power of division by 2, and 6 is not a suitable value for the second integer in the range "-6/-12 dB". In fact, the condition is not satisfied Since n is 6, and

in other words, the coefficients

The required number of additional bits is too high and it is preferable to use the coefficients defined in table 1 which use a lower number of additional bits in the range of "-6/-12 db" and thus reduce artifacts generated when converting the output digital signal with a limited number of conversion bits. Thus, the set of appropriate values of the present invention provides a set of values that match the required precision within each range of values, while requiring as few additional bits as possible depending on the target precision and range (where the appropriate values are found).

As explained above, suitable values

Can also be written as

This form is interesting because it represents the appropriate value as an odd number divided by the lowest possible power of 2. This means that the input digital signal can be multiplied by the appropriate value by using only 3 additional bits. Even in practice, the multiplication by the input digital signal is madeBy multiplication, the information from the input digital signal will be stored in the most significant bits of the output digital signal, which is equal to the number of bits of the input digital signal plus the number of additional bits.

It should be noted that the above table is written for positive values. However, the present invention is not limited to this case, and the same principle may be used to define a negative appropriate value.

A higher number of precision bits may also be used for obtaining a more suitable value, even if some of them use more additional bits in each range, or use a lower number of precision bits to use even fewer additional bits in each range, but with a lower number of suitable values, and therefore with a lower precision.

For example, the following table defines a set of suitable values corresponding to suitable values comprised between 0 and 4, an average target step of 1,5dB between the two values and a maximum number of bits of 8.

Based on this information, each of the forms can be found]1/2^N+1；1/2^N]The range of (2) requires a suitable value of 4(6/1, 5). Therefore, a plurality of bits with the precision NPREC of log2(4) of 2 are selected. Suitable values comprised between 0 and 4 are indicated in the following table:

table 2-set of up to 4 appropriate values with 2-bit precision and a maximum number of bits of 8 bits

It may be noted that in the above example, setting the maximum number of bits to 8 limits the attenuation that can be achieved by a suitable value. In practice, the lowest suitable value here is 1/2⁸Which corresponds to an attenuation of about 48 dB. However, the present invention is not limited to this example, and a different maximum number of bits may be used. For example, the following table corresponds to a set of up to 4 suitable values, with a precision of 2 bits. Compared to table 2, the maximum number of bits is set to 9:

table 3-set of up to 4 appropriate values with 2-bit precision and a maximum number of bits of 9 bits

Thus, the set of Table 3 contains, in addition to the appropriate coefficients that have been found in Table 2, the coefficients that may be found in that formThe coefficients written, where n is 9. Thus, the set defined in Table 3 defines down to

Corresponding to an attenuation of the signal as low as around-54 dB.

It may also be noted that in the set of suitable values defined in table 2, in each sub-range, a lower number of additional bits are used for the suitable values. For example, in the range "-6/-12 dB":

in the set defined in table 1, the second integer value is equal to 5, which means that each suitable value may be in the form ofWriting, wherein n is less than or equal to 5;

in the sets defined in tables 2 and 3, the second integer value is equal to 4, which means that each appropriate value can be used in the formAnd writing, wherein n is less than or equal to 4.

Thus, using the appropriate values in the sets defined in tables 2 and 3 ensures that the maximum additional bit number of 4 will be used for appropriate values in the range from-12 dB to-6 dB (i.e., between 1/4 and 1/2), while using the values in the set defined in table 1 ensures that the maximum additional bit number of 5 will be used for appropriate values in the same range from-12 dB to-6 dB (i.e., between 1/4 and 1/2). However, the set defined in table 1 contains a higher number of suitable values and thus allows the suitable values to be selected with a higher accuracy.

These examples highlight the ability of the invention to obtain the best compromise between reducing the number of additional bits required to hold information from the input digital signal, thereby avoiding degradation in future conversions of the output digital signal, and obtaining a suitable value with the desired accuracy. It should be noted that the present invention is not limited to these examples, and a smaller or higher number of precision bits may be used in order to obtain a suitable value with improved precision, or to reduce the number of additional bits required for a suitable value.

A set of suitable values using a subset of one of the sets defined above may also be used. For example, one may wish to establish a suitable set of values, a number of bits with a precision equal to 3, a maximum number of bits equal to 8, and an average step of 1dB between the two values. This may be done by selecting a subset of the values in table 1 that correspond to suitable values with a step of about 1dB between consecutive suitable values.

In embodiments of the invention in which the transformed signal comprises a plurality of samples, the samples of the transformed signal may have values belonging to different sets of suitable values. For example, each sample may be associated with a plurality of precision bits, and the value of the sample may be selected among suitable values defined at least by the number of precision bits associated with the sample.

Thus, a set of suitable values that is best suited for each sample may be used to adjust to the required accuracy of each sample. These embodiments are interesting for transform signals representing transforms where the values of a particular sample need to be applied very accurately. For example, as will be shown in fig. 11a to 11c, the present invention may be used to construct a RIAA filter by providing higher accuracy to the values of samples having a sharp change from one sample to another (i.e., using appropriate values defined using a large number of accuracy bits), and lower accuracy to the values of other samples, so as to limit the number of bits of these samples. This allows the overall shape of the curve to be preserved while limiting the number of additional bits used as much as possible.

In various embodiments of the present invention, the transform signal St is defined as applying a transform on the input digital signal S1. For example, the convolution of the input digital signal by a transform signal having a single sample changes the amplitude of the input digital signal, whereas the convolution of the input digital signal by a transform signal having a plurality of samples allows the application of an FIR filter, the impulse response of which is defined by the transform signal St.

As explained above, in order to prevent as much information from the input digital signal S1 from being lost as possible in the future conversion of the output digital signal S2, the values of the samples of the transform signal St belong to one or more sets of suitable values.

For example, each sample of the transform signal St may be associated with an accuracy in dB. Thus, for each sample of the transform signal St, a set of suitable values as explained above may be defined.

The set of possible values as defined by the present invention may not allow all possible target values for a sample to be reached. For example, if the apparatus 200a is configured to apply amplitude variation to the input digital signal S1 by performing convolution with a transformed signal having a single sample (representing a coefficient of variation having an amplitude of suitable value as defined in table 1), the apparatus 200a will not be able to apply the amplitude coefficient of variation-25, 00 dB. Alternatively, it may be configured to use a nearby appropriate value, e.g. a value

Which corresponds to a coefficient of variation of the amplitude of-25, 24 dB. The same principle can be applied if the samples of the transform signal St correspond to the coefficients of the FIR filter.

In various embodiments of the present invention, the values of one or more samples are selected among the appropriate values according to a target value and a selection rule of the appropriate values. This allows the value of the most suitable sample or samples to be selected in dependence on the target value of the samples of the transformed signal.

In various embodiments of the present invention, the value selection rule selects the appropriate value that is closest to the target value. This allows the transformed signal to be formed of a suitable value and thus reduces the degradation of the signal while remaining as close as possible to the target value.

For example, using this rule, the coefficient of variation of the amplitude is selected if necessary among the appropriate values of table 1:

if the target coefficient for the amplitude variation is-2 dB, then a suitable value corresponding to the-1.80 dB amplitude variation (which is closest to-2 dB in Table 1) is selected

If the target coefficient for the amplitude variation is-7 dB, then the one corresponding to the-7.18 dB amplitude variation (which is closest to-7 dB in Table 1) is selectedAppropriate value

The rule also allows the direct determination of the target value V based on the number of bits of the precision NPREC and the maximum number of bits NMAX by applying the following steps_tCorresponding appropriate value V_s：

Determine for a suitable value V_sSecond integer value n:

n＝min(NPREC-log2(|V_t|,NMAX)；

determination of the appropriate value V_sFirst integer value k:

k＝round(max(V_t*2ⁿ(ii) a 1) If V is_t>0；

k＝round(min(V_t*2ⁿ(ii) a -1) if V_t<0；

V based on n and k_sAnd (3) calculating:

such a calculation rule advantageously allows to calculate the closest suitable value for the target value without having to calculate the entire set of suitable values. The following table provides some examples of the calculation of suitable values for a plurality of target values, which may be expressed as target coefficients (in dB) or target decimal values.

The following table provides an example of calculating suitable values from the target values for a number of bits with an accuracy of 3 and a maximum number of bits of 8.

Table 4-calculation examples of suitable values for NPREC-3 and NMAX-8

Although not shown here, the value has been calculated using an Excel file, with column and row numbers as follows:

lines start at 1, which is the title line. The line beginning with "target value" is line 1, the line beginning with "-3" is line 2, the line beginning with "6" is line 3, and so on … …

These columns start with B. Thus, the column entitled "target value (dB)" is column B, the column entitled "target value (dec.)" is column C, the column entitled "n" is column D, and so on … …

For example, the number of bits of precision is stored as a parameter in the cell N8, and the maximum number of bits is stored as a parameter in the cell N9, which is not represented here. In the present example, the number of bits of precision is equal to 3, and the maximum number of bits is equal to 8.

The column/cell number defined above will then be used to remind the formula used in Excel.

The values in table 3 have been calculated or entered into the program by the following steps, as shown in row 2:

target value (dB): column B: inputting a target value, expressed in dB;

target value (dec.): column C: input target values, expressed in decimal values:

in line 2, the formula "═ POW (10; B2/20)" corresponding to the conversion of the target value from dB to decimal value is used for calculation;

starting from line 18, the target value is entered directly as a decimal value;

n: column D: for a second integer value n of suitable values, the formula is used: "MIN (PLAFOND ($ N $8-LOG (ABS (C2); 2); 1); $ N $ 9)" calculation, which means that the second integer value N for the fitness value is equal to the number of bits of the precision NPREC minus the binary logarithm of the target value, unless the value is less than the maximum number of bits. As described above, if the first integer value is an odd number, the second integer value may be equal to the additional number of bits; or if the first integer value is even and the fraction can be more simplified, the second integer value can be greater than the additional number of bits;

target k: column E: a non-integer value k' corresponding to the target value in the form of

Expressed, calculated using the formula "═ C2 × POW (2; D2)";

k: column F: the first integer value k of the suitable coefficient, corresponding to a rounding of the non-integer value k', is calculated using the following formula: SIGN (E2) × MAX (ABS (ROUND (E2; 0)); 1);

appropriate values: column G: appropriate values, expressed in decimal values, are given by the formula: "═ F2/POW (2; D2)" was calculated as

Appropriate value (dB): column H: the appropriate value, expressed in dB, is given by the formula: "═ 20 LOG (ABS (G2); 10)" calculation;

error: column I: the error between the appropriate value and the target value, expressed in decimal value, is calculated using the formula ═ G2-C2 ";

error (%): column J: the error between the appropriate value and the target value, expressed as a percentage of the target value, was calculated using the formula ═ I2/C2 ";

error (dB): column K: the error between the appropriate value and the target value, in dB, for the target value, initially expressed in dB, uses the formula: "═ H2-B2" calculation.

Table 4 demonstrates the ability of the present invention to directly calculate appropriate values based on target values. The table also shows that the error between the target coefficient and the appropriate coefficient remains low in percent or decibels of the target value. The only exception relates to very low target values, e.g., -60dB, which cannot be represented by the maximum number of bits. In this case, as shown in Table 1, the maximum number of bits 8 does not allow a suitable coefficient below-48,1648 dB.

However, if desired, a higher number of precision bits and/or a higher maximum number of bits may be used to reduce these errors. The following table shows suitable values for calculating the same target coefficient using 5 bits of precision (NPREC ═ 5) and a maximum 24 bit number (NMAX ═ 24):

table 5-calculation example of suitable values for NPREC-5 and NMAX-24

This example shows that the additional bits allow to define suitable coefficients closer to the target coefficient. However, the use of a higher additional number of bits may result in information from the input digital signal being lost and degraded in the conversion of the output digital signal. The number of bits of precision NPREC and the maximum number of bits NMAX may be set according to the needs of the user of the apparatus 200 a. These examples thus demonstrate the ability of the present invention to perform a compromise between reducing the loss of information in the output signal and the accuracy of the transformation, according to the needs of the user.

The above examples represent selection rules for the appropriate values that are closest to the target value in a set of appropriate values. However, other selection rules of suitable values are possible. For example, the selection rule may be based on the error between the target value and the appropriate value and the combination of the number of additional bits required for the appropriate value. This selection rule selects a suitable value close to the target value starting from the target value and, if possible, using a small number of additional bits. For example, returning to table 1, if a suitable value needs to be selected in table 1 for a corresponding target value of-9 dB, the two closest suitable values are:

a.

b.

as mentioned above, when appropriate, to

Is expressed in terms of the number of additional bits required to read the appropriate value, k being an odd number. Although the appropriate value b is closest to the target value, the appropriate value a uses only 3 additional bits, while the appropriate value b uses 5. Therefore, it may be desirable to use the appropriate value a. According to the bookVarious embodiments of the invention, multiple rules may select the error between the appropriate value and the target value and the combination of multiple additional bits required for the appropriate value. For example:

two suitable values above and below the target value (a. and b. in this example) may be selected;

selecting the appropriate value that is closest to the target value if the number of additional bits required for each appropriate value is less than the difference between the bit depth of the input digital signal and the conversion accuracy (i.e., whatever appropriate value is selected will preserve all information from the input digital signal);

otherwise, selecting a suitable value with the lowest number of additional bits in order to preserve as much information as possible from the input digital signal during the conversion;

a weighted score may be calculated for each suitable value based on the number of additional bits required for the suitable value and the proximity to the target value. The appropriate value with the highest score is selected.

It is also possible to select a suitable value as a suitable value using as few additional bits as possible within an error range around the target value. For example, if a suitable value is to be selected in the table for-8, 5 ± 0,5dB, then the range of [ -7, 5; -9,5dB ] is selected. Suitable values for three candidates are found within this range:

a.

it requires 5 additional bits;

b.it requires 3 additional bits;

c.which requires 5 additional bits.

Therefore, a value b is selected, which is the value requiring the lowest number of additional bits within the error range.

Another option includes first selecting a suitable value that is closest to the target value, then checking whether the nearby values allow a further reduction of the number of additional bits, and if a further reduction of the number of bits is possible, selecting that value. E.g., -6dB in Table 1; 0dB ] range:

if the proper value is selected initially(which therefore requires 2 additional bits), the appropriate values nearby

(which cannot be simplified and therefore requires 4 additional bits) does not allow a further reduction of the number of additional bits. Therefore, appropriate valueIs still selected;

on the contrary, if a proper value is initially selected(which requires 4 additional bits), then two nearby valuesAnd3 and 2 additional bits are used, respectively, and thus allowing the use of 1 and 2 fewer additional bits, respectively. Therefore, an appropriate value can be selectedIt remains close to the proper value initially selectedAnd therefore approaches the target value while further reducing the number of additional bits used.

More generally, when a form is initially selected(where k is an odd value), the value may be replaced with a neighboring value in the set that allows the number of bits of precision to be reduced by at least two bits.

This solution of reducing the number of bits by using neighboring values can also be used iteratively to select a suitable value that uses as low an additional number of bits as possible within the error range around the target value. For example, a suitable value for the first candidate may be selectedThen, if k is an even number, the score can be reduced to a score

Wherein k is₁Is an odd number. Selecting two adjacent valuesAndorAnd

each value within the error range is selected as a candidate value. Each of these values has an even numerator and can therefore be reduced to a smaller fraction of a power of 2. Therefore, each of these values requires a lower number of bits. For each selected candidate value, the corresponding score is reduced to a score expressed as having an odd number of molecules. For example, if k is 5, n is 8, and adjacent values are selected

The score is reduced toSo that there are odd numbers of molecules. Two new candidates are then selected

And

which requires at least one less additional bit. If at least one of these values is within the error range, the process continues until the best fit value is selected, which uses the minimum number of additional bits and is within the error range.

In various embodiments of the present invention, the device 200a is configured to vary the amplitude of the input digital signal S1. To this end, the transform signal comprises a single value representing a coefficient to be applied to the amplitude variation of the signal. Thus, at the output of the convolution of the input digital signal S1 and the transform signal St, the output digital signal is amplified or attenuated compared to the input digital signal.

This can be performed without the risk of saturating the signal if the coefficients of the amplitude variation represent an attenuation. Conversely, if the coefficient of the amplitude variation represents an amplification, there is a risk that the output digital signal is saturated. To prevent or at least limit saturation of the signal, the processing logic is configured to use a maximum saturation factor corresponding to a maximum allowed saturation of samples of the signal. If the coefficient is equal to 1, the signal should be completely unsaturated for successive time windows of the input digital signal for:

determining a maximum absolute value of the input digital signal over a time window;

a maximum amplitude variation coefficient is calculated based on the maximum absolute value and a predefined maximum saturation coefficient. For example, if the maximum absolute value of the input digital signal corresponds to an intensity of 0,8 over a time window and a maximum saturation factor of 1,2 is selected, the maximum amplitude variation factor is equal to

Therefore, the maximum amplitude variation coefficient takes into account both the fact that the input digital signal does not reach a maximum value in the time window and that a saturation amount of 20% is allowed;

selecting the value of said single sample among said set of suitable values representing the amplitude variation coefficient below said maximum amplitude variation coefficient which is closest to the target amplitude variation coefficient. This means that a target amplitude variation coefficient smaller than the maximum threshold value of amplitude variation will select the closest suitable value. Otherwise, a suitable value corresponding to an amplitude variation just below the maximum value will be selected.

This allows the appropriate coefficients of the present invention to be used at the same time to prevent degradation when converting the digital output signal and to prevent over-saturation of the output signal.

These examples are provided by way of example only, and any rule that allows the selection of a suitable value based on the distance from the target value, as well as the number of additional bits required for the suitable value, may be used.

Processing logic 220a may perform the convolution between the input digital signal and the transformed digital signal in a number of different ways to obtain the output digital signal.

For example, the sample values of the transform signal St may be stored as integer values and the processing logic may be configured to output at an output bit depth n₂Wherein a full conversion is performed on a sample of the input digital signal and the converted sample is multiplied by one or more samples representing the transformed digital signal.

The value of the transformed signal may also be stored as an integer value equal to the value of the appropriate coefficient multiplied by 2 raised to the power of the difference between said output bit depth and said input bit depth. Thus, the convolution of the input digital signal by the transformed digital signal may be performed by first converting samples of the input digital signal into converted samples having an output bit depth, but the integer value is equal to the value of the input digital signal, and then multiplying the converted value by the integer value of the transformed signal.

Fig. 2b shows a second example of a device in various embodiments of the invention.

As the apparatus 200a, the apparatus 200b comprises a processing logic 210b, the processing logic 210b being configured to perform a convolution of the first digital signal S1 and the transformed digital signal St to obtain an output digital signal S2, the output digital signal S2 to be converted by the DAC220b into an output analog signal S2'.

In the example of fig. 2b, DAC220b is shown internal to device 200 b. However, this example is not limiting, and the DAC may be located in another device connected to the device 200 b. DAC220b may also be replaced by a digitizer that converts a digital output signal to another digital output signal.

The device 200b is connected to one or more attenuators or amplifiers 230b, 231b … configured to apply a fixed gain to the output analog signal. Similar to the DAC220b, one or more attenuators or amplifiers 230b, 231b are shown in the device 200b of fig. b, but may also be located in another device connected to the device 200 b.

Each amplifier or attenuator is characterized by a fixed gain. For example, the attenuator 230b has a gain G1 for attenuating the output analog signal to an attenuated analog signal S2 ", and the amplifier 231b is configured with a gain G2 for amplifying the output analog signal to an amplified analog signal S2"'. These examples are not limiting and one or more amplifiers, one or more attenuators with any possible gain may be used. As a variant, one or more analog amplifiers or attenuators with variable gain may be used.

As in the device 200a, the transformation signal St for the device 200b is formed by suitable coefficients. All of the embodiments discussed with reference to fig. 2a are applicable to the device 200 b. Furthermore, these suitable coefficients may be combined with the fixed gains G1, G2 … of one or more amplifiers or attenuators 230b, 231b … in order to increase the number of coefficients that may be applied to the input digital signal S1.

For example, if the transform signal St is formed of a single suitable value as described in Table 1 to attenuate the input digital signal S1, and the attenuator 230b has a gain of-12 dB, suitable coefficients may be combined with the coefficient G1. For example, using appropriate coefficientsAnd allow application of-60The gain G1 for a total gain of 16dB is-12 dB combined.

Attenuators with fixed or variable gain may also be used to reduce the number of additional bits required for the appropriate value. For example, by using coefficients

(which requires 7 additional bits) or coefficients

Which only requires 5 additional bits in addition to-12 dB of gain G1 of attenuator 230b to obtain a global attenuation around-20 dB.

It should be noted, however, that analog attenuators or amplifiers may also cause degradation of the output signal. Furthermore, high quality analog amplitude variation with variable gain implementations are costly. To mitigate these degradations, a fixed gain or a limited number of variable gains may be used. However, multiplication of such amplifiers or attenuators can be costly. Thus, the device 200b, by combining the appropriate coefficients of the present invention with a limited number of amplifiers or attenuators with fixed gains or a limited number of variable gains, provides an efficient solution for converting the input digital signal with the best possible output quality and at a reasonable cost.

Fig. 2c shows a third example of a device in various embodiments of the invention.

As the devices 200a and 200b, the device 200c comprises a processing logic 210c configured to perform a convolution of the first digital signal S1 and the transformed digital signal St to obtain an output digital signal S2, which output digital signal S2 is to be converted by the DAC220 c into an output analog signal S2'.

In various embodiments of the present invention, the transformed digital signal St is predefined for applying a static filter to the first digital signal S1. In other embodiments of the invention the transformed digital signal St is updated when an event occurs. This is the case, for example, if the shift signal St effects a change in the volume that is modified upon input by the user. The shift signal St may also be modified in real time. For example, for the case of audio prosthetic applications, where the transform signal St is used to perform noise removal based on capturing external noise in real time.

In some cases, the information loss problem during the conversion of the output digital signal S2 applies to the conversion of a digital signal instead of the input digital signal.

This is the case, for example, for audio prosthesis applications, where the transform signal St corresponds to a transform for removing ambient noise, which transform is updated in real time based on the capturing of ambient noise, while the input digital signal S1 is a useful signal affected by noise. In this example, it is very important not to lose information about the values of the samples of the transform signal St, since this defines the noise removal capability of the system. To this end, the processing logic 210c is configured 211c to modify the input digital signal S1 in order to obtain a modified input digital signal S1' formed by suitable coefficients. All of the embodiments discussed with reference to fig. 200a may be applied to the modification of an input digital signal by processing logic 200 c. More specifically, the values of the samples of the input digital signal S1 may be considered as target values, while the modified input digital signal S1' is formed of suitable values, as defined with reference to fig. 2 a.

The processing logic is further configured 212c to perform a convolution of the modified input digital signal S1' with the transform signal St. Thus, using suitable coefficients with the modified digital signal allows using as many additional bits as possible for the input digital signal and thus without losing information from the transform signal St.

In various embodiments of the present invention, the processing logic 210c is configured to modify the input digital signal by replacing odd values in the input digital signal S1 with even values that may be encoded using a fewer number of bits. For example, if the input digital signal S1 is an audio signal having a bit depth of 14, the value of a sample equal to 15719 corresponds to the audio signal

This cannot be simplified. This value of audio samples therefore requires 14 bits to be encoded. In contrast, adjacent values 15718 and 15720 correspond, respectivelyIs equal to or greater thanAnd

the two values require encoding 13 bits and 11 bits, respectively. This means that all valid information of the value 15720 is located in the 11 most significant bits, rather than in the 14 bits of the input digital signal. Such a value thus naturally limits the degradation caused by converting the output digital signal by a converter having limited conversion accuracy. Accordingly, the value 15719 in the input digital signal may be replaced with 15720. This causes limited distortion of the input digital signal while greatly improving the accuracy of future output digital signal conversions.

More generally, each odd value in the input digital signal may be replaced by its upper or lower neighbor, which is a multiple of 4.

This solution of reducing the number of bits by using neighboring values can also be used iteratively to select a suitable value that uses as low an additional number of bits as possible within the error range around the target value. For example, in the above example, the initial value is set toIs written. Then, if k is an even number, the score can be reduced to a score

Wherein k is₁Is an odd number. Selecting two adjacent valuesAnd

or

Andin the above example, the valueAndare adjacent values. Each value within the error range is selected as a candidate value. Each of these values has an even numerator and can therefore be reduced to a smaller fraction of a power of two. Therefore, each of these values requires a lower number of bits. For each selected candidate value, the corresponding score is reduced to be represented as a score with odd number of molecules. For example, if k 15719 and n 14, and adjacent values are selected

The score is reduced to

So as to have an odd number of molecules. Two new candidates are then selected

And

these two candidates require at least one additional bit less. If at least one of these values is within the error range, the process continues until the best suitable value using the minimum number of additional bits and within the error range is selected.

This example demonstrates that the invention can be used in any convolution of a digital signal to preserve as much information as possible in the other digital signal by using appropriate coefficients in one of the two signals.

In the example discussed with reference to fig. 2c, the bit requirement optimization is applied only on the digital input signal. However, it is also possible to obtain a digital input signal by applying bit demand optimization to a target digital input signal and obtain a converted signal by applying bit demand optimization to a target converted signal.

FIG. 3 shows an example of a system for managing audio devices in an automobile in various embodiments of the invention.

The system 300 is configured to transform and play an input analog audio signal 310 using speakers 320 inside the automobile. In the example of fig. 3, four speakers are placed inside the automobile. However, this example is not limiting and a different number of speakers may be used, for example the interior of an automobile may include 2 or 6 speakers.

The input analog audio signal 310 is an analog audio signal that may be obtained from various sources (e.g., an audio tuner) or an analog input obtained from an external device such as an audio player.

The input analog audio signal is converted into an input digital audio signal using an ADC (analog-to-digital converter) 330. The input digital audio signals are processed by an audio processor or audio SoC (signal on chip) 340 to obtain output digital audio signals (four in the example of fig. 3) for each speaker. Each output digital audio signal is converted to an output analog audio signal by one of the DACs 350. Each output analog audio signal is amplified by amplifier 360 and played by one of speakers 320. The system 300 and the audio amplifier 360 may be powered by the battery 370 of the automobile.

The audio processor 340 may be configured to perform one or more transformations on the input digital audio signal. For example, the audio processor may perform a modification of the amplitude of the input digital audio signal. The audio processor may also be configured to apply a transform to the input digital audio signal in order to remove distortion caused by the shape of the interior of the automobile. In fact, the shape of the interior of the automobile can affect the propagation of the interior audio sounds. This causes distortion when playing back the audio signal. To remove these distortions, the audio processor is configured to apply a transform to the input digital audio signal to obtain an output digital audio signal. The transform may be obtained by performing a convolution of the input digital audio signal with a transform signal to apply a FIR filter representing the transform.

To prevent loss of information from the input digital signal during analog conversion by the DAC 350 using a limited number of conversion bits, the values of the samples of the transformed signal used by the audio processor 340 are selected among the appropriate values defined with reference to fig. 2a, 2b and 2 c. The values of the samples of the transformed signal can be obviously calculated by the following method:

calculating a target value of a sample corresponding to an ideal filter to remove distortion caused by the shape of the car;

determining a set of suitable values taking into account the number of bits converted by the DAC 350;

the values of the samples of the transformed signal are selected among suitable values based on the target value of the ideal filter.

Thus, system 300 allows the application of a filter whose impulse response is similar to that of an ideal filter, while preventing the loss of information from the input digital signal. Thus, the system 300 improves the audio listening experience of the user in the car.

Fig. 4 shows a compressor apparatus in various embodiments of the invention.

The compressor 400 uses as input signal an analog stereo signal 410 formed of an unbalanced stereo signal 411, a balanced stereo signal 412, the balance being controlled by a main balance 413.

To reduce the dynamic range of the audio signal, the compressor 400 is configured to reduce the volume of large sounds and amplify the volume of small sounds.

To this end, the compressor 400 converts an analog input signal 410 into a digital input signal, determines compression gains corresponding to different amplitudes of the input digital signal, and applies the compression gains according to the amplitude of the input digital signal to obtain an output digital signal, and then converts the output signal into an output analog signal to be played over the speakers 430, 431.

To avoid information loss from the output signal, and thus degradation, compressor 400 determines the appropriate value of the present invention that best matches the gain for each gain to be applied, and reduces the number of additional bits used for compression according to one or more embodiments of the present invention discussed above.

This allows the use of a digital compressor while avoiding as much as possible the problems that may arise when converting a digital output signal back to an analog output signal.

Fig. 5 shows an example of an audio amplifier device in various embodiments of the present invention.

The audio amplifier device 500 uses a plurality of audio input channels 510 as inputs.

Further, the amplifier device 500 comprises an analog audio input 511 which is converted using an ADC 520. Analog audio input 511 is input from a phonograph record. The device 500 includes processing logic that applies a RIAA (recording association of america) equalization filter to the converted audio input. The RIAA equalization filter is a filter that applies variable gains to different frequencies of a signal to cancel the equalization filter applied when recording a phonograph record, to allow longer recording time and improve sound quality. The RIAA filter may be implemented using convolution of the transformed signal.

The amplifier device 500 further comprises processing logic 540 configured to apply a plurality of different filters to the audio signal, e.g. volume change, high pass filter, divider, etc. … … all of which may also be implemented using convolution of the transformed signal.

To avoid information loss from the output signal, and hence degradation, the compressor amplifier device 500 uses a transform signal formed of suitable coefficients defined according to one or more embodiments of the invention discussed above.

This allows using all filters of the amplifier device 500 while avoiding as much as possible the problems that may arise when converting a digital output signal back to an analog output signal.

FIG. 6 shows an example of a high fidelity processor in various embodiments of the invention.

The high fidelity processor 600 has three analog audio inputs 610, 612, 613 and 6 analog audio outputs 620, 622, 623, 624, 625 and 626. However, this number is not limiting and a different number of analog inputs/outputs may be used. Although examples will be provided for the first input 610 and the first output 620, the following description applies to all inputs and all outputs of the high fidelity processor 600, respectively.

The analog audio input 610 is converted to a digital audio input by the ADC 611. The first processing logic 630 is then configured to process the digital audio input by applying the gain 631, the delay 632, the equalization 633, and the dynamic equalization 634 in that order. The high fidelity processor 600 is configured 640 for connecting each audio input to each audio output. The second processing logic is configured to process the digital audio output, modify the phase of the 657 output, and apply another delay 658 by selecting the digital audio input 651 in sequence, applying a gain 652, performing a divide 653, an equalization 654, a dynamic equalization 655, applying a limiter 656 (i.e., a filter that gradually limits the amplitude of the signal when the gain of the signal is above a threshold). The output digital signal is then converted to an analog output signal by DAC 621 for playback by speaker 620.

As described above, the application of gains 631 and 652 to the digital signal may cause distortion during digital-to-analog conversion by DAC 621, depending on the coefficient of gain used. To prevent such distortion, the high fidelity processor is configured to apply the gains 631 and 652 using the appropriate values of the present invention.

This allows the high fidelity processor 600 to perform its operations on digital signals without generating distortion during the conversion of the output digital signals to the output analog signals.

Fig. 7 shows an example of a mixer in various embodiments of the invention.

The mixer 700 has a plurality of analog audio inputs 710 for conversion to digital audio inputs using an ADC. Such a mixer is used, for example, when recording audio tracks. The audio inputs correspond to multiple microphones that capture sound or synthesizers that produce sound, and the mixer combines the audio inputs into multiple audio channels to be used as a sound recorder. Fig. 7 shows operation on a single input channel and a single output channel. However, such operations may be performed on each input channel and output channel. To mix the input channels to the output channels, the mixer 700 performs a plurality of operations 730 on the input digital signals and performs a plurality of operations 740 on the output digital signals. These operations include, for example, a volume controller 741, compressors 731, 742, hybrid transmit controls 732, 743 that define the gain to be applied to the input signal to be transmitted to the hybrid, a balance control 744 that applies inverse gains on the left and right channels, and a pan control 733 that defines the position of the channels in the audio scene by applying variable gains in the output, an attenuator 734, a high pass filter 735, and parametric equalization 736, 745.

The digital output signal thus generated is converted to an analog output signal using the DAC.

To prevent loss of information and degradation during digital-to-analog conversion, mixer 700 is configured to use the appropriate values of the present invention to perform one or more of the above-described operations.

This allows the mixer 700 to perform its operation on the digital signal without generating distortion during the conversion of the output digital signal into the output analog signal.

Fig. 8 illustrates a method of performing convolution of two digital signals in various embodiments of the present invention.

The method 800 is a method of convolving the input digital signal S1 with a digital signal representing the transform St to obtain the output digital signal S2. The method 800 is remarkable in that one of said input digital signal and a digital signal representative of a transformation comprises one or more samples whose values belong to a discrete set of suitable values, wherein:

said discrete set of suitable values is defined at least by a decreasing function defining a plurality of bits as a function of the absolute value of said suitable values;

each suitable value is equal to the first integer divided by 2 to the power of a second integer equal to or less than the upper limit of the absolute value to which the decreasing function is applied.

Similar to the devices of fig. 2a, 2b, 2c, using the appropriate values of the present invention for one of the two digital signals allows information from the second digital signal to be saved within the most significant bits of the output digital signal S2 and thus prevents information loss or degradation when converting the output digital signal S2.

Fig. 9 shows a method of creating a first digital signal to be convolved with a second digital signal according to the invention.

Method 900 is a method of creating a first digital signal. The first digital signal will be convolved with the second digital signal. To prevent loss of information from the second digital signal when convolving to obtain the output digital signal and converting the output digital signal, the method 900 comprises:

obtaining (910) a target value of a sample of the first digital signal;

for each target value of the sample, selecting (920) a suitable value belonging to a set of suitable values, wherein:

said discrete set of suitable values is defined at least by a decreasing function defining a plurality of bits as a function of the absolute value of said suitable values;

each suitable value being equal to the first integer divided by 2 to the power of a second integer, said second integer being equal to or less than the upper limit of the absolute value to which the decreasing function is applied;

the value of the sample is set 930 to the appropriate value.

This allows the first digital signal to be as close as possible to the target digital signal while being formed of an appropriate value to prevent information from the second digital signal from being lost when convolution is performed, and then the output digital signal is converted.

Fig. 10a, 10b and 10c show the frequency response of a prior art low-pass filter with coefficients quantized using 16 bits, the frequency response of a low-pass filter according to the invention, and the impulse response of a low-pass filter according to the invention, respectively.

Curve 1000a represents the frequency response of a prior art 200Hz low pass filter using 16-bit quantization as the power depending on the frequency. Curve 1000b represents the frequency response of a corresponding low-pass filter of the invention, i.e. a low-pass filter whose coefficients have been replaced by suitable coefficients of the invention. Curve 1000c represents the impulse response of the same low-pass filter of the present invention, as the magnitude as a function of time.

It can be seen that 1010b, at high frequencies, the frequency response is modified. However, this only affects the frequencies that are affected by the very strong attenuation, and the overall function of the filter is not affected. It can also be seen in the impulse response 1010c that certain values have been modified to match only a suitable set of values.

Fig. 11a, 11b and 11c show the frequency response of a prior art RIAA filter whose coefficients are quantized using 16 bits, the frequency response of the RIAA filter of the present invention, and the impulse response of the RIAA filter of the present invention, respectively.

Curve 1100a represents the frequency response of a prior art RIAA filter using 16-bit quantization as the frequency-dependent power. Curve 1100b represents the frequency response of a corresponding RIAA filter of the present invention, i.e., a RIAA filter whose coefficients have been replaced with suitable coefficients of the present invention. Curve 1100c represents the impulse response of the same RIAA filter of the present invention, as the magnitude as a function of time.

In this example, in the filter of the present invention, different numbers of precision bits have been used for different samples. More specifically, for samples that have a sharp change from one sample to another, a higher number of precision bits have been used. It can thus be seen that 1110c, as the variation between successive samples decreases, the number of bits used to represent the precision of the samples also decreases, in order to prevent information loss.

Thus, the first part of the impulse response provides a higher accuracy. This ensures that the overall shape of the frequency response 1100b is preserved while using as many additional bits of precision as possible for each sample.

These examples demonstrate that the present invention does not significantly affect the performance of the filter, while substantially reducing the loss of information from the input digital signal when converting the output digital signal using a limited number of bits.

In various embodiments of the present invention, the transformation is an oversampling, sometimes referred to as an upsampling, of the input digital signal. Oversampling can be used prior to digital-to-analog conversion by converting the input digital signal to a sampling frequency that is significantly higher than the original sampling rate. In such an application, the transformation may be performed by convolution of the input digital signal and a transformed signal representing the oversampling, i.e. by applying an FIR filter defining the oversampling to the input digital signal. There are a number of different oversampled FIR filters. For example, the oversampled FIR filter may be a moving average filter.

As explained above, the DAC to which the oversampled signal is submitted has a limited input bit depth. Thus, some information from the input digital signal may be lost during digital-to-analog conversion. More specifically, the oversampled samples comprise information from a large number of different samples of the input digital signal (e.g., if the oversampling is performed using a moving average filter, the oversampled signal may comprise information from all input samples of the moving average). Excessive loss of information can result in distortion that degrades the quality of the oversampled signal at the output of the digital-to-analog conversion.

To address this problem, the present disclosure applies oversampling by applying bit demand optimization to one of the input digital signal and the transform signal that defines the oversampling. As explained above, applying bit requirement optimization to a transform signal (e.g. a transform signal whose samples correspond to the coefficients of an oversampled FIR filter) allows to preserve as much information as possible from the input digital signal and thus to improve the quality of the resulting oversampled signal. At the same time, applying bit demand optimization to the input digital signal advantageously allows more accurate oversampling to be obtained.

As mentioned above, in the framework of the invention, the bit requirement optimization comprises defining the sample values of said at least one of said input digital signal and said digital signal representing the transformation as a second integer power of the first integer divided by 2. In the example provided above, the bit requirement optimization includes applying a decreasing function of the values of the target samples.

However, bit demand optimization may use other functions to define the second integer. For example, the second integer may be comprised between a minimum value and a maximum value, and/or equal to an increasing function of the absolute difference between the application target sample and the expression of the target sample as the first integer divided by the power of the minimum value of 2. That is, the higher the degradation caused by the reduction in the number of bits used to define a sample, the higher the number of bits used. As an advantage, this allows a reduction in the number of bits required to perform the convolution of the signal to be achieved whilst limiting the error introduced by the bit requirement optimisation. This bit requirement optimization can be applied to the target signal, which is the input digital signal as well as the transformed digital signal.

For example, a bit requirement optimization may be defined such that:

a target digital signal (e.g., an input digital signal or a transformed digital signal representing the coefficients of an FIR filter) is encoded using the number of bits C. The samples of the target digital signal are denoted h (i) and are therefore equal toWherein kh (i) is an integer;

the minimum number of bits K for encoding the signal at the output of the bit requirement optimization is defined such that 1<K<C. Thus, each sample of the digital signal has a converted counterpart k (i) corresponding to the sample represented by the C bit, and is thus represented as:wherein kk (i) is an integer;

for certain values, we get h (i) ═ k (i). For some other values, the converted counterpart k (i) may be slightly different from h (i);

calculating for each sample a relative difference v (i), corresponding to the absolute difference of the distortion introduced by the conversion from C to K bits divided by the value of the sample h (i): v (i) 0 if h (i) 0; otherwise, v (i) ═ h (i) -k (i) |/h (i).

Thus, the relative difference v (i) represents the ratio between the distortion introduced by the conversion of a sample from C to K bits divided by the value of the sample: the higher v (i), the higher the relative degradation introduced by the conversion of the bit depth of the samples. In embodiments of the present invention, the second integer (i.e., the bit depth for the sample at the output of the bit requirement optimization) is an increasing function of v (i): the higher the relative degradation introduced by the sample conversion, the higher the number of information bits used to reduce the loss of information for the sample.

For example, the second integer n can be comprised between K and K + D, where D is an integer greater than 1 and 0 ≦ D ≦ C-K. The definition rule of n can be used:

if it is not

n＝K；

Otherwise, ifn＝K+1；

Otherwise, ifn＝K+2；

…；

Otherwise, ifn＝K+(D-1)；

Otherwise, if

n＝K+D。

Therefore, the second integer n is calculated between K and K + D in order to have a value that reduces the relative degradation resulting from the bit demand optimization.

Fig. 12a, 12b and 12c show the impulse response of a low pass filter using bit demand optimized 8-bit coefficients, 16-bit coefficients and 8 to 16-bit coefficients according to the present invention, respectively.

The impulse response 1200a is the impulse response of a low pass filter using 8-bit coefficients. As shown in fig. 12a, the impulse response is very inaccurate. The impulse response 1200b is the impulse response of the same low pass filter using 16-bit coefficients. This impulse response is much more accurate, but, as explained above, convolution using a FIR filter with 16 bits greatly increases the bit depth of the convolved signal; if the convolved signal is later converted using a limited bit depth, there will be a significant degradation in quality.

Impulse response 1200c is the impulse response of the same low pass filter using the bit demand optimization described above, where the second integer n corresponding to the bit depth of each coefficient is calculated as the growth function of v (i) for each coefficient. The resulting impulse response 1200c is much more accurate than the impulse response 1200 a. This demonstrates the ability of the bit requirement optimization of the present invention to preserve important amounts of information from the target signal while reducing the number of bits required at the output of the convolution with the optimized signal.

The value v (i) may also be replaced by the value w (i) ═ h (i) -k (i) |/2^(C-k). The value of the second integer n is then calculated in the same way as explained before using w (i) instead of v (i). Thus, the number of bits used to encode the samples is selected to reduce the absolute degradation caused by the conversion.

The above described examples are given as non-limiting illustrations of embodiments of the invention. They do not limit in any way the scope of the invention, which is defined by the following claims. Furthermore, any of the non-exclusive embodiments or examples discussed above may be combined. For example, although fig. 2a and 2b disclose devices in which the values of the transformed signal are selected/obtained by bit requirement optimization in the appropriate values, and fig. 2c discloses devices in which the values of the input digital signal are selected/obtained by bit requirement optimization, in various embodiments of the present invention, the values of the input digital signal and the transformed signal may be selected/obtained by bit requirement optimization in the appropriate values for obtaining joint optimization.