阅读说明：本技术 功率放大电路
(Power amplifying circuit
) 是由 长谷昌俊 于 2019-01-21 设计创作，主要内容包括：本发明提供一种在抑制电路规模的增大的同时抑制交调失真的影响的功率放大电路。功率放大电路具备：第1放大器,对第1信号进行放大并输出第2信号；提取电路,提取第2信号包含的二倍波；相位调整电路,对提取的二倍波的相位进行调整；以及合成器,对调整了相位的二倍波和第3信号进行合成并输出第1信号。(The invention provides a power amplifier circuit which suppresses the influence of intermodulation distortion while suppressing an increase in the circuit scale. The power amplifier circuit includes: a 1 st amplifier amplifying the 1 st signal and outputting a 2 nd signal; an extraction circuit for extracting a double wave included in the 2 nd signal; a phase adjusting circuit for adjusting the phase of the extracted double wave; and a synthesizer for synthesizing the phase-adjusted doublet and the 3 rd signal and outputting a 1 st signal.)
1. A power amplification circuit is provided with:
a 1 st amplifier amplifying the 1 st signal and outputting a 2 nd signal;
an extraction circuit that extracts a double wave included in the 2 nd signal;
a phase adjustment circuit for adjusting the phase of the extracted double wave; and
and a synthesizer for synthesizing the phase-adjusted second multiplied wave and the 3 rd signal and outputting the 1 st signal.
2. The power amplification circuit of claim 1,
the phase adjustment circuit converts the phase of the second multiplied wave so that the phase of a signal of a difference between the second multiplied wave and a fundamental wave included in the 1 st signal and the phase of third-order intermodulation distortion generated in the 1 st amplifier become substantially opposite phases in the output of the 1 st amplifier.
3. The power amplification circuit of claim 1 or 2,
further provided with: and an amplitude adjustment circuit for adjusting the amplitude of the double wave so that a signal of a difference between the double wave and a fundamental wave included in the 1 st signal and third-order intermodulation distortion generated in the 1 st amplifier cancel each other at an output of the 1 st amplifier.
4. The power amplification circuit of claim 3,
the amplitude adjustment circuit includes a 2 nd amplifier that amplifies the power of the double wave.
5. The power amplification circuit according to any one of claims 1 to 4, further comprising:
a 3 rd amplifier for amplifying a 4 th signal and outputting the 3 rd signal; and
and a double wave attenuation circuit provided between the 3 rd amplifier and the synthesizer and attenuating a signal at the frequency of the double wave.
6. The power amplification circuit of any one of claims 1 to 5,
the power amplification circuit further includes: a filter circuit provided between the extraction circuit and the synthesizer and attenuating a signal having a frequency different from the frequency of the double wave,
the filter circuit is formed outside a semiconductor chip on which the 1 st amplifier is formed.
Technical Field
The present invention relates to a power amplifier circuit.
Background
A mobile communication device such as a mobile phone is equipped with a power amplifier for amplifying power of a transmission signal. When a plurality of signals having close frequencies are supplied to such a power amplifier, for example, Inter-modulation Distortion (IMD) may occur in the plurality of signals, thereby deteriorating the linearity of the gain. Therefore, in order to suppress the influence of such intermodulation distortion, a technique has been proposed in which a harmonic is intentionally injected into a signal path to cancel the intermodulation distortion component. For example, patent document 1 discloses a distortion compensation power amplifier device for compensating for intermodulation distortion by distributing the output of a first-stage amplifier to a fundamental wave and a double-wave, adjusting the phase and amplitude of the double-wave, adding the resulting sum to the fundamental wave, and inputting the sum to a second-stage amplifier.
Prior art documents
Patent document
Patent document 1: U.S. patent application publication No. 2005/0242877 specification
Disclosure of Invention
Problems to be solved by the invention
In the configuration disclosed in patent document 1, an amplifier different from an amplifier that is a factor causing intermodulation distortion is provided, and a double wave is generated by the amplifier. However, there is an increasing demand for miniaturization in mobile communication devices such as cellular phones. Therefore, it is desirable to improve linearity while suppressing the influence of intermodulation distortion without increasing the circuit scale as much as possible.
The present invention has been made in view of the above circumstances, and an object thereof is to provide a power amplifier circuit that suppresses an influence of intermodulation distortion while suppressing an increase in circuit scale.
Means for solving the problems
In order to achieve the above object, a power amplifier circuit according to one aspect of the present invention includes: a 1 st amplifier amplifying the 1 st signal and outputting a 2 nd signal; an extraction circuit for extracting a double wave included in the 2 nd signal; a phase adjusting circuit for adjusting the phase of the extracted double wave; and a synthesizer for synthesizing the phase-adjusted doublet and the 3 rd signal and outputting a 1 st signal.
Effects of the invention
According to the present invention, it is possible to provide a power amplifier circuit that suppresses the influence of intermodulation distortion while suppressing an increase in the circuit scale.
Drawings
Fig. 1 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 1 of the present invention.
Fig. 2 is a diagram showing a spectrum of a signal supplied to the amplifier 111 of the subsequent stage.
Fig. 3 is a diagram showing a part of the frequency spectrum of the signal output from the amplifier 111 of the subsequent stage.
Fig. 4A is a graph showing simulation results of third-order intermodulation distortion in the power amplifier circuit according to embodiment 1 of the present invention and a comparative example.
Fig. 4B is a graph showing simulation results of third-order intermodulation distortion in the power amplifier circuit according to embodiment 1 of the present invention and a comparative example.
Fig. 5 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 2 of the present invention.
Fig. 6 is a diagram showing an example of the configuration of a transmission module including the power amplifier circuit according to embodiment 1 of the present invention.
Fig. 7 is a diagram showing an example of the configuration of a transmission module including the power amplifier circuit according to embodiment 2 of the present invention.
Fig. 8 is a diagram showing another configuration example of a transmission module including the power amplification circuit according to embodiment 2 of the present invention.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The same elements are denoted by the same reference numerals, and redundant description thereof is omitted.
Fig. 1 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 1 of the present invention. The power amplifier circuit 100A shown in fig. 1 is mounted in a mobile communication device such as a mobile phone, for example, and amplifies power of a Radio-Frequency (RF) signal transmitted to a base station. The power amplifier circuit 100A amplifies power of a signal of a communication standard such as 2G (2 nd generation mobile communication system), 3G (3 rd generation mobile communication system), 4G (4 th generation mobile communication system), 5G (5 th generation mobile communication system), LTE (Long Term Evolution) -FDD (Frequency Division Duplex), LTE-TDD (Time Division Duplex), LTE-Advanced, and LTE-Advanced Pro, for example. Further, the frequency of the RF signal is, for example, in the order of several hundred MHz to several tens GHz. The communication standard and frequency of the signal amplified by the power amplifier circuit 100A are not limited to these.
The power amplification circuit 100A includes, for example, amplifiers 110 and 111, a synthesizer 120, matching circuits 130 and 131, a harmonic extraction circuit 140, a distortion compensation circuit 150A, an input terminal T1, and an output terminal T2. Further, the power amplification circuit 100A includes a main path P1 and a sub path P2.
The amplifier 110 (3 rd amplifier) and the amplifier 111 (1 st amplifier) amplify and output the input RF signal, respectively. That is, the power amplification circuit 100A amplifies power in two stages. Specifically, the amplifier 110 of the primary stage (driving stage) amplifies an RF signal RF1 (4 th signal) input from the input terminal T1 via the matching circuit 130, and outputs an RF signal RF2 (3 rd signal). The amplifier 111 of the subsequent stage (power stage) amplifies an RF signal RF3 (1 st signal) synthesized by a synthesizer 120 described later, and outputs an RF signal RF4 (2 nd signal). The RF signals RF2 and RF4 include harmonics including a double wave generated by the amplification operation of the amplifiers 110 and 111, respectively. The amplifiers 110 and 111 are each formed of a Bipolar Transistor such as a Heterojunction Bipolar Transistor (HBT). Instead of the HBT, the amplifiers 110 and 111 may be formed of a Metal-oxide-semiconductor Field-Effect Transistor (MOSFET).
The main path P1 is a path from the input terminal T1 to the output terminal T2 via the amplifiers 110 and 111, and the like. The main path P1 is a fundamental wave F for the RF signal RF10The path of the passage. The sub-path P2 is a path from the harmonic extraction circuit 140 to the synthesizer 120 via the distortion compensation circuit 150A, and constitutes a feedback circuit. The secondary path P2 is for generating a double wave 2F injected for compensating third-order intermodulation distortion generated in the amplifier 111 at the subsequent stage0The path of (2).
Synthesizer 120 pairs fundamental wave F having passed main path P10And a doublewave 2F via a secondary path P20Performs synthesis and outputs an RF signal RF3 (1 st signal). The generated RF signal RF3 is supplied to the amplifier 111 at the subsequent stage.
A Matching circuit 130 (MN: Matching Network) matches the impedance of the amplifier 110 with a circuit (not shown) provided at a preceding stage.
The matching circuit 131 is provided between the amplifier 110 and the synthesizer 120, and matches the impedances of the amplifier 110 and the amplifier 111. The matching circuit 131 also has a function of attenuating Harmonic Distortion (HD) generated by the amplification operation of the amplifier 110. That is, the matching circuit 131 constitutes a specific example of a double attenuation circuit. This can suppress the supply of the double wave to the synthesizer 120 when passing through the main path P1. Specifically, the matching circuit 131 may be, for example, a Low Pass Filter (LPF) circuit having frequency characteristics of passing a fundamental wave and attenuating a double wave.
The harmonic extraction circuit 140 is provided at the subsequent stage of the amplifier 111. The harmonic extraction circuit 140 extracts the double wave 2F contained in the RF signal RF40And supplies at least a part thereof to the distortion compensating circuit 150A. The harmonic wave extraction circuit 140 extracts the double wave 2F0The remaining signal is output as a transmission signal from the output terminal T2. In the present embodiment, for example, a harmonic terminating circuit that short-circuits the harmonic to ground (ground) is used as the harmonic extracting circuit 140. In this case, for example, the double wave supplied to the harmonic stop circuit may be distributed, a part of the double wave may be supplied to the distortion compensation circuit 150A, and a part of the double wave may be short-circuited to the ground. Thus, the harmonic extraction circuit can be configured while suppressing an increase in the circuit scale. The harmonic extraction circuit 140 is not limited to the configuration using the harmonic stop circuit, and may use a filter circuit or the like that extracts only a doublet from the RF signal RF 4.
The distortion compensation circuit 150A is provided between the harmonic extraction circuit 140 and the synthesizer 120 in the sub path P2. Distortion compensation circuitThe circuit 150A is a circuit for intentionally injecting a doubler 2F for compensating third-order intermodulation distortion0The amplitude and phase of the signal are adjusted and output. Specifically, the distortion compensation circuit 150A includes, for example, an amplitude adjustment circuit 200, a phase adjustment circuit 210, and a matching circuit 220.
Amplitude adjustment circuit 200 adjusts the amplitude of the double wave 2F extracted by harmonic extraction circuit 1400Is adjusted and supplied to the phase adjusting circuit 210. The distortion compensation circuit 150A includes the amplitude adjustment circuit 200, and thus can adjust the level of the output power of the transmission signal with respect to the double wave 2F0Is adjusted. The amplitude adjustment circuit 200 may be configured by, for example, an amplifier (2 nd amplifier) that increases the power of the double wave. This enables the double wave 2F to be generated with an increase in the output power of the transmission signal0Is increased. Or at a double wave 2F0When the power of the amplitude adjustment circuit 200 is higher than the power level required for distortion compensation, the amplitude adjustment circuit may be formed of an attenuator.
The phase adjustment circuit 210 is provided at a stage subsequent to the amplitude adjustment circuit 200, for example. The phase adjusting circuit 210 supplies the double wave 2F0Is adjusted to a phase suitable for distortion compensation and output.
The matching circuit 220 matches the impedances of the phase adjustment circuit 210 and the synthesizer 120.
According to the above configuration, the distortion compensation circuit 150A can provide a double wave 2F to be intentionally injected into the input of the amplifier 111 of the subsequent stage0The amplitude and phase of the signal are adjusted. The order of the components included in the distortion compensation circuit 150A is not limited to this, and may be changed as appropriate. For example, the amplitude adjustment circuit 200 may be provided at a stage subsequent to the phase adjustment circuit 210. The synthesizer 120, the matching circuits 130, 131, and 220, the harmonic extraction circuit 140, and the phase adjustment circuit 210 may be configured to include elements such as inductors and capacitors, or may be configured to include resonators using elastic waves such as Surface Acoustic Wave (SAW) filters.
Next, the action of compensation of third-order intermodulation distortion will be described with reference to fig. 2 and 3. Fig. 2 is a graph showing a spectrum of a signal (i.e., the RF signal RF3 in fig. 1) supplied to the amplifier 111 of the subsequent stage. Fig. 3 is a diagram showing a part of a frequency spectrum of a signal (i.e., the RF signal RF4 in fig. 1) output from the amplifier 111 of the subsequent stage. In the graphs shown in fig. 2 and 3, the horizontal axis shows the frequency of the signal, and the vertical axis shows the Power Spectral Density (PSD).
As shown in fig. 2, the fundamental wave F via the main path P1 is supplied to the amplifier 111 at the subsequent stage0And a doublewave 2F via a secondary path P20. Here, let fundamental wave F0Involving two frequencies f close to each other1、f2(f1＜f2) The component (c). At this time, the two frequencies f are extracted in the harmonic extraction circuit 1401、f2Respective doublets, thus doublets 2F0Comprising two frequencies of 2f1、2f2The component (c). Like this, frequency f1、f2Signal and frequency 2f1、2f2And are added and supplied to the amplifier 111.
Then, as shown in fig. 3, the fundamental wave F is amplified by the amplification operation of the amplifier 111, and the output0The amplified signal of (a). In addition, the amplification operation of the amplifier 111 is performed on the fundamental wave F0The low frequency side of (2) generates a frequency of 2f1-f2Third order intermodulation distortion IM3LAt the fundamental wave F0Has a high-frequency side generation frequency of 2f2-f1Third order intermodulation distortion IM3H. The third order intermodulation distortion IM3L、IM3HAnd fundamental wave F0Frequency f of1、f2Since they are relatively close to each other, they are difficult to remove by a filter circuit or the like, and may cause deterioration in the linearity of the amplifier. In addition, in the amplifying operation of the amplifier 111, for example, a frequency of 2f may be generated1+f2、2f2+f1Other distortions such as third-order intermodulation distortion, but the frequency of these distortions is away from the fundamental wave F0Frequency f of1、f2Relatively far away, and therefore, the description is omitted here.
To compensate for closer proximity to the fundamental wave F0Third order intermodulation distortion IM3L、IM3HIn the present embodiment, the injection of the doublet 2F is intentionally performed0Thereby generating image cancellation third order intermodulation distortion IM3L、IM3HSuch compensation signal CSL、CSH. Specifically, in the synthesizer 120, the fundamental wave F0And a doubler 2F0The added signals are input to an amplifier 111, thereby generating a signal having a double wave 2F0One frequency 2f of1And fundamental wave F0Of another frequency f2Frequency of difference (2 f)1-f2) Is compensated forL. In addition, 2F with a double wave is generated0Of another frequency 2f2And fundamental wave F0Of a frequency f1Frequency of difference (2 f)2-f1) Is compensated forH. These compensation signals CSL、CSHRespectively with third order intermodulation distortion IM3L、IM3HAre equal in frequency. In addition, the phase adjustment circuit 210 adjusts the frequency of the double wave 2F0Is transformed so that the compensation signal CSL、CSHPhase and third order intermodulation distortion IM3L、IM3HThe phases of (a) and (b) are substantially opposite phases in the output of the amplifier 111. Further, in the amplitude adjustment circuit 200, the double wave 2F is adjusted0Is adjusted so that the compensation signal CSL、CSHAmplitude of and third order intermodulation distortion IM3L、IM3HAre cancelled by each other in the output of the amplifier 111. Thus, as shown in FIG. 3, the third order intermodulation distortion IM3L、IM3HCompensated signal CSL、CSHAnd (4) counteracting. In addition, in fig. 3, in order to show the compensation signal CSL、CSHAnd third order intermodulation distortion IM3L、IM3HIs substantially in opposite phase, compensating signal CSL、CSHShown facing downward.
By the above-described operation, in the power amplifier circuit 100A, the third-order intermodulation distortion IM3 generated in the amplifier 111 can be suppressedL、IM3HThe influence of (c). From this, rootAccording to the power amplifier circuit 100A, deterioration of linearity can be suppressed.
In the present embodiment, a double wave generated by the amplification operation of the amplifier 111 is extracted, and the double wave is injected to the input of the amplifier 111 by the feedback operation. That is, according to the present embodiment, it is not necessary to newly provide a generation circuit, an amplifier, and the like for generating a double wave for injection. Therefore, the power amplification circuit 100A can suppress the influence of the intermodulation distortion while suppressing an increase in the circuit scale, as compared with a configuration including an amplifier different from an amplifier that is a factor causing the intermodulation distortion, as disclosed in patent document 1, for example.
In the present embodiment, a harmonic stop circuit is used as the harmonic extraction circuit 140. Thus, the harmonic extraction circuit can be configured while suppressing an increase in the circuit scale. Since the extracted double wave is supplied to the distortion compensation circuit 150A, the distortion compensation circuit 150A does not need to include a filter circuit or the like for attenuating the fundamental wave. This also suppresses an increase in the circuit scale. Further, the configuration in which the distortion compensation circuit includes the filter circuit is not intended to be excluded.
Further, according to the configuration disclosed in patent document 1, since the main path between the divider and the combiner does not include a circuit for attenuating a double wave, the double wave generated by the amplification operation of the first-stage amplifier passes through the main path. Thus, even if a double wave is generated in the sub path, the double wave passing through the main path and the double wave passing through the sub path may be cancelled out when added to the synthesizer. Therefore, the power of the double wave injected into the amplifier 111 may be insufficient. On the other hand, in the present embodiment, the matching circuit 131 provided in the main path P1 also has a function of attenuating the double wave. Thus, in the present embodiment, a high-power double wave can be injected into the amplifier 111 as compared with the configuration disclosed in patent document 1. Therefore, according to the power amplifier circuit 100A, the influence of the intermodulation distortion can be suppressed while increasing the output power.
In addition, in this embodiment, the double wave generated in the amplifier 111 of the subsequent stage (power stage) is used for injection. Therefore, a large-power double wave can be injected compared with a structure in which a double wave generated in an amplifier of a primary stage (driving stage) is used for injection as disclosed in patent document 1. Therefore, the power amplifier circuit 100A can increase the output power and suppress the influence of the intermodulation distortion.
In the power amplification circuit 100A, a circuit provided between the amplifier 110 and the synthesizer 120 and having a function of attenuating a double wave is not limited to the matching circuit 131. For example, a circuit designed to cope with the fundamental wave F may be provided in place of the matching circuit 1310An amplifier for amplifying the frequency band of (a). This allows the double wave generated by the amplification operation of the first-stage amplifier 110 to be attenuated. In this case, since the power amplification circuit includes a three-stage amplifier in the main path P1, the output power of the transmission signal can be further increased. In this case, matching circuits may be provided at the front stage and the rear stage of the amplifier provided in place of the matching circuit 131.
Note that each of the components included in the power amplifier circuit 100A shown in fig. 1 does not necessarily have to be provided as an independent circuit, and one circuit may have a plurality of functions. For example, the distortion compensation circuit 150A may be replaced with the matching circuit 220, and the phase adjustment circuit 210 may also function as the matching circuit 220.
Although the above-described embodiment has been described with the case where the amplifier 111 is injected with a doublet wave to compensate for third-order intermodulation distortion, it is also possible to compensate for higher-order intermodulation distortion. More generally, if the frequency is f in the amplifier 1111、f2Is amplified to generate a frequency of { (N +1) f1-Nf2And { (N +1) f2-Nf1The (2N +1) -order intermodulation distortion of (N is an integer of 1 or more). Therefore, these high-order intermodulation distortions can be cancelled by injecting harmonics of an integer multiple of the fundamental frequency.
Fig. 4A and 4B are graphs showing simulation results of third-order intermodulation distortion in the power amplifier circuit according to embodiment 1 of the present invention and a comparative example. Here, the comparative example is a configuration in which the distortion compensating circuit 150A is not provided in the power amplifying circuit 100A shown in fig. 1. Fig. 4A shows third-order intermodulation distortion on the lower frequency side than the fundamental wave, and fig. 4B shows third-order intermodulation distortion on the higher frequency side than the fundamental wave. In the graphs shown in fig. 4A and 4B, the horizontal axis shows the output power pout (dbm) of the transmission signal, and the vertical axis shows the output level (dBc) of the third-order intermodulation distortion with respect to the fundamental wave.
As shown in fig. 4A and 4B, in the present embodiment and the comparative example, when the output power exceeds a certain output power, the output power of the third-order intermodulation distortion rapidly increases on average. However, when the output power is compared when the distortion is-40 dBm, for example, fig. 4A shows about 28dBm in the comparative example, whereas about 29dBm in the present embodiment shows about 1.0dB higher than that in the comparative example. In fig. 4B, the value is about 27.5dBm in the comparative example, whereas about 29dBm in the present embodiment, which is improved by about 1.5dB compared to the comparative example. As can be seen from this, in the present embodiment, the influence of the intermodulation distortion is suppressed while increasing the output power.
Fig. 5 is a diagram showing a configuration example of a power amplifier circuit according to embodiment 2 of the present invention. Note that in this embodiment, descriptions of common matters with embodiment 1 are omitted, and only differences will be described. In particular, the same operational effects based on the same structure will not be mentioned in each embodiment.
The power amplifier circuit 100B shown in fig. 5 is provided with a distortion compensation circuit 150B instead of the distortion compensation circuit 150A, as compared with the power amplifier circuit 100A shown in fig. 1. The distortion compensation circuit 150B further includes a filter circuit 230, compared to the distortion compensation circuit 150A.
The filter circuit 230 is provided between the harmonic extraction circuit 140 and the synthesizer 120 (between the harmonic extraction circuit 140 and the amplitude adjustment circuit 200 in the present embodiment). The filter circuit 230 is provided to attenuate a signal having a frequency different from the double wave, in a case where the attenuation of a signal other than the double wave is insufficient when the double wave is extracted by the harmonic extraction circuit 140. The specific configuration of the filter circuit 230 is not particularly limited, and may be configured to include an inductor and a capacitor, or may be configured to include a resonator using an elastic wave such as a SAW filter.
With such a configuration, the power amplifier circuit 100B can improve the accuracy of suppressing third-order intermodulation distortion compared to the power amplifier circuit 100A. The position of the filter circuit 230 in the distortion compensation circuit 150B is not limited to this, and may be changed as appropriate. When the filter circuit 230 is provided at a stage before the amplitude adjustment circuit 200, the power of the input signal is preferably smaller than that of the filter circuit provided at a stage after the amplitude adjustment circuit.
Fig. 6 is a diagram showing an example of the configuration of a transmission module including the power amplifier circuit according to embodiment 1 of the present invention.
As shown in the figure, the transmission module 300A includes a semiconductor chip 20A mounted on a module substrate 10A, a matching circuit 132, and bias networks 180 to 182. The power amplifier circuit 100A and the bias circuits 170 to 172 according to embodiment 1 are integrated on the semiconductor chip 20A.
The matching circuit 132 matches impedances of the power amplification circuit 100A provided at the front stage and a circuit (not shown) provided at the rear stage of the power amplification circuit 100A. The matching circuit 132 may be formed inside the semiconductor chip 20A.
The bias networks 180 to 182 supply power supply voltages to the amplifiers 110 and 111 and the amplitude adjustment circuit 200, respectively. The bias circuits 170 to 172 are supplied with a battery voltage Vbatt, respectively, and supply bias currents or bias voltages to the amplifiers 110 and 111 and the amplitude adjustment circuit 200 based on control signals Ctrl1 to Ctr13 supplied from the outside of the module board 10A.
By integrating the power amplifier circuit 100A including the distortion compensation circuit 150A and the bias circuits 170 to 172 on the same semiconductor chip 20A in this manner, the size of the transmission module can be reduced as compared with a configuration in which the distortion compensation circuit 150A is formed outside the semiconductor chip 20A, for example.
Fig. 7 is a diagram showing an example of the configuration of a transmission module including the power amplifier circuit according to embodiment 2 of the present invention.
As shown in the figure, the transmission module 300B is different from the transmission module 300A in that the semiconductor chip 20B is mounted on the module substrate 10B instead of the semiconductor chip 20A. The semiconductor chip 20B includes the power amplifier circuit 100B according to embodiment 2.
In this case, the power amplifier circuit 100B including the distortion compensation circuit 150B and the bias circuits 170 to 172 are integrated on the same semiconductor chip 20B, whereby the transmission module can be downsized.
Fig. 8 is a diagram showing another configuration example of a transmission module including the power amplification circuit according to embodiment 2 of the present invention.
As shown in the figure, the transmission module 300C is different from the transmission module 300A in that the filter circuit 230 included in the distortion compensation circuit 150B is formed outside the semiconductor chip 20C. That is, in the present configuration example, the harmonic wave output from the harmonic wave extraction circuit 140 is output once to the outside of the semiconductor chip 20C, and then returned to the semiconductor chip 20C again through the filter circuit 230.
In this configuration, when the filter circuit 230 is formed of, for example, a SAW filter, the cost can be reduced as compared with a configuration in which the filter circuit 230 is formed in the semiconductor chip 20C. In this case, the filter circuit 230 may be mounted on the module substrate 10C by a Surface Mount Device (SMD), for example.
The transmission modules 300A to 300C may be configured as high-frequency modules together with a reception module including a Low Noise Amplifier (LNA). The plurality of transmission modules 300A to 300C may constitute a multiband high-frequency module together with the plurality of reception modules. In this case, the plurality of modules each deal with signals of different frequency bands. The multiband high-Frequency module may include modules corresponding to an FDD (Frequency Division Duplex) system and a TDD (Time Division Duplex) system, respectively.
The exemplary embodiments of the present invention have been described above. The power amplifier circuits 100A and 100B include: an amplifier 111 that amplifies the RF signal RF3 and outputs an RF signal RF 4; a harmonic extraction circuit 140 that extracts a doublet wave included in the RF signal RF 4; a phase adjustment circuit 210 that adjusts the phase of the extracted two-fold wave; and a synthesizer 120 for synthesizing the phase-adjusted two-fold wave and the RF signal RF2 and outputting an RF signal RF 3. Thus, the power amplifier circuits 100A and 100B do not need to newly include a generation circuit, an amplifier, and the like for generating the injected double wave. Therefore, the power amplifier circuits 100A and 100B can suppress the intermodulation distortion IM3 while suppressing an increase in the circuit scale, as compared with the configuration disclosed in patent document 1L，、IM3HThe influence of (c).
In addition, the phase adjusting circuit 210 is used for the double wave 2F0Is converted so that the doublet 2F0With the fundamental wave F contained in the RF signal RF30The phase of the difference signal and the third order intermodulation distortion IM3 generated in the amplifier 111L、IM3HThe phase of (b) is substantially opposite to the phase of (d) at the output of the amplifier 111. Thus, the third order intermodulation distortion IM3L、IM3HCompensated signal CSL，、CSHTherefore, the influence of intermodulation distortion can be suppressed.
The power amplifier circuits 100A and 100B further include: an amplitude adjusting circuit 200 for the double wave 2F0Is adjusted so that the doublet 2F0With the fundamental wave F contained in the RF signal RF30The difference signal and the third order intermodulation distortion IM3 generated in the amplifier 111L、IM3HCancel each other out in the output of amplifier 111. Thereby, the double wave 2F can be adjusted according to the output power level of the transmission signal0Is adjusted.
In addition, the amplitude adjustment circuit 200 may be configured to adjust the amplitude of the double wave 2F0And an amplifier for amplifying the power of (1). This enables the double wave 2F to be generated with an increase in the output power of the transmission signal0Is increased.
The power amplifier circuits 100A and 100B further include:an amplifier 110 that amplifies the RF signal RF1 and outputs an RF signal RF 2; and a matching circuit 131 provided between the amplifier 110 and the synthesizer 120 and having a frequency of a double wave 2F0The frequency of (a). This prevents the doublet wave passing through the main path P1 and the doublet wave passing through the sub path P2 from being cancelled by the combiner 120. Therefore, the power amplifier circuits 100A and 100B can inject a double wave of high power to the amplifier 111, as compared with the configuration disclosed in patent document 1.
In the transmission module 300C, the power amplifier circuit 100B further includes: and a filter circuit 230 provided between the harmonic extraction circuit 140 and the synthesizer 120, for attenuating a signal having a frequency different from a frequency of a double wave, wherein the filter circuit 230 is formed outside the semiconductor chip 20C in which the amplifier 111 is formed. When the filter circuit 230 is formed of, for example, a SAW filter, the cost can be reduced as compared with a configuration in which the filter circuit 230 is formed in the semiconductor chip 20C.
The above-described embodiments are intended to facilitate understanding of the present invention and are not intended to limit the present invention. The present invention can be modified or improved without departing from the gist thereof, and the present invention also includes equivalents thereof. That is, the embodiments to which design changes are appropriately applied to each embodiment by those skilled in the art are included in the scope of the present invention as long as the features of the present invention are provided. For example, the elements and their arrangement, materials, conditions, shapes, dimensions, and the like included in the embodiments are not limited to the illustrated elements and their arrangement, materials, conditions, shapes, dimensions, and the like, and can be appropriately modified. Further, the elements included in the respective embodiments can be combined as long as the technical feasibility is achieved, and embodiments combining them are also included in the scope of the present invention as long as the features of the present invention are included.
Description of the reference numerals
10A-10C: module substrate, 20A to 20C: semiconductor chip, 100A, 100B: power amplification circuit, 110, 111: an amplifier, 120: synthesizer, 130, 131, 132, 220: matching circuit, 140: harmonic extraction circuit, 150A, 150B: distortion compensation circuit, 170-172: bias circuit, 180-182: bias network, 200: amplitude adjustment circuit, 210: phase adjustment circuit, 230: filter circuit, 300A to 300C: transmission module, T1: input terminal, T2: output terminal, P1: main path, P2: a secondary path.
