阅读说明：本技术 一种基于共晶键合的固定流导元件的密封方法 (Sealing method of fixed flow guide element based on eutectic bonding ) 是由 王旭迪 解亚杰 林文豫 王浩 丁云升 汪志伟 程霞 于 2020-06-09 设计创作，主要内容包括：本发明公开了一种基于共晶键合的固定流导元件的密封方法,首先使用光刻技术和热压键合工艺在硅片上制作固定流导元件,其次通过电子束蒸发镀膜工艺在固定流导元件上依次镀上Cr、Au、Ag和In金属层；再将一片的无氧铜板先进行表面处理,再进行上述镀膜工艺,依次镀上相应的Cr、Au、Ag和In金属层；之后在真空炉内进行最后的封装键合形成Ag-In合金层；最后待自然冷却后将其与KF40法兰相连接,安装于测试系统中。(The invention discloses a sealing method of a fixed flow guide element based on eutectic bonding, which comprises the steps of firstly manufacturing the fixed flow guide element on a silicon wafer by using a photoetching technology and a hot-pressing bonding process, and then sequentially plating Cr, Au, Ag and In metal layers on the fixed flow guide element by an electron beam evaporation plating process; then, carrying out surface treatment on one piece of oxygen-free copper plate, and then carrying out the coating process to sequentially coat corresponding Cr, Au, Ag and In metal layers; finally packaging and bonding In a vacuum furnace to form an Ag-In alloy layer; and finally, after natural cooling, connecting the test tube with a KF40 flange, and installing the test tube in a test system.)

1. A sealing method of a fixed flow guide element based on eutectic bonding is characterized by comprising the following steps: firstly, manufacturing a fixed current guide element on a silicon chip by using a photoetching technology and a hot-pressing bonding technology, and then sequentially plating Cr, Au, Ag and In metal layers on the fixed current guide element by using an electron beam evaporation coating process; secondly, carrying out surface treatment on a piece of oxygen-free copper plate, and then carrying out the coating process to sequentially coat corresponding Cr, Au, Ag and In metal layers; finally packaging and bonding In a vacuum furnace to form Ag-In alloy; and finally, connecting the flange with the test system and installing the flange in the test system.

2. The method of claim 1, further comprising the steps of:

a. taking a double-sided polished silicon wafer as a substrate, and soaking the double-sided polished silicon wafer in a hydrogen peroxide/concentrated sulfuric acid mixed solution for 30min, wherein the solution ratio is hydrogen peroxide: washing concentrated sulfuric acid at a ratio of 1:2 with deionized water for 10min, ultrasonically cleaning in an acetone solution for 10min, baking at the temperature of a 120 ℃ oven for 30min, and then putting the mixture into an ashing machine for ashing for 1 hour;

b. and (c) uniformly spin-coating AZ5530 photoresist on the silicon wafer processed in the step a by using a spin coater, and controlling the thickness of the photoresist. The spin coater lasts for 6s at the slow speed of 800r/s, then lasts for 40s at the fast speed of 1500r/s, is baked on a hot table for 10min to solidify the photoresist, then is clamped together with a corresponding mask plate, is placed under a URE-2000/35 ultraviolet exposure machine for exposure for 50s and is developed in a developing solution for 100 s, and finally, an ICP etching machine is used for etching a grating with the depth of 100nm, and holes are drilled in the central area of the grating by laser to be used as air outlets;

c. taking the other single-side polished silicon wafer as a cover plate, punching holes at corresponding positions of two ends of the grating in the step b by using laser to serve as air inlets, and then sequentially carrying out ultrasonic cleaning for 10min by using acetone, alcohol and deionized water;

d. coating a layer of electronic grade glycol solution on the polished surface of the cover plate silicon wafer obtained in the step c, covering the double-sided polished substrate silicon wafer in the step b on the solution with the grating surface facing downwards, putting the whole into an oven for pre-bonding, putting the whole into a high-temperature furnace for formal bonding, and naturally cooling to obtain the fixed flow guide element;

e. d, ultrasonically cleaning the fixed flow guide element prepared In the step d for 10min by acetone, alcohol and deionized water In sequence, and then plating Cr, Au, Ag and In metal layers with corresponding thicknesses on the other polished surface of the double-sided polished substrate silicon wafer by adopting an electron beam evaporation coating;

f. a customized oxygen-free copper plate with the diameter of 48mm is taken, and the surface roughness of the customized oxygen-free copper plate is processed through the processes of manual coarse grinding, electrolytic polishing and polishing liquid fine grinding, so that the surface roughness of the customized oxygen-free copper plate reaches the degree required by bonding. Then, carrying out metallization treatment on the copper plate subjected to surface treatment, and sequentially plating Cr, Au, Ag and In metal layers with corresponding thicknesses through electron beam evaporation coating;

g. and e, correspondingly attaching the fixed flow guide element obtained In the step e and the oxygen-free copper plate obtained In the step f, and then placing the fixed flow guide element into a vacuum furnace for eutectic bonding to form an Ag-In alloy layer. And after the natural cooling is finished, the sealing of the oxygen-free copper plate and the fixed flow guide element is obtained.

3. The method of claim 2, wherein the reticle pattern in step b is a 125-line grating, and the exposed portion is 10mm long and 2mm wide.

4. The method of claim 2, wherein the diameter of the outlet orifice in step b is 2 mmm.

5. The method of claim 2, wherein the diameter of the gas inlet orifice in step c is 3 mm.

6. The method of claim 2, wherein the pre-bonding temperature of the silicon wafer in the step d is 200 ℃, and the pre-bonding time is 120 min; and d, formally bonding the silicon wafer at 1100 ℃ for 30 min.

7. The method of claim 2, wherein the thicknesses of the Cr, Au, Ag and In plating metals In sequence In step e are 50nm, 80nm, 1000nm and 250nm, respectively.

8. The method of claim 2, wherein the thicknesses of the Cr, Au, Ag and In plating metals sequentially plated In the step e are respectively 50nm, 80nm, 1000nm and 250 nm; and f, manually and coarsely grinding the surface of the workpiece to be polished to be 3.2um, electrolytically polishing the surface to be polished to be 1.6um, and finely grinding the polishing solution to be 500 nm.

9. The method of claim 2, wherein the eutectic bonding temperature in step g is 180 ℃, the bonding vacuum is 80mTorr, and the bonding pressure is 3.5 MPa.

Technical Field

The invention relates to a method for manufacturing a fixed flow guide element and a sealing method thereof, in particular to a method for sealing the fixed flow guide element based on eutectic bonding.

Background

Eutectic bonding is a common method for manufacturing and packaging MEMS devices, atoms between bonding surfaces of different or same metals form interatomic acting force or form alloy compounds under the action of a certain force at a certain temperature, and the bonding surface with strong structure and good sealing performance is achieved.

Metals such as gold, silver, indium and tin are common bonding layer metals for packaging of MEMS devices, but in consideration of experimental requirements such as cost and temperature, silver and indium are increasingly widely used. According to the phase spectrum of the silver-indium binary alloy, silver and indium can be bonded at low temperature (180 ℃) to form alloy Ag₂In, the temperature of re-melting after cooling can reach 300 ℃.

The micro-nano processing technology has unique advantages in the aspect of manufacturing of micro-sized channels and is widely concerned, and the fixed flow guide element manufactured by the technology can further extend the lower limit of the leakage rate, and the size of the leakage rate is controllable, known and calibrated without other calibration equipment.

At present, for the packaging of a fixed flow guide element manufactured on the basis of a silicon chip, a common method is to use a Torr-Seal adhesive to Seal a prepared micro-channel and an oxygen-free copper plate, then Seal the oxygen-free copper plate and a metal flange and finally connect the oxygen-free copper plate and the metal flange with a test system, however, the Torr-Seal adhesive is an epoxy resin adhesive which can generate certain air release under the vacuum condition and is not suitable for the ultra-high vacuum environment, and a method of sintering glass powder is used to directly sinter and package the prepared micro-channel and the metal flange, but the prepared micro-channel and the metal flange are easy to cause pollution of the glass powder in the sintering process, the manufactured micro-channel is blocked, and the material of the metal flange is easy to cause thermal damage due to the high temperature because silicon (2.7 × 10)^-6/° c) and copper (17 × 10)^-6/° c), the thermal expansion coefficient difference is too large to directly perform good matching, and the problems of non-uniform bonding surface, area bonding, silicon chip cracking and the like are often caused in the bonding process. Therefore, there is a need to provide a new sealing method for securing the fixed flow guiding element in an ultra-high vacuum environmentA small leak rate is measured.

Disclosure of Invention

The present invention provides a eutectic bonding based sealing method for a fixed conductance element to solve the above stated problems. Firstly, manufacturing a fixed current guide element on a silicon chip by using a photoetching technology and a hot-pressing bonding technology, and then sequentially plating Cr, Au, Ag and In metal layers on the fixed current guide element by using an electron beam evaporation coating process; secondly, carrying out surface treatment on a piece of oxygen-free copper plate, and then carrying out the coating process to sequentially coat Cr, Au, Ag and In metal layers; finally packaging and bonding In a vacuum furnace to form an Ag-In alloy layer; and finally, connecting the flange with the test system and installing the flange in the test system.

The technical problem to be solved by the invention is as follows:

the present invention provides a eutectic bonding based sealing method for a fixed conductance element to solve the above stated problems. Firstly, manufacturing a fixed current guide element on a silicon chip by using a photoetching technology and a hot-pressing bonding technology, and then sequentially plating Cr, Au, Ag and In metal layers on the fixed current guide element by using an electron beam evaporation coating process; secondly, performing surface roughness treatment on a piece of customized oxygen-free copper plate, and then performing the coating process to sequentially coat Cr, Au, Ag and In metal layers; finally packaging and bonding In a vacuum furnace to form an Ag-In alloy layer; and finally, connecting the flange with the test system and installing the flange in the test system.

As a preferred embodiment of the above method, the method operates as follows:

a. taking a double-sided polished silicon wafer as a substrate, and soaking the double-sided polished silicon wafer in a hydrogen peroxide/concentrated sulfuric acid mixed solution for 30min, wherein the solution ratio is hydrogen peroxide: washing concentrated sulfuric acid at a ratio of 1:2 with deionized water for 10min, ultrasonically cleaning in an acetone solution for 10min, baking in an oven at 120 ℃ for 30min, and then putting into an ashing machine for ashing for 1 h;

b. and (c) uniformly spin-coating AZ5530 photoresist on the silicon wafer processed in the step a by using a spin coater, and controlling the thickness of the photoresist. The spin coater lasts for 6s at the slow speed of 800r/s, then lasts for 40s at the fast speed of 1500r/s, is baked on a hot table for 10min to solidify the photoresist, then is clamped together with a corresponding mask plate, is placed under a URE-2000/35 ultraviolet exposure machine for exposure for 50s and is developed in a developing solution for 100 s, and finally, an ICP etching machine is used for etching a grating with the depth of 100nm, and holes are drilled in the central area of the grating by laser to be used as air outlets;

c. taking the other single-side polished silicon wafer as a cover plate, punching holes at corresponding positions of two ends of the grating in the step b by using laser to serve as air inlets, and then sequentially carrying out ultrasonic cleaning for 10min by using acetone, alcohol and deionized water;

d. coating a layer of electronic grade glycol solution on the polished surface of the cover plate silicon wafer obtained in the step c, covering the double-sided polished substrate silicon wafer in the step b on the solution with the grating surface facing downwards, putting the whole into an oven for pre-bonding, putting the whole into a high-temperature furnace for formal bonding, and naturally cooling to obtain the fixed flow guide element;

e. d, ultrasonically cleaning the fixed flow guide element prepared In the step d for 10min by acetone, alcohol and deionized water In sequence, and then plating Cr, Au, Ag and In metal layers with corresponding thicknesses on the other polished surface of the double-sided polished substrate silicon wafer by adopting an electron beam evaporation coating;

f. a customized oxygen-free copper plate with the diameter of 48mm is taken, and the surface roughness of the customized oxygen-free copper plate is processed through the processes of manual coarse grinding, electrolytic polishing and polishing liquid fine grinding, so that the surface roughness of the customized oxygen-free copper plate reaches the degree required by bonding. Then, carrying out metallization treatment on the copper plate subjected to surface treatment, and sequentially plating Cr, Au, Ag and In metal layers with corresponding thicknesses through electron beam evaporation coating;

g. and e, correspondingly attaching the fixed flow guide element obtained In the step e and the oxygen-free copper plate obtained In the step f, and then placing the fixed flow guide element into a vacuum furnace for eutectic bonding to form an Ag-In alloy layer. And after the natural cooling is finished, the sealing of the oxygen-free copper plate and the fixed flow guide element is obtained.

As a preferred embodiment of the above method, the mask pattern in step b is a 125-line grating, and the exposed part has a length of 10mm and a width of 2 mm.

As a preferred embodiment of the above method, the diameter of the small hole of the air outlet in step b is 2 mm.

As a preferred embodiment of the above method, the diameter of the gas inlet orifice in step c is 3 mm.

As a preferred embodiment of the method, the pre-bonding temperature of the silicon wafer in the step d is 200 ℃, and the pre-bonding time is 120 min; and d, formally bonding the silicon wafer at 1100 ℃ for 30 min.

As a preferred embodiment of the above method, the thicknesses of the Cr, Au, Ag and In plating metals of the sequential plating films In the step e are 50nm, 80nm, 1000nm and 250nm, respectively.

As a preferred embodiment of the method, the thicknesses of the Cr, Au, Ag and In plating metals sequentially plated In the step e are respectively 50nm, 80nm, 1000nm and 250 nm; and f, manually and coarsely grinding the surface of the workpiece to be polished to be 3.2um, electrolytically polishing the surface to be polished to be 1.6um, and finely grinding the polishing solution to be 500 nm.

As a preferred embodiment of the above method, the eutectic bonding temperature in step g is 180 ℃, the degree of vacuum of the bonding is 80mTorr, and the bonding pressure is 3.5 MPa.

Compared with the prior art, the beneficial technical effects of the invention are as follows:

1. the invention provides a novel sealing method for an ultrahigh vacuum fixed flow guide element, which utilizes a eutectic bonding method to seal and fix the flow guide element. The method is simple and easy to realize, and the eutectic bonding process and the microchannel manufacturing process are relatively mature, so that mass production can be realized. The sealed fixed flow guide element has strong structural performance, good air tightness and high sealing success rate.

2. The silver has high heat conductivity, good metal ductility and good stress buffering effect. The stress problem caused by the difference of thermal expansion between silicon and copper can be effectively reduced. In addition, the silver has good vacuum performance and small material outgassing rate.

3. Due to the characteristic of low melting point (156 ℃), the indium can effectively reduce the bonding temperature when silver is used as the intermediate layer, can reduce the bonding temperature to be below 200 ℃, and does not cause thermal influence on the metal flange. In addition, the indium has good vacuum performance and small material outgassing rate.

4. Silver (Ag)Indium as an intermediate metal layer for bonding, forming an intermetallic compound Ag during the bonding process₂In, the re-melting temperature can reach 300 ℃, so that the whole fixed flow guide element is suitable for the environment with relatively high temperature and has certain high temperature resistance.

5. Ag as an intermetallic compound formed during the bonding process as an intermediate metal layer in the bonding of Ag-in₂In is generated by interatomic force, has structural property and certain anti-vibration capability.

Drawings

Fig. 1 is a flow chart of a fixed conductance element fabricated on a silicon wafer using photolithography and thermocompression bonding.

Fig. 2 is a schematic cross-sectional view of a fixed flow guide element in the direction of gas flow.

Fig. 3 is a schematic sectional view of an installation of a eutectic bonding based sealing method of a fixed conductance element.

Reference numbers in the figures: 1-AZ5530 photoresist, 2-double-sided polished substrate silicon wafer, 3-cover plate silicon wafer, 4-oxygen-free copper plate, 5-KF40 flange, 6-bolt group and 7-Ag-In alloy layer

Detailed Description

As shown in fig. 3, this example is a sealing method of a eutectic bonding-based fixed conductance element, and the specific embodiment operates as follows:

1. taking a double-sided polished silicon wafer 2 as a substrate, and soaking the double-sided polished silicon wafer in a hydrogen peroxide/concentrated sulfuric acid mixed solution for 30min, wherein the solution ratio is hydrogen peroxide: washing concentrated sulfuric acid at a ratio of 1:2 with deionized water for 10min, ultrasonically cleaning in an acetone solution for 10min, baking at the temperature of a 120 ℃ oven for 30min, and then putting the mixture into an ashing machine for ashing for 1 hour;

2. and (b) uniformly spin-coating AZ5530 photoresist 1 on the silicon wafer processed in the step a by using a spin coater to control the thickness of the photoresist, as shown in FIG. 1 (a). The spin coater continues at the slow speed of 800r/s for 6s, then at the fast speed of 1500r/s for 40s, and is baked on a hot table for 10min to solidify the photoresist, then the photoresist and a corresponding mask are clamped together, the photoresist is exposed for 50s in a URE-2000/35 ultraviolet exposure machine, and is developed in a developing solution for 100 s to obtain a grating on the photoresist 1 shown in figure 1(b), then an ICP etching machine is used for etching the grating with the depth of 100nm as shown in figure 1(c), the photoresist 1 is washed away by acetone to obtain a silicon wafer 2 with the grating as shown in figure 1(d), and the central area of the grating is perforated by laser to be used as an air outlet;

3. taking the other single-sided polished silicon wafer 3 as a cover plate, punching holes at corresponding positions of two ends of the grating in the step b by using laser to serve as air inlets, and then sequentially carrying out ultrasonic cleaning on the cover plate silicon wafer 3 and the double-sided polished silicon wafer substrate 2 by using acetone, alcohol and deionized water;

4. as shown in fig. 1(e), coating a layer of electronic-grade glycol solution on the polished surface of the cover plate silicon wafer 3 obtained in the step c, covering the double-sided polished base silicon wafer 2 in the step b with the grating surface facing downwards on the solution, putting the whole into an oven together for pre-bonding, finally putting the whole into a high-temperature furnace for formal bonding, and naturally cooling to obtain a fixed flow guide element, wherein the flow of gas in the grating channel can be observed after the holes are punched in the double-sided polished base silicon wafer 2 and the cover plate silicon wafer 3 on the cross section shown in fig. 2;

5. d, ultrasonically cleaning the fixed flow guide element prepared In the step d for 10min by acetone, alcohol and deionized water In sequence, and then plating Cr, Au, Ag and In metal layers with corresponding thicknesses on the other polished surface of the double-sided polished substrate silicon wafer 2 by adopting an electron beam evaporation coating;

6. a customized oxygen-free copper plate 4 with the diameter of 48mm is taken, and the surface roughness of the customized oxygen-free copper plate is processed through the processes of manual coarse grinding, electrolytic polishing and polishing solution fine grinding, so that the surface roughness of the customized oxygen-free copper plate reaches the degree required by bonding. Then, carrying out metallization treatment on the copper plate subjected to surface treatment, and plating Cr, Au, Ag and In metal layers with corresponding thicknesses In sequence through electron beam evaporation plating;

7. as shown In fig. 3, after the fixed flow guiding element obtained In the step e is correspondingly attached to the oxygen-free copper plate 4 In the step f, the fixed flow guiding element is placed into a vacuum furnace for eutectic bonding to form an Ag-In alloy layer, and after the natural cooling is finished, the sealing of the oxygen-free copper plate and the channel type fixed flow guiding element is obtained; finally, the steel pipe is connected with a KF40 flange 5, and a bolt group 6 is used for carrying out metal knife edge fastening and sealing.

The background leakage rate of the flow guide element and the metal knife edge sealing KF40 flange is sealed and fixed by using a eutectic bonding method, and reaches minus eleven orders of magnitude, so that the requirement of sealing the ultrahigh vacuum standard leak hole is met.