阅读说明：本技术 一种红外焦平面探测器的铟柱及其制备方法 (Indium column of infrared focal plane detector and preparation method thereof ) 是由 齐志强 潘德彬 孙昊骋 胡文良 于 2020-04-23 设计创作，主要内容包括：本发明涉及一种红外焦平面探测器的铟柱的制备方法及用该方法制备的铟柱,本发明方法首先在芯片表面旋涂薄光刻胶,对准像元或读出单元电极中心开展一次套刻,制备圆形打底金属沉积孔,通过电子束蒸发蒸镀复合金属膜,采用湿法剥离方式获得打底金属图形阵列；然后,旋涂中等厚度光刻胶,对准打底金属图形中心开展二次套刻,制备方形铟柱沉积孔,再通过真空热蒸发沉积铟膜,采用湿法剥离工艺获得铟柱；最后采用回流炉在甲酸氛围下缩球,获得大高宽比铟柱阵列。本发明整体工艺难度比现有方式低,制备出的铟柱尺寸能够满足要求,而且尺寸均匀性较高,铟柱表面均匀且光滑,完全能够满足倒装互连工艺一致性要求。(The invention relates to a method for preparing indium column of infrared focal plane detector and indium column prepared by the method, the method of the invention firstly spin-coats thin photoresist on the surface of the chip, carries on one-time alignment aiming at the center of pixel or reading unit electrode, prepares round bottoming metal deposition hole, evaporates and evaporates the compound metal film through electron beam, adopts wet stripping mode to obtain bottoming metal pattern array; then spin-coating photoresist with medium thickness, aligning the center of the underlying metal pattern, carrying out secondary alignment, preparing a square indium column deposition hole, depositing an indium film by vacuum thermal evaporation, and obtaining an indium column by adopting a wet stripping process; and finally, shrinking the balls in a reflow furnace in a formic acid atmosphere to obtain the indium column array with the large height-to-width ratio. The overall process difficulty of the invention is lower than that of the existing mode, the size of the prepared indium column can meet the requirement, the size uniformity is higher, the surface of the indium column is uniform and smooth, and the consistency requirement of the flip interconnection process can be completely met.)

1. A preparation method of an indium column of an infrared focal plane detector is characterized by comprising the following steps:

1) gluing the chip (1): cleaning the surface of the chip (1) and removing residual moisture, and then spin-coating a layer of photoresist (4) on the surface of the chip (1);

2) etching a mask: round photoetching holes are spaced on a mask plate according to the space size parameters of the indium columns (2), then the mask plate is covered on the chip (1) coated with the glue in the step 1), first photoetching exposure is carried out, and then development and fixation are carried out;

3) plating base metal (3): plating a priming metal (3) on the surface of the chip (1) treated in the step 2) by adopting a vacuum coating mode, then cleaning the photoresist (4), and stripping redundant metal;

4) gluing again: spin-coating a layer of photoresist (4) on the surface of the chip (1) processed in the step 3) again;

5) and (5) mask etching again: square photoetching holes are spaced on the mask plate according to the space size parameters of the indium columns (2), then the mask plate is covered on the chip (1) coated with the glue in the step 4), photoetching exposure is carried out for the second time, and then development and fixation are carried out;

6) indium-plated posts (2): plating an indium film on the surface of the chip (1) processed in the step 5) by adopting a vacuum plating mode, then cleaning the photoresist (4), and stripping redundant indium to obtain the chip (1) with the indium columns (2);

7) and (3) ball backflow and shrinkage: and (3) reflowing the chip (1) with the indium columns (2) obtained in the step 6) in a vacuum reflow furnace to shrink balls, so that the indium columns (2) are changed into an ellipsoid from a square shape, and thus indium column (2) finished products are obtained.

2. The method for preparing indium columns of an infrared focal plane detector as claimed in claim 1, wherein: in the step 1), the chip (1) is cleaned by respectively ultrasonically cleaning the chip for 3 minutes by sequentially adopting acetone and isopropanol and then washing the chip by using deionized water.

3. The method for preparing indium columns of an infrared focal plane detector as claimed in claim 1, wherein: in the step 1), the surface of the chip (1) is spin-coated with an AZ5214 type photoresist (4), a spin coater is adopted for spin coating, the rotation number is 4000 rpm, the spin coating time is 30 seconds, and after the photoresist is coated, the chip is placed and heated for 90 seconds at the temperature of 95 ℃; in the step 4), the surface of the chip (1) is spin-coated with the AZ4620 type photoresist (4), a spin coater is adopted for spin coating, the rotation number is 1000 rpm, the spin coating time is 40 seconds, and after the photoresist is coated, the chip is placed and heated for 180 seconds at the temperature of 100 ℃.

4. The method for preparing indium columns of an infrared focal plane detector as claimed in claim 1, wherein: in the step 2), the diameter of the circular photoetching hole is 5 mu m; in the step 5), the size of the square photoetching hole is 10 microns multiplied by 10 microns.

5. The method for preparing indium columns of an infrared focal plane detector as claimed in claim 3, wherein: in the step 2), the exposure dose is controlled to be 58.2-60.5 mJ per square centimeter, the exposed chip (1) is placed into a tetramethylammonium hydroxide developing solution with the concentration of 2.38% for development for 45-55 seconds, and then the pure water is used for fixing for 30-40 seconds; in the step 5), the exposure dose is controlled to be 396.9-405.7 joules per square centimeter, the exposed chip (1) is placed into a tetramethylammonium hydroxide developing solution with the concentration of 2.38% for development for 100-120 seconds, and then pure water is used for fixing for 30-40 seconds.

6. The method for preparing indium column for infrared focal plane detector as claimed in claim 1, wherein in said step 3), the electron beam evaporation equipment is used to plate the base metal (3) by vacuum deposition, the deposition rate is controlled at 0.2 nm/s, and the working vacuum degree is controlled at 5 × 10^-6Pascal, in the step 3), the priming metal (3) comprises a 50nm metal titanium adhesion layer, a 30nm metal platinum barrier layer and an 80nm metal gold wetting layer which are deposited in sequence.

7. The method for preparing indium columns of an infrared focal plane detector as claimed in claim 1, wherein: in the step 4), the photoresist (4) is cleaned by soaking in acetone for 30-60 minutes and then cleaning with isopropanol; in the step 6), the photoresist (4) is cleaned by soaking in acetone for 90-120 minutes and then cleaning with isopropanol.

8. The method for preparing indium columns of an infrared focal plane detector as claimed in claim 1, wherein: in the step 6), indium is deposited on the indium-plated film by adopting a vacuum thermal evaporation method, and the deposition thickness is 6 microns.

9. The method for preparing indium columns of an infrared focal plane detector as claimed in claim 1, wherein: in the step 7), the reflow ball shrinking is to heat the chip (1) with the indium columns (2) obtained in the step 6) to 80 ℃ in a vacuum reflow furnace, then to continuously heat the chip to 200 ℃ under the condition of introducing formic acid, and then to stop introducing the formic acid and to cool the chip to room temperature.

10. An indium column (2) produced by the production method according to claim 1 to 9.

Technical Field

The invention relates to the technical field of infrared detectors, in particular to an indium column of an infrared focal plane detector and a preparation method thereof.

Background

The infrared focal plane array (IRFPA) detector has the functions of radiation sensitivity, charge storage, multiplex transmission and the like, is a plane array detector which is positioned on the focal plane of an optical system and provided with a signal processing circuit and is adopted by a second generation staring type infrared thermal imaging system, the number of detection units of the plane array detector is higher than that of a first generation detector by more than 3 orders of magnitude, the fast electric scanning imaging, the identification and the tracking of a target are realized through a Flip-Chip technology and a CMOS (complementary metal oxide semiconductor) reading circuit technology, and the plane array detector is widely applied to weapon equipment such as infrared guidance, tracking, staring imaging and the like. In recent years, the concept of the third-generation infrared detector with the technical characteristics of high detection rate, large area array, low cost and multispectral is gradually proposed, and the important development trend of the infrared detector is that the specifications of the detector are continuously increased (an ultra-large area array and ultra-small pixels) and the difficulty of the preparation process is reduced based on the flip process and the reading circuit technology of the second generation.

Hybrid focal plane detectors are a core device of modern imaging systems. For the hybrid focal plane detector, the sensitive element chip and the signal reading circuit are respectively developed, and then the units are electrically interconnected one by one. The advantage is that the preparation process is relatively simple and flexible, but also brings about complex interconnection problems. At present, an indium column flip interconnection process is generally adopted in the development of a hybrid focal plane device, indium columns are arranged on the surfaces of a detector array and a reading circuit according to a grid array shape, sensitive elements are directly mounted on the reading circuit in a flip mode, high-density electrical connection is achieved through the indium columns and the indium columns on the reading circuit, and the development requirements of large-scale area array focal planes can be met. At present, the processing of indium columns mainly adopts two modes: one is made by diffusion to form a junction, and the other is obtained by epitaxial growth.

With the increasing of the application end to the detector array scale and the imaging resolution, the pixel center distance is reduced continuously, and the requirement that the transverse size of the indium column is reduced along with the short circuit between pixels caused by the deformation of the indium column is avoided, so that the height of the indium column obtained by direct growth is reduced rapidly. Two problems thus arise: 1) as the height of the indium column is reduced, the interconnection leveling tolerance of the chip is reduced, and a small leveling deviation during interconnection can cause the interconnection failure of a part of the area at one side of the sensitive element, and the unevenness compensation capability of the chip is poor, so that the communication rate of the pixel is deteriorated; 2) the ability of relieving shear deformation caused by thermal mismatch between the sensitive chip and the read-out circuit chip is poor, the reliability of the device for resisting thermal shock is reduced, and the fatigue life is shortened. Therefore, the indium columns with the large height-to-width ratio can obviously reduce the blind pixel rate of the focal plane device and improve the reliability of the device, and the indium columns with the large height-to-width ratio have very important significance for developing larger-scale high-resolution detection devices. However, the conventional method generally adopts a thick photoresist lithography process to increase the height of the indium columns, but the thick photoresist process causes the dimensional uniformity of the indium columns to be poor, and as the area array density increases, the thick photoresist is more difficult to strip.

Disclosure of Invention

The invention provides an indium column of an infrared focal plane detector and a preparation method thereof, aiming at the technical problems in the prior art, the whole process difficulty is lower than that of the existing mode, the size of the prepared indium column can meet the requirement, the size uniformity is higher, the surface of the indium column is uniform and smooth, and the consistency requirement of an inverted interconnection process can be completely met.

The technical scheme for solving the technical problems is as follows: a method for preparing indium columns of an infrared focal plane detector comprises the following steps:

1) gluing the chip: cleaning the surface of the chip, removing residual moisture, and spin-coating a layer of photoresist on the surface of the chip;

2) etching a mask: spacing circular photoetching holes on a mask plate according to the spacing size parameters of the indium columns, then covering the mask plate on the chip coated with the glue in the step 1), carrying out first photoetching exposure, and then developing and fixing;

3) plating a base metal: plating base metal on the surface of the chip treated in the step 2) by adopting a vacuum coating mode, then cleaning the photoresist, and stripping redundant metal;

4) gluing again: spin-coating a layer of photoresist on the surface of the chip treated in the step 3) again;

5) and (5) mask etching again: spacing square photoetching holes on a mask plate according to the spacing size parameters of the indium columns, then covering the mask plate on the chip coated with the glue in the step 4), carrying out secondary photoetching exposure, and then developing and fixing;

6) plating indium columns: plating an indium film on the surface of the chip processed in the step 5) by adopting a vacuum plating mode, then cleaning the photoresist, and stripping redundant indium to obtain a chip with indium columns;

7) and (3) ball backflow and shrinkage: and (3) reflowing the chip with the indium columns obtained in the step 6) in a vacuum reflow furnace to shrink balls so that the indium columns are changed into an ellipsoid from a square shape, and thus obtaining indium column finished products.

On the basis of the technical scheme, the invention can be further improved as follows.

Further, in the step 1), the chip is cleaned by respectively ultrasonically cleaning the chip for 3 minutes by sequentially using acetone and isopropanol, and then washing the chip by using deionized water.

Further, in the step 1), the surface of the chip is spin-coated with AZ5214 type photoresist, a spin coater is adopted for spin coating, the rotation number is 4000 rpm, the spin coating time is 30 seconds, and the chip is placed after being coated with the photoresist and is heated for 90 seconds at the temperature of 95 ℃; in the step 4), the surface of the chip is spin-coated with AZ4620 type photoresist, a spin coater is adopted for spin coating, the rotation speed is 1000 rpm, the spin coating time is 40 seconds, and after the photoresist is coated, the chip is placed and heated for 180 seconds at the temperature of 100 ℃.

Further, in the step 2), the diameter of the circular photoetching hole is 5 μm; in the step 5), the size of the square photoetching hole is 10 microns multiplied by 10 microns.

Preferably, in the step 2), the exposure dose is controlled to be 58.2 to 60.5 mJ per square centimeter, the exposed chip is placed into a tetramethylammonium hydroxide developing solution with the concentration of 2.38 percent for development for 45 to 55 seconds, and then the pure water is used for fixing for 30 to 40 seconds; in the step 5), the exposure dose is controlled to be 396.9-405.7 joules per square centimeter, the exposed chip is placed into a tetramethylammonium hydroxide developing solution with the concentration of 2.38% for development for 100-120 seconds, and then pure water is used for fixing for 30-40 seconds.

Preferably, in the step 3), electron beam evaporation is adoptedPlating the priming metal by vacuum deposition, controlling the deposition rate at 0.2 nm/s and the working vacuum degree at 5 × 10^-6Pascal, in the step 3), the priming metal comprises a 50nm metal titanium adhesion layer, a 30nm metal platinum barrier layer and an 80nm metal gold wetting layer which are deposited in sequence.

Further, in the step 4), the photoresist needs to be soaked in acetone for 30-60 minutes and then washed by isopropanol; in the step 6), the photoresist needs to be soaked in acetone for 90-120 minutes and then washed by isopropanol.

Further, in the step 6), indium is deposited on the indium-plated film by adopting a vacuum thermal evaporation method, and the deposition thickness is 6 μm.

Further, in the step 7), the reflow ball shrinking needs to heat the chip with the indium columns obtained in the step 6) to 80 ℃ in a vacuum reflow furnace, then continuously heat the chip to 200 ℃ under the condition of introducing formic acid, and then stop introducing the formic acid and cool the chip to room temperature.

The invention also claims a technical scheme of the indium column prepared by the preparation method.

The invention has the beneficial effects that: compared with the method for directly growing the indium columns, the method has the advantages that although some process steps are added, the whole process difficulty is greatly reduced, the controllability of the process is high, the operation precision is high, and the quality of the prepared indium columns is excellent; the size uniformity of the indium columns prepared by the method is greatly improved, and the consistency of the flip interconnection process is greatly improved; the reflow ball-shrinking process can increase the height of the indium columns, and meanwhile, the surfaces of the indium columns obtained by reflow ball-shrinking are more uniform and smooth.

Drawings

FIG. 1 is a schematic flow diagram of the preparation of the present invention;

FIG. 2 is a schematic structural diagram of an indium column fabricated according to the present invention;

FIG. 3 is a graph showing a reflux temperature-time curve of a reflux shrinkage ball and a formic acid atmosphere condition;

in the drawings, the components represented by the respective reference numerals are listed below:

1. chip, 2 indium columns, 3, base metal, 4 and photoresist.

Detailed Description

The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.

As shown in fig. 1, the method for preparing an indium column of an infrared focal plane detector, which is designed by the invention, comprises the following steps:

1) gluing the chip 1: cleaning the surface of the chip 1, removing residual moisture, and then spin-coating a layer of photoresist 4 on the surface of the chip 1;

2) etching a mask: spacing circular photoetching holes on a mask plate according to the space size parameters of the indium columns 2, then covering the mask plate on the chip 1 coated with the glue in the step 1), carrying out first photoetching exposure, and then developing and fixing;

3) plating of base metal 3: plating a priming metal 3 on the surface of the chip 1 treated in the step 2) by adopting a vacuum coating mode, then cleaning the photoresist 4, and stripping redundant metal;

4) gluing again: spin-coating a layer of photoresist 4 on the surface of the chip 1 processed in the step 3) again;

5) and (5) mask etching again: spacing square photoetching holes on a mask plate according to the space size parameters of the indium columns 2, then covering the mask plate on the chip 1 coated with the glue in the step 4), carrying out secondary photoetching exposure, and then developing and fixing;

6) and (3) indium-plated columns 2: plating an indium film on the surface of the chip 1 processed in the step 5) by adopting a vacuum plating mode, then cleaning the photoresist 4, and stripping redundant indium to obtain the chip 1 with the indium columns 2;

7) and (3) ball backflow and shrinkage: and (3) reflowing the chip 1 with the indium columns 2 obtained in the step 6) in a vacuum reflow furnace to shrink balls so that the indium columns 2 are changed into an ellipsoid from a square shape, and thus obtaining the indium column 2 finished product.

Preferably, in the step 1) of the invention, the chip 1 is cleaned by respectively ultrasonically cleaning the chip for 3 minutes by sequentially using acetone and isopropanol, and then washing the chip by using deionized water.

Preferably, in the step 1) of the present invention, the surface of the chip 1 is spin-coated with the AZ5214 type photoresist 4, a spin coater is adopted to spin-coat a layer of thin glue layer, the rotation speed is 4000 rpm, the spin coating time is 30 seconds, and after the glue coating, the chip is placed and heated at a temperature of 95 ℃ for 90 seconds.

In the step 4), the surface of the chip 1 is spin-coated with the AZ4620 type photoresist 4, a spin coater is adopted to spin a medium-thickness glue layer, the number of revolutions is 1000 rpm, the spin coating time is 40 seconds, and the chip is placed after being coated with the glue and is heated for 180 seconds at the temperature of 100 ℃.

Preferably, in step 2) of the present invention, the diameter of the circular lithographic hole is 5 μm; in the step 5), the size of the square photoetching hole is 10 microns multiplied by 10 microns. The final indium columns 2 thus processed are small in size and can meet the requirement of compact layout.

Preferably, in the step 2) of the present invention, the exposure dose is controlled to be 58.2 to 60.5 mj per square centimeter, the exposed chip 1 is placed in a tetramethylammonium hydroxide developing solution with a concentration of 2.38% for development for 45 to 55 seconds, and then fixed with pure water for 30 to 40 seconds.

In the step 5), the exposure dose is controlled to be 396.9-405.7 joules per square centimeter, the exposed chip 1 is put into a tetramethylammonium hydroxide developing solution with the concentration of 2.38% for development for 100-120 seconds, and then pure water is used for fixing for 30-40 seconds.

Preferably, in the step 3) of the invention, the electron beam evaporation equipment is adopted, the priming metal 3 is plated in a vacuum deposition mode, the deposition rate is controlled to be 0.2 nanometer per second, and the working vacuum degree is controlled to be 5 × 10^-6Pascal. And the deposition of the priming metal 3 is sequentially deposited with a 50nm metal titanium adhesion layer, a 30nm metal platinum barrier layer and an 80nm metal gold wetting layer. Finally, the priming metal 3 with the diameter of 5 μm and the height of 160nm is obtained.

Preferably, in the step 4), the photoresist 4 is cleaned by soaking in acetone for 30-60 minutes and then cleaning with isopropanol. After the photoresist 4 is cleaned, the excess metal is peeled off along with the cleaning of the photoresist 4.

In the step 6), the photoresist 4 is cleaned by soaking in acetone for 90-120 minutes and then cleaning with isopropanol. After the photoresist 4 is cleaned, the excess indium is peeled off along with the cleaning of the photoresist 4.

Preferably, in step 6) of the present invention, the indium plating film is deposited by vacuum thermal evaporation to a thickness of 6 μm. After stripping off the excess indium, indium columns 2 of about 5 μm lateral dimension and about 6 μm height were obtained.

Preferably, in the step 7), the reflow ball shrinking is to heat the chip 1 with the indium columns 2 obtained in the step 6) to 80 ℃ in a vacuum reflow furnace, then to continuously heat the chip to 200 ℃ under the condition of introducing formic acid, and then to stop introducing the formic acid and to cool the chip to room temperature. As shown in fig. 3, a temperature-time curve and a formic acid atmosphere condition curve can be preset to control the process of reflowing the balls.

The structure of the indium column 2 finally manufactured by the invention is shown in figure 2.