阅读说明：本技术 一种rram器件及形成rram器件的方法 (RRAM device and method for forming RRAM device ) 是由 刘宇 沈鼎瀛 康赐俊 邱泰玮 王丹云 于 2020-04-29 设计创作，主要内容包括：本发明公开一种RRAM器件及形成RRAM器件的方法。RRAM器件包括：下金属互联层,被超低介电常数材料围绕；底部电极,设置在所述下金属互联层上方并被PEOX层围绕；金属蓄氧层,覆盖所述底部电极；绝缘层,设置在所述金属蓄氧层上方,其中,所述金属蓄氧层的两侧与所述绝缘层的两侧对齐；阻变层,设置在所述金属蓄氧层的侧边并覆盖所述金属蓄氧层的侧边,所述阻变层具有可变电阻；顶部电极,覆盖所述阻变层；上通孔,设置在所述顶部电极上方。(The invention discloses an RRAM device and a method for forming the same. The RRAM device includes: a lower metal interconnect layer surrounded by an ultra-low dielectric constant material; a bottom electrode disposed over the lower metal interconnect layer and surrounded by a PEOX layer; a metal oxygen storage layer covering the bottom electrode; an insulating layer disposed over the metal oxygen reservoir layer, wherein two sides of the metal oxygen reservoir layer are aligned with two sides of the insulating layer; the resistance change layer is arranged on the side edge of the metal oxygen storage layer and covers the side edge of the metal oxygen storage layer, and the resistance change layer is provided with a variable resistor; a top electrode covering the resistive layer; an upper via disposed above the top electrode.)

1. A RRAM device, comprising:

a lower metal interconnect layer surrounded by an ultra-low dielectric constant material;

a bottom electrode disposed over the lower metal interconnect layer and surrounded by a PEOX layer;

a metal oxygen storage layer covering the bottom electrode;

an insulating layer disposed over the metal oxygen reservoir layer, wherein two sides of the metal oxygen reservoir layer are aligned with two sides of the insulating layer;

the resistance change layer is arranged on the side edge of the metal oxygen storage layer and covers the side edge of the metal oxygen storage layer, and the resistance change layer is provided with a variable resistor;

a top electrode covering the resistive layer;

an upper via disposed above the top electrode.

2. The RRAM device of claim 1, wherein the metal oxygen reservoir layer is at least one of aluminum, tantalum nitride, titanium, and titanium nitride, and the insulating layer is at least one of silicon oxide (SiOx), silicon nitride, silicon oxynitride, or an ultra-low dielectric constant material.

3. The RRAM device of claim 1, wherein the material of the resistive layer is at least one of hafnium oxide (HfOx), aluminum oxide (AlOx), hafnium aluminum oxide (HfAlO), and tantalum oxide (TaOx).

4. A method of forming a RRAM device, comprising:

forming a lower metal interconnection layer on a semiconductor substrate, wherein the lower metal interconnection layer is surrounded by an ultra-low dielectric constant material;

forming a bottom electrode over the lower metal interconnect layer, wherein the bottom electrode is disposed over the lower metal interconnect layer and surrounded by a PEOX layer;

forming a metal oxygen storage layer and an insulating layer over the bottom electrode, wherein the insulating layer is disposed over the metal oxygen storage layer, and both sides of the metal oxygen storage layer are aligned with both sides of the insulating layer;

forming a resistance change layer on the side edge of the metal oxygen storage layer, wherein the resistance change layer covers the side edge of the metal oxygen storage layer and is provided with a variable resistor;

forming a top electrode, wherein the top electrode covers the resistive layer;

an upper via is formed over the top electrode.

5. The method of claim 4, wherein the step of forming the metal oxygen reservoir layer and the insulating layer comprises:

depositing a metal oxygen storage layer material and an insulating layer material above the bottom electrode by adopting a thin film deposition process;

the size and shape of the metal oxygen reservoir layer and the insulating layer are defined by a photolithography and etching process.

6. The method of claim 4, wherein the step of forming the top electrode comprises:

depositing a top electrode material by adopting a thin film process;

the top electrode material between RRAM cells is isolated using photolithography and etching processes.

7. The method of claim 4, wherein the step of forming the top electrode comprises:

depositing a top electrode material by adopting a thin film process;

photolithography and etching processes are used to isolate the top electrode material over the RRAM cell and form a 1TnR structure.

8. The method of claim 4, wherein the step of forming the top electrode comprises:

depositing a top electrode material by adopting a thin film process;

and etching the top electrode materials on the top of the insulating layer and on two sides of the metal oxygen storage layer by adopting an etching process.

9. The method of claim 4, wherein the step of forming the top electrode comprises:

depositing a top electrode material by adopting a thin film process;

polishing and grinding the top electrode material by adopting a CMP (chemical mechanical polishing) process;

the top electrode material between RRAM cells is isolated using photolithography and etching processes.

10. The method of claim 4, wherein the step of forming an upper via comprises: photolithography and etching processes are used to open two or more windows above the top electrode to form a 1TnR structure.

Technical Field

The invention relates to the technical field of semiconductors, in particular to a RRAM device and a method for forming the same.

Background

Many modern electronic devices include electronic memory configured to store data. The electronic memory may be volatile memory or non-volatile memory. Volatile memory stores data only when power is applied to it, while non-volatile memory retains data when power is removed from it. Resistive Random Access Memory (RRAM) is a promising candidate for next generation non-volatile memory technologies due to its simple structure and inclusion of CMOS logic compatible process technologies. The RRAM cell includes an electronic data storage layer with a variable resistance interposed between two electrodes disposed within an interconnect metallization layer.

After the traditional RRAM structure is deposited by adopting a thin film process, various material layers such as an electrode layer and an electronic data storage layer with variable resistance are etched to form the traditional RRAM structure, so that the edge of the electronic data storage layer with variable resistance is damaged, the RRAM structure is easy to form filaments at the edge, and the electrical property of the RRAM structure is further influenced. In addition, the existing RRAM structure is generally a 1T1R structure (one transistor, one resistive cell), and compared with a 1TnR structure (one transistor, multiple resistive cells), the 1T1R structure is not favorable for high-density integration, and has insufficient advantages in the advanced manufacturing process.

Disclosure of Invention

Embodiments of the present invention are directed to solving at least one of the above problems, and to inventively provide a RRAM device and a method of forming the RRAM device.

According to a first aspect of the embodiments of the present invention, there is provided a RRAM device, including: a lower metal interconnect layer surrounded by an ultra-low dielectric constant material; a bottom electrode disposed over the lower metal interconnect layer and surrounded by a PEOX layer; a metal oxygen storage layer covering the bottom electrode; an insulating layer disposed over the metal oxygen reservoir layer, wherein two sides of the metal oxygen reservoir layer are aligned with two sides of the insulating layer; the resistance change layer is arranged on the side edge of the metal oxygen storage layer and covers the side edge of the metal oxygen storage layer, and the resistance change layer is provided with a variable resistor; a top electrode covering the resistive layer; an upper via disposed above the top electrode.

Preferably, the material of the metal oxygen storage layer is at least one of aluminum, tantalum nitride, titanium and titanium nitride, and the material of the insulating layer is at least one of silicon oxide (SiOx), silicon nitride, silicon oxynitride or an ultra-low dielectric constant material.

Preferably, the material of the resistance change layer is at least one of hafnium oxide (HfOx), aluminum oxide (AlOx), hafnium aluminum oxide (HfAlO), and tantalum oxide (TaOx).

According to a second aspect of the embodiments of the present invention, there is provided a method of forming a RRAM device, including: forming a lower metal interconnection layer on a semiconductor substrate, wherein the lower metal interconnection layer is surrounded by an ultra-low dielectric constant material; forming a bottom electrode over the lower metal interconnect layer, wherein the bottom electrode is disposed over the lower metal interconnect layer and surrounded by a PEOX layer; forming a metal oxygen storage layer and an insulating layer over the bottom electrode, wherein the insulating layer is disposed over the metal oxygen storage layer, and both sides of the metal oxygen storage layer are aligned with both sides of the insulating layer; forming a resistance change layer on the side edge of the metal oxygen storage layer, wherein the resistance change layer covers the side edge of the metal oxygen storage layer and is provided with a variable resistor; forming a top electrode, wherein the top electrode covers the resistive layer; an upper via is formed over the top electrode.

Preferably, the step of forming the metal oxygen storage layer and the insulating layer includes: depositing a metal oxygen storage layer material and an insulating layer material above the bottom electrode by adopting a thin film deposition process; the size and shape of the metal oxygen reservoir layer and the insulating layer are defined by a photolithography and etching process.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; the top electrode material between RRAM cells is isolated using photolithography and etching processes.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; photolithography and etching processes are used to isolate the top electrode material over the RRAM cell and form a 1TnR structure.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; and etching the top electrode materials on the top of the insulating layer and on two sides of the metal oxygen storage layer by adopting an etching process.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; polishing and grinding the top electrode material by adopting a CMP (chemical mechanical polishing) process; the top electrode material between RRAM cells is isolated using photolithography and etching processes.

Preferably, the step of forming the upper via hole includes: photolithography and etching processes are used to open two or more windows above the top electrode to form a 1TnR structure.

Compared with the prior art, the resistive material (namely the transition metal oxide layer TMO) of the RRAM device provided by the scheme of the invention is not subjected to an etching process, so that the RRAM device has better electrical property. In addition, the RRAM device provided by the scheme of the invention can also adopt a 1TnR structure, so that the storage density is improved, and the structure has more advantages in advanced manufacturing processes.

Drawings

The above and other objects, features and advantages of exemplary embodiments of the present invention will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:

in the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

FIG. 1 illustrates an edge of a prior art RRAM device;

FIG. 2 illustrates a cross-sectional view of one embodiment of a RRAM device provided by the present invention;

FIG. 3 illustrates a cross-sectional view of another embodiment of a RRAM device provided by the present invention;

FIG. 4 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention;

FIG. 5 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention;

FIG. 6 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention;

FIG. 7 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention;

fig. 8 illustrates a flow diagram of a method of forming a RRAM device in accordance with an embodiment of the present invention.

Detailed Description

In order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In order to manufacture the RRAM device belonging to the related art, it is generally required to etch the edges of the TMO layer (transition metal oxide layer) and the electrode layer of the RRAM device. Fig. 1 illustrates an edge of a RRAM device in the prior art, and referring to fig. 1, the RRAM device includes an upper electrode, a dielectric layer, and a lower electrode, where the upper electrode, the dielectric layer, and the lower electrode form a RRAM cell, the middle dielectric layer is a TMO layer, and 10 is a portion of the TMO layer of the RRAM device damaged by an etching process. Since the edge of the TMO layer is damaged by the etching process, the RRAM device is more likely to form a filament at the edge of the device, and its electrical properties are unstable. In addition, referring to fig. 1, in the related art RRAM device, the upper electrode is located above the TMO layer, and this structure is not easy to form a 1TnR structure (one transistor, a plurality of resistive cells), and is not suitable for being used in an advanced process.

In view of the above problems, the present invention provides a RRAM device, and fig. 2 shows a cross-sectional view of an embodiment of the RRAM device provided in the present invention. As shown in fig. 2, it includes: a lower metal interconnection layer 101, a bottom electrode 106, a metal oxygen storage layer 103, an insulating layer 104, a resistance change layer 110, a top electrode 114, an upper via 102, an insulating material 100, and a PEOX layer 108. The lower metal interconnection layer 101 is surrounded by the insulating material 100, the bottom electrode 106 is located above the lower metal interconnection layer 101 and surrounded by the PEOX layer 108, the metal oxygen storage layer 103 covers the bottom electrode 106, the insulating layer 104 is located above the metal oxygen storage layer 103 and two sides of the insulating layer 104 are aligned with two sides of the metal oxygen storage layer 103, the resistance change layer 110 is located at a side of the metal oxygen storage layer 103 and covers a side of the metal oxygen storage layer 103, the top electrode 114 covers the metal oxygen storage layer 103, and the top electrode 114 covers the bottom electrodeThe resistive layer 110, the upper via 102 is located above the top electrode 114. The resistive layer 110 includes a material having a variable resistance configured to undergo a reversible phase change between a high resistance state and a low resistance state. In some embodiments, the resistance change layer may comprise a transition metal oxide comprising one or more of the following materials: hafnium oxide (HfO)_x) Aluminum oxide (AlOx), tantalum oxide (TaOx), or other composite compositions such as hafnium aluminum oxide (HfAlO). In some embodiments, the insulating material 100 may comprise silicon dioxide or an ultra-low dielectric constant material. In some embodiments, the insulating layer 104 comprises a dielectric material, such as silicon nitride (SiN)_x) Silicon dioxide, silicon carbide or other composite dielectric materials. The metal Oxygen storage Layer (Oxygen Ion reservoir) is also called a metal Oxygen trapping Layer (Oxygen trapping Layer) and is used for trapping Oxygen atoms of transition metal oxide in the resistance change Layer so as to form Oxygen vacancies in the resistance change Layer. In some embodiments, the material of the metal oxygen storage layer 103 may include at least one of aluminum, tantalum nitride, titanium, and titanium nitride. The embodiment shown in fig. 2 has a 1T1R structure, i.e., 1 transistor and 1 resistive switching element. Compared with the prior art, the resistance-change layer of the RRAM device is positioned on the side edge of the metal oxygen storage layer, and the resistance-change layer is not subjected to an etching process, so that the edge of the resistance-change layer cannot be damaged, and the electrical property of the RRAM device is better.

Fig. 3 illustrates a cross-sectional view of another embodiment of a RRAM device provided by the present invention. As shown in fig. 3, it includes: a lower metal interconnect layer 101, a bottom electrode 106, a metal oxygen storage layer 103, an insulating layer 104, resistance change layers 110A and 110B, top electrodes 114A and 114B, upper vias 102A and 102B, an insulating material 100, a PEOX layer 108. The lower metal interconnect layer 101 is surrounded by the insulating material 100, the bottom electrode 106 is located above the lower metal interconnect layer 101 and surrounded by the PEOX layer 108, the metal oxygen storage layer 103 covers the bottom electrode 106, the insulating layer 104 is located above the metal oxygen storage layer 103 and both sides of the insulating layer 104 are aligned with both sides of the metal oxygen storage layer 103, the resistance change layers 110A and 110B are located at sides of the metal oxygen storage layer 103 and cover sides of the metal oxygen storage layer 103, the top electrode 114A covers the resistance change layer 110A, the top electrode 114B covers the resistance change layer 114B, the upper via 102A is located above the top electrode 114A, and the upper via 102B is located above the top electrode 114B. The resistive layers 110A and 110B include a material having a variable resistance configured to undergo a reversible phase change between a high resistance state and a low resistance state. In some embodiments, the resistance change layer may comprise a transition metal oxide comprising one or more of the following materials: hafnium oxide (HfOx), aluminum oxide (AlOx), tantalum oxide (TaOx), or other composite compositions, such as hafnium aluminum oxide (HfAlO). In some embodiments, the insulating material 100 may comprise silicon dioxide or an ultra-low dielectric constant material. In some embodiments, insulating layer 104 comprises a dielectric material, such as silicon nitride (SiNx), silicon dioxide, silicon carbide, or other composite dielectric materials. The metal Oxygen storage Layer (Oxygen ion reservoir) is also called a metal Oxygen trapping Layer (Oxygen trapping Layer) and is used for trapping Oxygen atoms of transition metal oxide in the resistance change Layer so as to form Oxygen vacancies in the resistance change Layer. In some embodiments, the material of the metal oxygen storage layer 103 may include at least one of aluminum, tantalum nitride, titanium, and titanium nitride. The embodiment shown in fig. 3 has a structure of 1TnR, that is, 1 transistor and 2 resistive cells, where 102A, 114A, and 110A and the bottom electrode 106 form one resistive cell, 102B, 114B, and 110B and the bottom electrode 106 form another resistive cell, and the two resistive cells share the bottom electrode 106. Compared with the prior art, the resistance-change layer of the RRAM device is positioned on the side edge of the metal oxygen storage layer, and the resistance-change layer is not subjected to an etching process, so that the edge of the resistance-change layer cannot be damaged, and the electrical property of the RRAM device is better. In addition, the RRAM device provided by the present embodiment adopts a 1TnR structure, which improves the storage density and is more advantageous in advanced processes.

Fig. 4 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention. As shown in fig. 4, it includes: a lower metal interconnection layer 101, a bottom electrode 106, a metal oxygen storage layer 103, an insulating layer 104, a resistance change layer 110, a top electrode 114, an upper via 102, an insulating material 100, and a PEOX layer 108. The lower metal interconnection layer 101 is surrounded by the insulating material 100, the bottom electrode 106 is located above the lower metal interconnection layer 101 and surrounded by the PEOX layer 108, the metal oxygen storage layer 103 covers the bottom electrode 106, and the insulating layer 104 is located above the metal oxygen storage layer 103 and is insulated from the metal oxygen storage layer 103Two sides of the insulating layer 104 are aligned with two sides of the metal oxygen storage layer 103, the resistive layer 110 is located at the side of the metal oxygen storage layer 103 and covers the side of the metal oxygen storage layer 103, the top electrode 114 covers the resistive layer 110, and the upper via 102 is located above the top electrode 114. The resistive layer 110 includes a material having a variable resistance configured to undergo a reversible phase change between a high resistance state and a low resistance state. In some embodiments, the resistance change layer may comprise a transition metal oxide comprising one or more of the following materials: hafnium oxide (HfO)_x) Aluminum oxide (AlOx), tantalum oxide (TaOx), or other composite compositions such as hafnium aluminum oxide (HfAlO). In some embodiments, the insulating material 100 may comprise silicon dioxide or an ultra-low dielectric constant material. In some embodiments, the insulating layer 104 comprises a dielectric material, such as silicon nitride (SiN)_x) Silicon dioxide, silicon carbide or other composite dielectric materials. The metal Oxygen storage Layer (Oxygen Ion reservoir) is also called a metal Oxygen trapping Layer (Oxygen trapping Layer) and is used for trapping Oxygen atoms of transition metal oxide in the resistance change Layer so as to form Oxygen vacancies in the resistance change Layer. In some embodiments, the material of the metal oxygen storage layer 103 may include at least one of aluminum, tantalum nitride, titanium, and titanium nitride. The embodiment shown in fig. 4 has a 1T1R structure, i.e., 1 transistor and 1 resistive switching element. Compared with the prior art, the resistance-change layer of the RRAM device is positioned on the side edge of the metal oxygen storage layer, and the resistance-change layer is not subjected to an etching process, so that the edge of the resistance-change layer cannot be damaged, and the electrical property of the RRAM device is better.

Fig. 5 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention. As shown in fig. 5, it includes: a lower metal interconnect layer 101, a bottom electrode 106, a metal oxygen storage layer 103, an insulating layer 104, resistance change layers 110A and 110B, top electrodes 114A and 114B, upper vias 102A and 102B, an insulating material 100, a PEOX layer 108. The lower metal interconnect layer 101 is surrounded by the insulating material 100, the bottom electrode 106 is located above the lower metal interconnect layer 101 and surrounded by the PEOX layer 108, the metal oxygen storage layer 103 covers the bottom electrode 106, the insulating layer 104 is located above the metal oxygen storage layer 103 and both sides of the insulating layer 104 are aligned with both sides of the metal oxygen storage layer 103, the resistance change layers 110A and 110B are located at sides of the metal oxygen storage layer 103 and cover sides of the metal oxygen storage layer 103, the top electrode 114A covers the resistance change layer 110A, the top electrode 114B covers the resistance change layer 114B, the upper via 102A is located above the top electrode 114A, and the upper via 102B is located above the top electrode 114B. The resistive layers 110A and 110B include a material having a variable resistance configured to undergo a reversible phase change between a high resistance state and a low resistance state. In some embodiments, the resistance change layer may comprise a transition metal oxide comprising one or more of the following materials: hafnium oxide (HfOx), aluminum oxide (AlOx), tantalum oxide (TaOx), or other composite compositions, such as hafnium aluminum oxide (HfAlO). In some embodiments, the insulating material 100 may comprise silicon dioxide or an ultra-low dielectric constant material. In some embodiments, insulating layer 104 comprises a dielectric material, such as silicon nitride (SiNx), silicon dioxide, silicon carbide, or other composite dielectric materials. The metal Oxygen storage Layer (Oxygen ion reservoir) is also called a metal Oxygen trapping Layer (Oxygen trapping Layer) and is used for trapping Oxygen atoms of transition metal oxide in the resistance change Layer so as to form Oxygen vacancies in the resistance change Layer. In some embodiments, the material of the metal oxygen storage layer 103 may include at least one of aluminum, tantalum nitride, titanium, and titanium nitride. The embodiment shown in fig. 5 has a structure of 1TnR, that is, 1 transistor and 2 resistive cells, where 102A, 114A, and 110A and the bottom electrode 106 form one resistive cell, 102B, 114B, and 110B and the bottom electrode 106 form another resistive cell, and the two resistive cells share the bottom electrode 106. Compared with the prior art, the resistance-change layer of the RRAM device is positioned on the side edge of the metal oxygen storage layer, and the resistance-change layer is not subjected to an etching process, so that the edge of the resistance-change layer cannot be damaged, and the electrical property of the RRAM device is better. In addition, the RRAM device provided by the present embodiment adopts a 1TnR structure, which improves the storage density and is more advantageous in advanced processes.

Fig. 6 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention. As shown in fig. 6, it includes: a lower metal interconnection layer 101, a bottom electrode 106, a metal oxygen storage layer 103, an insulating layer 104, a resistance change layer 110, a top electrode 114, an upper via 102, an insulating material 100, and a PEOX layer 108. The lower metal interconnect layer 101 is surrounded by an insulating material 100,the bottom electrode 106 is located above the lower metal interconnection layer 101 and surrounded by the PEOX layer 108, the metal oxygen storage layer 103 covers the bottom electrode 106, the insulating layer 104 is located above the metal oxygen storage layer 103 and both sides of the insulating layer 104 are aligned with both sides of the metal oxygen storage layer 103, the resistance change layer 110 is located at the side of the metal oxygen storage layer 103 and covers the side of the metal oxygen storage layer 103, the top electrode 114 covers the resistance change layer 110, and the upper via 102 is located above the top electrode 114. The resistive layer 110 includes a material having a variable resistance configured to undergo a reversible phase change between a high resistance state and a low resistance state. In some embodiments, the resistance change layer may comprise a transition metal oxide comprising one or more of the following materials: hafnium oxide (HfO)_x) Aluminum oxide (AlOx), tantalum oxide (TaOx), or other composite compositions such as hafnium aluminum oxide (HfAlO). In some embodiments, the insulating material 100 may comprise silicon dioxide or an ultra-low dielectric constant material. In some embodiments, the insulating layer 104 comprises a dielectric material, such as silicon nitride (SiN)_x) Silicon dioxide, silicon carbide or other composite dielectric materials. The metal Oxygen storage Layer (Oxygen Ion reservoir) is also called a metal Oxygen trapping Layer (Oxygen trapping Layer) and is used for trapping Oxygen atoms of transition metal oxide in the resistance change Layer so as to form Oxygen vacancies in the resistance change Layer. In some embodiments, the material of the metal oxygen storage layer 103 may include at least one of aluminum, tantalum nitride, titanium, and titanium nitride. Fig. 6 shows an example of a 1T1R structure, i.e., 1 transistor and 1 resistive switching element. Compared with the prior art, the resistance-change layer of the RRAM device is positioned on the side edge of the metal oxygen storage layer, and the resistance-change layer is not subjected to an etching process, so that the edge of the resistance-change layer cannot be damaged, and the electrical property of the RRAM device is better.

Fig. 7 illustrates a cross-sectional view of yet another embodiment of a RRAM device provided by the present invention. As shown in fig. 7, it includes: a lower metal interconnect layer 101, a bottom electrode 106, a metal oxygen storage layer 103, an insulating layer 104, resistance change layers 110A and 110B, top electrodes 114A and 114B, upper vias 102A and 102B, an insulating material 100, a PEOX layer 108. The lower metal interconnection layer 101 is surrounded by the insulating material 100, the bottom electrode 106 is located above the lower metal interconnection layer 101 and is surrounded by the PEOX layer 108, and the metal oxygen storage layer 103 covers the bottomAn electrode 106, an insulating layer 104 over the metal oxygen storage layer 103 and both sides of the insulating layer 104 aligned with both sides of the metal oxygen storage layer 103, resistive layers 110A and 110B respectively on both sides of the metal oxygen storage layer 103 and respectively covering both sides of the metal oxygen storage layer 103, top electrodes 114A and 114B respectively covering the resistive layers 110A and 110B, and upper via holes 102A and 102B respectively over the top electrodes 114A and 114B. The resistive layers 110A and 110B include a material having a variable resistance configured to undergo a reversible phase change between a high resistance state and a low resistance state. In some embodiments, the resistance change layer may comprise a transition metal oxide comprising one or more of the following materials: hafnium oxide (HfO)_x) Aluminum oxide (AlOx), tantalum oxide (TaOx), or other composite compositions such as hafnium aluminum oxide (HfAlO). In some embodiments, the insulating material 100 may comprise silicon dioxide or an ultra-low dielectric constant material. In some embodiments, the insulating layer 104 comprises a dielectric material, such as silicon nitride (SiN)_x) Silicon dioxide, silicon carbide or other composite dielectric materials. The metal Oxygen storage Layer (Oxygen Ion reservoir) is also called a metal Oxygen trapping Layer (Oxygen trapping Layer) and is used for trapping Oxygen atoms of transition metal oxide in the resistance change Layer so as to form Oxygen vacancies in the resistance change Layer. In some embodiments, the material of the metal oxygen storage layer 103 may include at least one of aluminum, tantalum nitride, titanium, and titanium nitride. The embodiment shown in fig. 7 has a 1TnR structure, i.e. 1 transistor and 2 resistive switching cells. The resistance change units 102A, 114A and 110A and the bottom electrode 106 form one resistance change unit, the resistance change units 102B, 114B and 110B and the bottom electrode 106 form another resistance change unit, and the two resistance change units share the bottom electrode 106. Compared with the prior art, the resistance-change layer of the RRAM device is positioned on the side edge of the metal oxygen storage layer, and the resistance-change layer is not subjected to an etching process, so that the edge of the resistance-change layer cannot be damaged, and the electrical property of the RRAM device is better. In addition, the RRAM device provided by the present embodiment adopts a 1TnR structure, which improves the storage density and is more advantageous in advanced processes.

An embodiment of the present invention further provides a method for forming an RRAM device, as shown in fig. 8, including: forming a lower metal interconnection layer on a semiconductor substrate, wherein the lower metal interconnection layer is surrounded by an ultra-low dielectric constant material; forming a bottom electrode over the lower metal interconnect layer, wherein the bottom electrode is disposed over the lower metal interconnect layer and surrounded by a PEOX layer; forming a metal oxygen storage layer and an insulating layer over the bottom electrode, wherein the insulating layer is disposed over the metal oxygen storage layer, and both sides of the metal oxygen storage layer are aligned with both sides of the insulating layer; forming a resistance change layer on the side edge of the metal oxygen storage layer, wherein the resistance change layer covers the side edge of the metal oxygen storage layer and is provided with a variable resistor; forming a top electrode, wherein the top electrode covers the resistive layer; an upper via is formed over the top electrode.

Preferably, the step of forming the metal oxygen storage layer and the insulating layer includes: depositing a metal oxygen storage layer material and an insulating layer material above the bottom electrode by adopting a thin film deposition process; the size and shape of the metal oxygen reservoir layer and the insulating layer are defined by a photolithography and etching process.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; the top electrode material between RRAM cells is isolated using photolithography and etching processes.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; photolithography and etching processes are used to isolate the top electrode material over the RRAM cell and form a 1TnR structure.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; and etching the top electrode materials on the top of the insulating layer and on two sides of the metal oxygen storage layer by adopting an etching process.

Preferably, the step of forming the top electrode comprises: depositing a top electrode material by adopting a thin film process; polishing and grinding the top electrode material by adopting a CMP (chemical mechanical polishing) process; the top electrode material between RRAM cells is isolated using photolithography and etching processes.

Preferably, the step of forming the upper via hole includes: photolithography and etching processes are used to open two or more windows above the top electrode to form a 1TnR structure.

Here, it should be noted that: the above description of the embodiments of the method for forming the RRAM device is similar to the description of the embodiments of the resistive random access memory RRAM device shown in fig. 2, fig. 3, fig. 4, fig. 5, and fig. 6, and has similar beneficial effects to the embodiments of the resistive random access memory RRAM device shown in fig. 2, fig. 3, fig. 4, fig. 5, and fig. 6, and therefore, no further description is given.

The previous description is intended to enable any person skilled in the art to make and use the disclosure, and is provided in the context of a particular application and its requirements. Furthermore, the foregoing descriptions of embodiments of the present disclosure are presented only for purposes of illustration and description. They are not intended to be exhaustive or to limit the disclosure to the forms disclosed. Thus, many modifications and variations will be apparent to practitioners skilled in the art, and the generic principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Furthermore, the discussion of the preceding embodiments is not intended to limit the present disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.