阅读说明：本技术 电压检测电路 (Voltage detection circuit ) 是由 羽谷尚久 后藤阳介 犬饲文人 森悟朗 于 2018-08-28 设计创作，主要内容包括：电压检测电路测定将多个单体串联连接而构成的电池组的多个单体电压。电压检测电路具备：多个输入端子,将经由多个电压检测线分别与多个单体的各电极连接；多路转换器,将多个串联单体作为群,周期性地选择并输出群内的多个单体的电压；AD转换器,进行来自多路转换器的输出电压的AD转换而输出输出电压的数字数据；以及控制电路,控制多路转换器的选择定时以及AD转换的定时,控制电路通过切换多路转换器选择各单体的时间间隔来使AD转换的周期变化。(The voltage detection circuit measures a plurality of cell voltages of a battery pack configured by connecting a plurality of cells in series. The voltage detection circuit includes: a plurality of input terminals connected to the respective electrodes of the plurality of cells via the plurality of voltage detection lines; a multiplexer that periodically selects and outputs voltages of the plurality of cells in the group, using the plurality of cells connected in series as the group; an AD converter for performing AD conversion of the output voltage from the multiplexer to output digital data of the output voltage; and a control circuit for controlling the selection timing of the multiplexer and the timing of the AD conversion, wherein the control circuit changes the period of the AD conversion by switching the time interval at which the multiplexer selects each cell.)

1. A voltage detection circuit for measuring a plurality of cell voltages of a battery pack configured by connecting a plurality of cells in series, the voltage detection circuit comprising:

a plurality of input terminals connected to the respective electrodes of the plurality of cells via a plurality of voltage detection lines;

a multiplexer that periodically selects and outputs voltages of the plurality of cells in the group, using the plurality of cells connected in series as the group;

an AD converter for AD-converting an output voltage from the multiplexer and outputting digital data of the output voltage; and

a control circuit that controls a selection timing of the multiplexer and a timing of the AD conversion,

the control circuit switches the multiplexer to select the time interval of each cell, thereby changing the period of AD conversion.

2. The voltage detection circuit according to claim 1, wherein the control circuit repeats AD conversion of the cells in a predetermined order within the group, and changes the selection time interval by switching the conversion start cells within the group.

3. The voltage detection circuit of claim 2, wherein the conversion start cell is selected based on a random number from a random number generator that generates a random number.

4. The voltage detection circuit according to claim 3, further comprising a remainder calculator that determines and outputs a start cell number by performing a remainder calculation on a random number that is an output value from the random number generator.

5. The voltage detection circuit according to any one of claims 2 to 4,

in the case where the conversion start cell is not the lowest cell in the group of multiplexers, the multiplexers,

(A) the selection of the conversion starting monomer is carried out after the selection of the intermediate monomer via at least 1 intermediate monomer, or,

(B) selecting a conversion starting monomer without passing through the intermediate monomer,

after the precharge operation, the conversion target cell is selected.

6. The voltage detection circuit according to any one of claims 1 to 5,

in the case where the cells to be subjected to AD conversion are separated by 2 or more cells, the multiplexer,

(A) first, after selecting at least 1 intermediate monomer which is not a next conversion target monomer, the intermediate monomer is selected, and then the next conversion monomer is selected, or,

(B) the next conversion monomer is selected itself without passing through the intermediate monomer,

after the precharge operation, the conversion target cell is selected.

7. The voltage detection circuit according to claim 5 or 6, wherein the precharge operation is performed so as to select an unused input terminal of the multiplexer via the input terminal.

8. The voltage detection circuit according to any one of claims 1 to 7,

has a function of AD-converting a monitor voltage other than the cell voltage,

the control circuit varies the period of the AD conversion by switching the time interval at which the multiplexer selects the monitor voltage.

9. The voltage detection circuit according to claim 8, wherein the AD conversion of the monitor voltage is performed in a precharge operation.

10. A voltage measuring device including a voltage detection circuit and a device controller, the voltage measuring device measuring a plurality of cell voltages of a battery pack configured by connecting a plurality of cells in series,

the voltage detection circuit includes:

a plurality of input terminals connected to the respective electrodes of the plurality of cells via a plurality of voltage detection lines;

a multiplexer that periodically selects and outputs voltages of the plurality of cells in the group, using the plurality of cells connected in series as the group;

an AD converter for performing AD conversion of an output voltage of the multiplexer and outputting digital data of the output voltage; and

a control circuit that controls a selection timing of the multiplexer and a timing of the AD conversion,

the device controller receives and stores digital data of the output voltage,

the control circuit switches the multiplexer to select the time interval of each cell, thereby changing the period of AD conversion.

11. A battery pack system including a voltage detection circuit, a device controller, and a battery pack, the battery pack system measuring a plurality of cell voltages of the battery pack configured by connecting a plurality of cells in series,

the voltage detection circuit includes:

a plurality of input terminals connected to the respective electrodes of the plurality of cells via a plurality of voltage detection lines;

a multiplexer that periodically selects and outputs voltages of the plurality of cells in the group, using the plurality of cells connected in series as the group;

an AD converter for performing AD conversion of an output voltage of the multiplexer and outputting digital data of the output voltage; and

a control circuit that controls a selection timing of the multiplexer and a timing of the AD conversion,

the device controller receives and stores digital data of the output voltage,

the control circuit switches the multiplexer to select the time interval of each cell, thereby changing the period of AD conversion.

Technical Field

The invention relates to a voltage detection circuit, a voltage measurement device, a battery pack system, and a voltage measurement method.

Background

Fig. 1 is a block diagram showing a configuration of a battery pack system 100 of a conventional example. Fig. 2 is a block diagram showing the configuration of the voltage detection circuit 10A of fig. 1, and fig. 3 is a diagram showing an AD conversion sequence executed by the voltage detection circuit 10A of fig. 2.

In fig. 1, a voltage detection circuit 10A is a circuit that is mounted on a battery pack system 100 and measures a plurality of cell voltages of a plurality of battery cells (hereinafter referred to as cells) 1 to 5 constituting a battery pack 101. the battery pack 101 is constituted by connecting the plurality of cells 1 to 5 in series, the cell voltages of the respective electrodes of the plurality of cells 1 to 5 are input to the voltage detection circuit 10A via voltage detection lines L G, L0 to L5 and a filter circuit 102, and the respective cell voltages converted into digital data by the voltage detection circuit 10A are transmitted to an MCU (Micro Control Unit) 103 as a device controller, and here, the filter circuit 102 includes a plurality of resistors R0 and capacitors C10 to C15, and is constituted by, for example, 6 RC type low pass filters, and CG, C0 to C5, CS0 to CS5 are terminals for connecting the respective circuits.

In fig. 2, the voltage detection circuit 10A includes a multiplexer (hereinafter, also referred to as MUX)11, an AD converter (ADC)12, a decoder 13, a register 14, an interface (I/F)15, and a control circuit 20 having a sequencer 21. Here, the MUX11 includes switches SW1 to SW 52.

As shown in fig. 3, the voltage detection circuit 10A of the conventional example selectively operates the MUX11 in order from the lowermost cell in the group at a fixed cycle, thereby sequentially AD-converting the cell voltages. In the example of the sequence of fig. 3, the operation is shown in which after the output voltage of the MUX11 is initialized to the potential of the lowermost cell, the MUX11 selects and AD-converts the cells in the order of cell 1 → 2 → 3 → 4 → 5. The "reset" refers to an operation of initializing the output of the MUX11 to a predetermined potential (ground potential GND or the like) before starting the cell measurement. The voltage measurement of the monomer n is performed by measuring the voltage between terminals CSn-CSn-1. For example, in the case of the voltage of cell 1, the voltage between terminals CS1-CS0 was measured.

Disclosure of Invention

Problems to be solved by the invention

As in the conventional example, in the configuration that operates at a fixed cycle, when interference noise at a frequency equal to or higher than 1/2, which is a frequency corresponding to the fixed cycle, is superimposed on the cell input terminal, the interference noise is folded back at a low frequency (called aliasing) at the time of AD conversion, and the voltage measurement accuracy is deteriorated.

Fig. 6A shows attenuation frequency characteristics of input noise in the case where the fixed period is 2kHz in the conventional example. As is clear from FIG. 6A, the attenuation characteristics deteriorate at 1kHz or more.

In a battery pack configured by connecting a plurality of cells in series, the periodicity of AD conversion is eliminated by changing the selection order of MUX of the cells, thereby reducing aliasing.

Means for solving the problems

The voltage detection circuit of the 1 mode of the invention,

the disclosed battery pack is characterized in that it measures a plurality of cell voltages of a battery pack configured by connecting a plurality of cells in series, and is provided with:

a plurality of input terminals connected to the respective electrodes of the plurality of cells via a plurality of voltage detection lines;

a multiplexer that periodically selects and outputs voltages of the plurality of cells in the group, using the plurality of cells connected in series as the group;

an AD converter for AD-converting an output voltage from the multiplexer and outputting digital data of the output voltage; and

a control circuit that controls a selection timing of the multiplexer and a timing of the AD conversion,

the control circuit switches the multiplexer to select the time interval of each cell, thereby changing the period of AD conversion.

Effects of the invention

According to the voltage detection circuit of the present invention, in the battery pack configured by connecting a plurality of cells in series, the periodicity of AD conversion is eliminated by changing the selection order of the MUXs of the cells, and aliasing can be reduced.

Drawings

Fig. 1 is a block diagram showing a configuration of a battery pack system 100 of a conventional example.

Fig. 2 is a block diagram showing the configuration of the voltage detection circuit 10A of fig. 1.

Fig. 3 is a diagram showing an AD conversion sequence performed by the voltage detection circuit of fig. 2.

Fig. 4A is a block diagram showing a configuration example of a battery pack system 100P according to embodiment 1.

Fig. 4B is a block diagram showing a configuration example of the voltage detection circuit 10B of fig. 4A.

Fig. 5 is a diagram showing an example of an AD conversion sequence executed by the voltage detection circuit 10B of fig. 4B.

Fig. 6A is a spectrum diagram showing the attenuation characteristics of the input noise of the conventional example.

Fig. 6B is a spectrum diagram showing the attenuation characteristics of the input noise according to the embodiment.

Fig. 7A is a graph showing the response characteristics of the output voltage of the multiplexer 11 in the voltage detection circuit 10B of embodiment 2, and the response characteristics at the time slots 2 and 3 of the 1 st cycle when the potential difference is 1 unit.

Fig. 7B is a graph showing the response characteristics of the output voltage of the multiplexer 11 in the voltage detection circuit 10B of embodiment 2, and the response characteristics at time slots 1 and 2 of the 3 rd cycle when the potential difference is 5 monomers.

Fig. 8 is a block diagram for explaining the multiplexer 11 and the like for inputting current in the voltage detection circuit 10B of embodiment 2.

FIG. 9 is a diagram showing an example of the AD conversion sequence according to embodiment 2-1.

Fig. 10 is a diagram showing an example of the AD conversion sequence according to embodiment 2-2.

Fig. 11 is a diagram showing an example of the AD conversion sequence according to embodiment 2-3.

Fig. 12 is a diagram showing an example of AD conversion sequences according to embodiments 2 to 4.

Fig. 13 is a diagram showing an example of AD conversion sequences according to embodiments 2 to 5.

Fig. 14 is a diagram showing an example of AD conversion sequences according to embodiments 2 to 6.

FIG. 15 is a diagram showing an example of the AD conversion sequence according to embodiment 3-1.

FIG. 16 is a diagram showing an example of the AD conversion sequence according to embodiment 3-2.

Fig. 17 is a diagram showing an example of the AD conversion sequence according to embodiment 3-3.

Fig. 18 is a diagram showing an example of AD conversion sequences according to embodiments 3 to 4.

Fig. 19 is a block diagram showing a configuration example of a battery pack system 100C according to embodiment 4.

Fig. 20 is a diagram showing an example of the AD conversion sequence according to embodiment 4.

Fig. 21 is a block diagram showing a configuration example of a voltage detection circuit 10D of a conventional example.

Fig. 22 is a diagram showing an AD conversion sequence of the conventional example.

Fig. 23 is a block diagram showing a configuration example of a voltage detection circuit 10E according to embodiment 5.

FIG. 24A is a diagram showing an example of the AD conversion sequence of embodiment 5-1, and is a diagram showing a case of embodiment 5-1-1 in a case where the monitor voltage is measured.

FIG. 24B is a diagram showing an example of the AD conversion sequence of embodiment 5-1, and is a diagram showing a case of embodiment 5-1-2 in a case where the monitor voltage is measured.

FIG. 24C is a diagram showing an example of the AD conversion sequence of embodiment 5-1, and is a diagram showing a case of embodiment 5-1-3 in a case where the monitor voltage is measured.

FIG. 25 is a diagram showing an example of the AD conversion sequence according to embodiment 5-2.

Fig. 26 is a block diagram showing a configuration example of the conversion start cell determining circuit 22A according to modification 1.

Fig. 27 is a table showing the relationship between the remainder value and the start cell number of the remainder calculator 202 in fig. 26.

Fig. 28A is a block diagram showing an example of mounting the digital filter according to modification 2, and is a block diagram when the digital filter is mounted on a voltage detection circuit.

Fig. 28B is a block diagram showing an example of mounting the digital filter according to modification 2, and is a block diagram when the digital filter is mounted on the MCU.

Fig. 29 is a block diagram showing a configuration example of a battery pack system 100G according to modification 3.

Fig. 30 is a block diagram showing a configuration example of a battery pack system 100H according to modification 4.

Fig. 31A is a block diagram showing a configuration example of a direct connection method as an example of a method of a communication line between voltage detection circuits in modification 5.

Fig. 31B is a block diagram showing a configuration example of a transformer system as an example of a communication line between voltage detection circuits in modification 5.

Fig. 31C is a block diagram showing a configuration example of a capacitive system as an example of a system of a communication line between voltage detection circuits in modification 5.

Detailed Description

Hereinafter, embodiments of the present invention will be described. In the drawings, the same or similar components are denoted by the same reference numerals, and detailed description thereof is omitted.