Waveform generator based on SoC FPGA

文档序号:1326376 发布日期:2020-07-14 浏览:26次 中文

阅读说明:本技术 一种基于SoC FPGA的波形发生器 (Waveform generator based on SoC FPGA ) 是由 梅凯路 蔡晔敏 何志苠 顾宇飞 于 2020-03-31 设计创作,主要内容包括:本发明涉及一种基于SoC FPGA的波形发生器,包括用于稳压的电源模块、用于产生时钟信号的晶振模块、用于输出波形地址的寻址模块、用于输出波形数据的波形存储模块、用于输出模拟信号的数模转换器和用于滤除高频信号的滤波模块,其中,晶振模块分别与寻址模块、波形存储模块相连接,寻址模块还与SoC FPGA的复位接口相连接,波形存储模块的输入端与寻址模块相连接,波形存储模块的输出端依次连接至数模转换器和滤波模块。与现有技术相比,本发明基于SoC FPGA控制芯片,通过设计其内部和外围连接模块,能够适用于高速数据处理场合,且能模拟输出稳定、分辨率高的不同波形。(The invention relates to a waveform generator based on SoC FPGA, which comprises a power supply module for stabilizing voltage, a crystal oscillator module for generating clock signals, an addressing module for outputting waveform addresses, a waveform storage module for outputting waveform data, a digital-to-analog converter for outputting analog signals and a filtering module for filtering high-frequency signals, wherein the crystal oscillator module is respectively connected with the addressing module and the waveform storage module, the addressing module is also connected with a reset interface of the SoC FPGA, the input end of the waveform storage module is connected with the addressing module, and the output end of the waveform storage module is sequentially connected with the digital-to-analog converter and the filtering module. Compared with the prior art, the invention is based on the SoC FPGA control chip, can be suitable for high-speed data processing occasions by designing the internal and peripheral connection modules, and can simulate different waveforms with stable output and high resolution.)

1. The utility model provides a waveform generator based on SoC FPGA, characterized in that, including power module (2) for the steady voltage, be used for producing clock signal's crystal oscillator module (3), addressing module (4) for output waveform address, waveform storage module (5) for output waveform data, digital analog converter (6) for output analog signal and filter module (7) for filtering high frequency signal, crystal oscillator module (3) are connected with addressing module (4), waveform storage module (5) respectively, addressing module (4) still are connected with SoCFPGA's reset interface, the input of waveform storage module (5) is connected with addressing module (4), the output of waveform storage module (5) is connected to digital analog converter (6) and filter module (7) in proper order.

2. The waveform generator based on SoC FPGA of claim 1, characterized in that the external input of the power supply module (2) is 5V, the power supply module (2) adopts L M1085 voltage stabilization chip to step down and stabilize the 5V of the external input, and the output of the L M1085 voltage stabilization chip is connected to all IO interfaces of SoC FPGA.

3. The waveform generator based on SoC FPGA of claim 1, characterized in that the crystal oscillator module (3) adopts a system clock with 50MHz of working frequency.

4. The waveform generator of claim 1, wherein the digital-to-analog converter (6) has more than 8 bits and a conversion time of less than 1 μ s.

5. The waveform generator based on SoC FPGA of claim 4, characterized in that, the digital-to-analog converter (6) is a DAC900 digital-to-analog conversion chip.

6. The waveform generator based on SoC FPGA of claim 1, characterized in that, the filtering module (7) adopts RC low-pass filter, wherein, the resistance R is 10k Ω and the capacitance C is 0.1 μ F.

7. The waveform generator based on the SoC FPGA of claim 1, wherein the addressing module (4) comprises a comparator, a register and an address output unit, the reset interfaces of the crystal oscillator module (3) and the SoC FPGA are respectively connected to the address output unit, and the output end of the address output unit sequentially passes through the register and the comparator and returns to the address output unit.

8. The waveform generator based on SoC FPGA of claim 1, wherein the waveform storage module (5) stores therein a plurality of waveform data in the mif file format, and the waveform data is specifically a waveform amplitude corresponding to a waveform address.

Technical Field

The invention relates to the technical field of communication and virtual instruments, in particular to a waveform generator based on an SoC FPGA.

Background

The current waveform generators are mainly divided into dedicated waveform generators and general waveform generators, wherein the dedicated waveform generators are developed according to different measurement requirements of specific occasions and have the characteristic of strong purposiveness, and the general waveform generators can be suitable for most occasions. The two waveform generators are applied to the technical fields of seismic wave measurement, equipment detection, wireless communication, aerospace equipment and the like.

In the research and design of a waveform generator, a Direct Analog Frequency Synthesis (DAFS) technology is adopted in the early stage, a reference frequency source generates a series of harmonics through a harmonic generator, then a large amount of discrete frequencies are generated through frequency division, frequency mixing, filtering and other processing, the DAFS easily generates excessive spurious components and has a large equipment amount, which are also the main defects of the frequency Synthesizer, the currently used Phase-locked loop frequency Synthesis (Phase L ocked L oop, P LL) technology is also called indirect frequency Synthesis technology, which has the advantages of high frequency resolution, short frequency conversion time, continuous signal Phase during conversion and high frequency stability of a frequency modulation circuit, but has the problem of long locking time, so the technology is not suitable for occasions with a quick locking function, and the currently used Direct digital frequency Synthesis (DDS) technology is also universal, so that a required waveform is directly synthesized from a Phase angle, but the design of a principle of the technology is complex, a plurality of wave form Synthesis principles are required, the design is convenient design, and the waveform Synthesis link is not easy to be high, and the cost is also high.

Disclosure of Invention

The invention aims to overcome the defects in the prior art and provide a waveform generator based on SoC FPGA, which is based on a SoC FPGA control chip, generates variable waveforms by designing internal and peripheral connection modules, can ensure the stability and resolution of the waveforms, and can be suitable for high-speed data processing occasions.

The purpose of the invention can be realized by the following technical scheme: a waveform generator based on SoC FPGA comprises a power supply module for stabilizing voltage, a crystal oscillator module for generating clock signals, an addressing module for outputting waveform addresses, a waveform storage module for outputting waveform data, a digital-to-analog converter for outputting analog signals and a filtering module for filtering high-frequency signals, wherein the crystal oscillator module is respectively connected with the addressing module and the waveform storage module, the addressing module is also connected with a reset interface of SoCFPGA, the input end of the waveform storage module is connected with the addressing module, and the output end of the waveform storage module is sequentially connected with the digital-to-analog converter and the filtering module.

Furthermore, the external input of the power supply module is 5V, the power supply module adopts an L M1085 voltage stabilizing chip to perform voltage reduction and voltage stabilization on the externally input 5V, and the output end of the L M1085 voltage stabilizing chip is connected to all IO interfaces of the SoC FPGA.

Further, the crystal oscillator module adopts a system clock with the working frequency of 50 MHz.

Further, the digit of the digital-to-analog converter is more than 8 digits, and the conversion time is less than 1 mu s.

Further, the digital-to-analog converter is specifically a DAC900 digital-to-analog conversion chip.

Further, the filtering module adopts an RC low-pass filter, wherein the resistor R is 10k omega, and the capacitor C is 0.1 muF.

Furthermore, the addressing module comprises a comparator, a register and an address output unit, the reset interfaces of the crystal oscillator module and the SoC FPGA are respectively connected to the address output unit, and the output end of the address output unit returns to the address output unit through the register and the comparator in sequence.

Further, the waveform storage module stores a plurality of waveform data in the mif file format, and the waveform data is specifically a waveform amplitude corresponding to a waveform address.

Compared with the prior art, the variable waveform generator is designed based on the SoC FPGA, the waveform generated by a system clock of 50MHz can reach high frequency resolution, the conversion speed of the output frequency is high, the output waveform can reach high frequency, and the variable waveform generator is suitable for high-speed data processing occasions; the invention adopts the mif file format to store waveform data, can output waveforms with different frequencies only by changing addressing self-increasing amplitude, can realize waveform input and output through online debugging operation, and can quickly simulate waveform signals under various conditions; in addition, the invention combines the high-digit analog-to-digital converter and the RC low-pass filter, thereby further ensuring the stability and the resolution of the output waveform.

Drawings

FIG. 1 is a schematic structural view of the present invention;

FIG. 2 is a circuit diagram of an embodiment of a crystal module;

FIG. 3 is a schematic structural diagram of an addressing module in an embodiment;

FIG. 4 is a schematic diagram illustrating the connection between a waveform storage module and an addressing module in one embodiment;

the notation in the figure is: 1. the system comprises an SoC FPGA control chip, 2, a power module, 3, a crystal oscillator module, 4, an addressing module, 5, a waveform storage module, 6, a digital-to-analog converter, 7 and a filtering module.

Detailed Description

The invention is described in detail below with reference to the figures and specific embodiments.

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