阅读说明：本技术 一种基于ed-247标准的适配器及混合测试系统 (Adapter and hybrid test system based on ED-247 standard ) 是由 郭雨枫 于沛 陆敏敏 王闯 邹方林 于 2021-07-20 设计创作，主要内容包括：本发明公开了虚拟集成与仿真验证领域内的一种基于ED-247标准的适配器及混合测试系统,包括：处理器,与处理器连接的物理总线接口和ED-247总线接口,处理器包括基础信息库、数据采集模块、数据处理模块,基础信息库用以保存配置信息；数据采集模块用以对物理总线接口或ED-247总线接口的接口数据进行采集并发送给数据处理模块；数据处理模块用以采集数据进行编码或解码、并封装发送至物理总线接口或ED-247总线接口；处理器用以实现物理总线数据和ED-247总线数据的相互转换。该适配器能满足不同硬件设备接入ED-247总线进行通信的需求,为实现下一步的仿真验证活动打下坚实的基础。(The invention discloses an adapter and a hybrid test system based on ED-247 standard in the field of virtual integration and simulation verification, comprising: the processor comprises a basic information base, a data acquisition module and a data processing module, wherein the basic information base is used for storing configuration information; the data acquisition module is used for acquiring interface data of the physical bus interface or the ED-247 bus interface and sending the acquired interface data to the data processing module; the data processing module is used for collecting data, encoding or decoding the data, packaging the data and sending the data to a physical bus interface or an ED-247 bus interface; the processor is used for realizing the interconversion of physical bus data and ED-247 bus data. The adapter can meet the requirement that different hardware devices are connected to the ED-247 bus for communication, and lays a solid foundation for realizing next simulation verification activities.)

1. An adapter based on the ED-247 standard, comprising:

a processor;

a physical bus interface connected with the processor, the physical bus interface being used to connect the processor with a physical bus connected with the real device,

an ED-247 bus interface, the ED-247 bus interface being connected to the processor, the ED-247 bus interface being configured to connect the processor to the ED-247 bus;

the processor comprises a basic information base, a data acquisition module and a data processing module, wherein the basic information base is used for storing configuration information; the data acquisition module is used for acquiring interface data of the physical bus interface or the ED-247 bus interface according to the configuration information of the basic information base and sending the acquired interface data to the data processing module; the data processing module is used for encoding or decoding the acquired data sent by the data acquisition module according to the configuration information of the basic information base, packaging the encoded or decoded acquired data and sending the packaged acquired data to a physical bus interface or an ED-247 bus interface; the processor is used for realizing interconversion of physical bus data and ED-247 bus data.

2. The adapter of claim 1, wherein: the processor also comprises an initialization module, and the initialization module is used for initializing the data acquisition module according to the configuration information of the basic information base.

3. The adapter of claim 1, wherein: the configuration information includes interface configuration information and data acquisition channel configuration information.

4. The adapter of claim 1, wherein: the data acquisition module is provided with a plurality of data channels corresponding to the physical bus interface or the ED-247 bus interface respectively.

5. The adapter of claim 1, wherein: the data processing module includes an encoder, a decoder, and an encapsulation transmitter.

6. The adapter of claim 5, wherein: the encoder is a VISTA encoder, and the decoder is a VISTA decoder.

7. A hybrid test system based on the ED-247 standard, comprising:

a controller;

a plurality of virtual devices;

a plurality of real devices;

an ED-247 command and control bus, each of the virtual devices and the real devices being connected to the command and control bus, the command and control bus being further connected to the controller, the command and control bus being used to transmit data between the controller and each of the virtual devices and the real devices;

an ED-247 data bus, each of the virtual devices and the real devices being connected to the command and control bus, respectively, the data bus being used to transmit data between each of the virtual devices and the real devices;

the adapter of any of claims 1-6, wherein a number of said real devices are connected to said ED-247 command and control bus, ED-247 data bus, through said adapter, said adapter for converting data types associated with said real devices;

the controller is used for controlling each virtual device and each real device and carrying out scene test.

8. The adapter of claim 7, wherein: the controller is configured to provide time management, fault control, power supply, emulation monitoring, and/or dynamic signal rewriting functions.

Technical Field

The invention relates to the technical field of virtual integration and simulation verification, in particular to an adapter and a hybrid test system based on an ED-247 standard.

Background

The ED-247 is a standard jointly established by many foreign host manufacturers, onboard device manufacturers, testing agencies, etc. to define virtual and hybrid test procedures, provide virtual bus protocols, etc.

In the design process of the civil aircraft airborne system, various models, software, hardware and the like are involved, such as an SCADE model, a hand-written C code, an exciter, semi-physical equipment and the like, integrated simulation of a multi-source heterogeneous system is realized by means of a virtual and hybrid simulation integrated bus technology supporting heterogeneous model integration, integrated simulation of software open loop, pseudo closed loop, closed loop and hardware-in-loop is realized, and support is provided for activities such as airborne system integration, testing and verification. Considering that the airborne system of the civil aircraft is very complex and needs to be developed together by multiple parties, and the functions and performance of the civil aircraft are directly related to the flight safety, the execution efficiency and the operation cost of the civil aircraft, the virtual and hybrid test process needs to be standardized by a uniform and efficient standard, so that the purposes of virtual integration and simulation verification can be achieved.

However, the current domestic large civil aviation aircraft is not developed, the ED-247 protocol is not considered in the design process of part of real physical devices, and the direct access to a system for mixed testing is difficult. Therefore, an ED-247 adapter and a hybrid test system are needed to be designed based on the ED-247 standard so as to meet the requirements of integrating and simulating various models, software, hardware and the like on the same platform.

Disclosure of Invention

The application solves the problem that data of a real physical device and virtual model are not uniform in the prior art by providing the adapter based on the ED-247 standard, and achieves the effect of data intercommunication between the real physical device and the virtual model.

The embodiment of the application provides an adapter based on ED-247 standard, includes:

a processor;

a physical bus interface connected with the processor, the physical bus interface being used to connect the processor with a physical bus connected with the real device,

an ED-247 bus interface, the ED-247 bus interface being connected to the processor, the ED-247 bus interface being configured to connect the processor to the ED-247 bus;

the processor comprises a basic information base, a data acquisition module and a data processing module, wherein the basic information base is used for storing configuration information; the data acquisition module is used for acquiring interface data of the physical bus interface or the ED-247 bus interface according to the configuration information of the basic information base and sending the acquired interface data to the data processing module; the data processing module is used for encoding or decoding the acquired data sent by the data acquisition module according to the configuration information of the basic information base, packaging the encoded or decoded acquired data and sending the packaged acquired data to a physical bus interface or an ED-247 bus interface; the processor is used for realizing interconversion of physical bus data and ED-247 bus data.

The beneficial effects of the above embodiment are as follows: the ED-247 standard defines a method for virtualizing avionic signals (discrete, analog signals and avionic bus signals, including a429, CAN, AFDX, etc.), so that the avionic signals CAN be transmitted over standard ethernet, and the need for different hardware devices to access the ED-247 bus for communication CAN be met through an adapter supporting the ED-247 bus protocol, thereby laying a solid foundation for realizing next-step simulation verification activities.

In one embodiment of the present application, the processor further includes an initialization module, and the initialization module is configured to initialize the data acquisition module according to the configuration information of the basic information base. And the initialization module is used for determining the interface configuration information and the data acquisition channel configuration information transmitted at this time and ensuring the accuracy of data transmission.

In one embodiment of the present application, the configuration information includes interface configuration information and data acquisition channel configuration information. The interface configuration information is used for describing the type, data type and the like of the interface, and the data acquisition channel configuration information is used for describing the message format of the data acquisition channel, so that the accuracy and the expandability of data acquisition and transmission are ensured.

In one embodiment of the present application, the data acquisition module is provided with a plurality of data channels corresponding to the physical bus interface or the ED-247 bus interface, respectively. The adaptation to most avionic signals is guaranteed.

In one embodiment of the present application, the data processing module includes an encoder, a decoder, and an encapsulating transmitter. The three modules work cooperatively according to the corresponding configuration information, so that the accuracy and the high efficiency of communication are ensured.

In one embodiment of the present application, the encoder is a VISTAS encoder, and the decoder is a VISTAS decoder. Through encoding and decoding, data transmission on different buses is guaranteed.

A hybrid test system based on the ED-247 standard, comprising:

a controller;

a plurality of virtual devices;

a plurality of real devices;

an ED-247 command and control bus, each of the virtual devices and the real devices being connected to the command and control bus, the command and control bus being further connected to the controller, the command and control bus being used to transmit data between the controller and each of the virtual devices and the real devices;

an ED-247 data bus, each of the virtual devices and the real devices being connected to the command and control bus, respectively, the data bus being used to transmit data between each of the virtual devices and the real devices;

as the foregoing adaptor, a plurality of said real devices are connected with said ED-247 command and control bus, ED-247 data bus through said adaptor, said adaptor is used for converting data types with said real devices;

the controller is used for controlling each virtual device and each real device and carrying out scene test.

The beneficial effects of the above embodiment are as follows: under the definition of an ED-247 standard, a hybrid test system adopts a double-bus structure, and a data bus is used for transmitting data required by different devices in a simulation function; the command and control bus is used for transmitting messages for operating each access device, including configuration information, state machines, network correction, health monitoring and the like of the device, and a test bench controller is arranged on the bus and used for providing functions of data excitation, monitoring, management and the like in relevant test scenes. In the above-mentioned accessible device, the virtual device may involve activities such as modeling, and the core of its access bus is to standardize the input/output data frame structure; the real device directly accessed is directly accessed to the bus if the interface design is considered to conform to an ED-247 protocol in the design process of the hardware equipment; and the other more parts are real devices without considering the ED-247 protocol, and the parts need to realize the communication with the bus by connecting an adapter. Under the framework of the adapter and the double buses, the hybrid test system can meet the requirement that different hardware devices are connected into an ED-247 bus for communication, integration of virtual devices and real devices is achieved, integration and simulation verification can be conducted on models, software and hardware, and therefore development cost is reduced, and later-stage physical integration test pressure is relieved.

In one embodiment of the present application, the controller is configured to provide time management, fault control, power supply, emulation monitoring, and/or dynamic signal rewriting functions.

One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

1. the adapter can meet the requirement that different hardware devices are accessed to an ED-247 bus for communication, and lays a solid foundation for realizing next simulation verification activities;

2. under the framework of the adapter and the double buses, the hybrid test system can meet the requirement that different hardware devices are connected into an ED-247 bus for communication, integration of virtual devices and real devices is achieved, integration and simulation verification can be conducted on models, software and hardware, and therefore development cost is reduced, and later-stage physical integration test pressure is relieved.

Drawings

In order to more clearly illustrate the detailed description of the invention or the technical solutions in the prior art, the drawings that are needed in the detailed description of the invention or the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.

FIG. 1 is a schematic block diagram of an adapter based on the ED-247 standard according to the present invention;

FIG. 2 is a schematic block diagram of a hybrid test system based on the ED-247 standard of the present invention;

fig. 3 is a schematic diagram of a data communication process between real devices.

Detailed Description

The present invention is further illustrated by the following detailed description, which is to be construed as merely illustrative and not limitative of the remainder of the disclosure, and modifications and variations such as those ordinarily skilled in the art are intended to be included within the scope of the present invention as defined in the appended claims.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

In describing the invention, it is not necessary for a schematic representation of the above terminology to be directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples of the invention and features of different embodiments or examples described herein may be combined and combined by those skilled in the art without contradiction.

By providing the adapter based on the ED-247 standard, the embodiment of the application solves the problem that data of a real physical device and virtual model are not uniform in the prior art, and achieves the effect of data intercommunication between the real physical device and the virtual model.

In order to solve the above problems, the technical solution in the embodiment of the present application has the following general idea:

the first embodiment is as follows:

as shown in fig. 1, an adaptor based on the ED-247 standard includes an ARM Core processor, and a physical bus interface and an ED-247 bus interface respectively connected to the processor, where the physical bus interface is used to connect the processor to a physical bus connected to a real device, and the ED-247 bus interface is used to connect the processor to the ED-247 bus;

the processor comprises a basic information base, a data acquisition module, a data processing module and an initialization module, wherein the basic information base is used for storing configuration information, and the configuration information comprises interface configuration information and data acquisition channel configuration information; the data acquisition module is provided with a plurality of data channels corresponding to the physical bus interface or the ED-247 bus interface respectively, and is used for acquiring interface data of the physical bus interface or the ED-247 bus interface according to configuration information of the basic information base and sending the acquired interface data to the data processing module; the data processing module comprises a VISTA encoder, a VISTA decoder and a packaging transmitter, and is used for encoding or decoding the acquired data transmitted by the data acquisition module according to the configuration information of the basic information base, packaging the data and transmitting the data to a physical bus interface or an ED-247 bus interface, and transmitting the data through a physical bus or an ED-247 bus; the initialization module is used for initializing the data acquisition module according to the configuration information of the basic information base; the processor is used for realizing the interconversion of the physical bus data and the ED-247 bus data, so that the avionic signals can be transmitted on the standard Ethernet.

Example two:

as shown in fig. 2, a hybrid test system based on the ED-247 standard includes:

the controller is used for providing functions of time management, fault control, power supply, simulation monitoring, dynamic signal rewriting and the like;

a plurality of virtual devices;

a plurality of real devices;

the ED-247 command and control bus is used for transmitting data among the controller, each virtual device and each real device;

the ED-247 data bus is used for transmitting data between each virtual device and each real device;

as the adapter, a plurality of real devices are connected with the ED-247 command and control bus and the ED-247 data bus through the physical bus and the adapter, and the adapter is used for converting the data types of the real devices;

the controller is used for controlling each virtual device and each real device and carrying out scene test.

Example three:

as shown in FIG. 3, the real devices connected with the ED-247 bus by the adapter are in data communication with each other as follows:

step 1: under the unified scheduling of the test board controller, the real device can generate communication data, the data are coded into messages according with a specific bus protocol and are sent to a real bus, and the real bus can be the physical bus;

step 2: the message is transmitted to an ED-247 adapter in a real bus;

and step 3: the adapter receives the message and encodes it again by the VISTAS encoder, modifying the data frame according to the ED-247 specification. The ED-247 standard depends on UDP/IP realization at present, so that after the encoding is finished, a UDP message (containing information such as IP, ports, data packet strategies, time stamps and the like) capable of being transmitted on the Ethernet is actually formed and is sent to an ED-247 bus;

and 4, step 4: the message is issued to each access device of the ED-247 bus;

and 5: the target IP address adapter receives the message, decodes the UDP message according to the ED-247 specification through the VISTA decoder, restores the UDP message to the message type supported by the device interface and sends the message type to the real bus;

step 6: transmitting the message to the device end in the real bus;

and 7: the device receives the message from the bus interface and completes the corresponding process.

Through the steps, the functions of the ED-247 adapter between the real device and the ED-247 bus can be clarified.

The technical scheme in the embodiment of the application at least has the following technical effects or advantages:

1. the adapter can meet the requirement that different hardware devices are accessed to an ED-247 bus for communication, and lays a solid foundation for realizing next simulation verification activities;

2. under the framework of the adapter and the double buses, the hybrid test system can meet the requirement that different hardware devices are connected into an ED-247 bus for communication, integration of virtual devices and real devices is achieved, integration and simulation verification can be conducted on models, software and hardware, and therefore development cost is reduced, and later-stage physical integration test pressure is relieved.

Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.