阅读说明：本技术 一种半桥级联型多电平整流电路 (Half-bridge cascade type multi-level current circuit ) 是由 张皓 顾明星 张一鸣 张一啸 陈昀 王博丰 于 2019-01-11 设计创作，主要内容包括：本发明公开了一种半桥级联型多电平整流电路,所述多电平整流电路由三种基本单元构成,其中包括顶端单元、中间单元和底端单元。将顶端单元、多个底端单元与一个中间单元依次按端口连接可构成不同多电平拓扑。所述半桥级联型多电平整流电路可在整流电路交流侧实现多电平控制,使输入电流谐波大大减小,器件使用数量少,电路结构简单,有效降低了硬件成本。(The invention discloses a half-bridge cascade multi-level current circuit which is composed of three basic units, wherein the basic units comprise a top end unit, a middle unit and a bottom end unit. Different multi-level topologies can be formed by connecting the top end unit, a plurality of bottom end units and a middle unit in sequence according to ports. The half-bridge cascade type multi-level smoothing circuit can realize multi-level control on the alternating current side of the rectifying circuit, so that input current harmonic waves are greatly reduced, the number of used devices is small, the circuit structure is simple, and the hardware cost is effectively reduced.)

1. A half-bridge cascade type multi-level current circuit is characterized by comprising a top end unit, a middle unit and a bottom end unit, wherein M-phase and N (N is more than or equal to 2) level rectifying circuits can be formed, and the total number of three basic units in each phase is N-1; furthermore, the number of the top end units in each phase is K-1 (K is more than or equal to 1 and less than or equal to N), the number of the middle units is 1, the number of the bottom end units is N-K-1, namely, the 1 st to K-1 th modules are the top end units, the Kth modules are the middle units, and the K +1 th to N-1 th modules are the bottom end units; the top end unit is a three-port module and consists of a first switch tube, a second switch tube and a first capacitor;

the specific connection mode of the top end unit is as follows: the positive electrode of the first capacitor is the first port of the top end unit; the collector of the first switch tube is the first and second ports of the top end unit; the emitter of the first switch tube is connected with the collector of the second switch tube, and the connection point is a first third port of the top end unit;

the middle unit is a five-port module and consists of a third switch tube, a fourth switch tube and a second capacitor, and the three modules form two branches; the specific connection mode of the two branches is as follows: the second capacitor alone forms a branch, the anode of the second capacitor is the second first port of the intermediate unit, and the cathode of the second capacitor is the second port of the intermediate unit; the other branch is formed in a manner that an emitting electrode of the third switching tube is connected with a collector electrode of the fourth switching tube, the collector electrode of the third switching tube is a second third port of the middle unit, the emitting electrode of the fourth switching tube is a second fourth port of the middle unit, and a connection point of the emitting electrode of the third switching tube and the collector electrode of the fourth switching tube is a second fifth port of the middle unit;

the bottom end unit is a three-port module and comprises a fifth switching tube, a sixth switching tube and a third capacitor, and the negative electrode of the third capacitor is used as the third end of the bottom end unit;

and the emitter of the fifth switching tube is connected with the collector of the sixth switching tube, the connection point is the third two ends of the bottom end unit, and the emitter of the sixth switching tube is used as the third three ends of the bottom end unit.

2. The half-bridge cascade type multi-level current circuit according to claim 1, wherein the rectifier circuit is an ac electromotive force, a grid side reactance, and a half-bridge cascade type multi-level current circuit topology.

3. The half-bridge cascade type multi-level current circuit according to claim 1, wherein the switching tubes in the three basic cells are composed of fully-controlled power electronic switches and reverse freewheeling diodes in parallel; two switch tubes in the three basic units have three switch combination states, namely, one switch tube is switched on, the other switch tube is switched off or the two switch tubes are switched off, and the two switch tubes are not switched on at the same time.

4. A half-bridge cascade type multilevel current circuit according to claim 2, wherein the second five ports of the intermediate unit are connected to the grid-side reactance, and the grid-side reactance is connected to the ac side.

Technical Field

The invention relates to the technical field of power electronics, in particular to a half-bridge cascade type multi-level rectifier circuit which can be applied to the fields of high-low voltage rectifiers, direct current transmission and transformation, energy storage devices and the like.

Background

In recent years, the application of power electronic devices in the field of high voltage and high power has been increasing. Due to the limitation of the voltage withstanding grade of the device, researches on the multi-level topological structure, related control theory and the like are receiving wide attention. In the process of continuous development and conversion of the multi-level current circuit, the following basic topologies are formed: diode clamp type, cascade type H bridge type, and modular multilevel type. The diode clamp type needs to use a large number of clamping capacitors; each H bridge unit of the H bridge cascade structure needs to adopt independent PWM rectification, the number of used devices is large, and a phase-shifting isolation transformer is needed for electrical isolation; the modular multilevel converter has the advantage of H-bridge cascade structure modularization, but the number of cascaded units is large, and the cost is high.

On the contrary, the cascade multi-level rectifier can reduce the harmonic wave at the input side, uses few components and has a simple structure, so that the cascade multi-level rectifier is favored in medium-high voltage and high-power occasions all the time.

Disclosure of Invention

The invention provides a half-bridge cascade type multi-level current circuit, and aims to provide a novel multi-level current circuit topological structure formed by basic units. By configuring and combining the three basic units, different multi-level topologies can be obtained and multi-level can be freely output, and the voltage grade of the direct current bus can be improved by connecting a plurality of capacitors in series at the direct current side. Compared with a diode clamping type, a cascade H-bridge type and a modular multilevel type topological structure, the invention does not need additional diodes and capacitors, has less used devices and simple circuit structure and effectively reduces the hardware cost.

The basic unit is the minimum component which satisfies the topological condition of forming the half-bridge cascade type multi-level current circuit, the topological structure of the invention comprises a top end unit, a middle unit and a bottom end unit, and can form M-phase and N (N is more than or equal to 2) level circuits, and the total number of the three basic units in each phase is N-1. Furthermore, the number of the top end units in each phase is K-1 (K is more than or equal to 1 and less than or equal to N), the number of the middle units is 1, the number of the bottom end units is N-K-1, namely, the 1 st module to the K-1 st module are the top end units, the K th module is the middle unit, and the K +1 th module to the N-1 st module are the bottom end units.

The top end unit is a three-port module and is composed of a first switch tube, a second switch tube and a first capacitor. The specific connection mode of the top end unit is as follows: the positive electrode of the first capacitor is the first port of the top end unit; the collector of the first switch tube is the first and second ports of the top end unit; the emitter of the first switch tube is connected with the collector of the second switch tube, and the connection point is the first three-port of the top end unit.

The middle unit is a five-port module and consists of a third switch tube, a fourth switch tube and a second capacitor, and the three modules form two branches. The specific connection mode of the two branches is as follows: the second capacitor alone forms a branch, the anode of the second capacitor is the second first port of the intermediate unit, and the cathode of the second capacitor is the second port of the intermediate unit; the other branch is formed in a manner that an emitter of the third switching tube is connected with a collector of the fourth switching tube, the collector of the third switching tube is the second third port of the middle unit, the emitter of the fourth switching tube is the second fourth port of the middle unit, and a connection point of the emitter of the third switching tube and the collector of the fourth switching tube is the second fifth port of the middle unit.

The bottom end unit is a three-port module and comprises a fifth switch tube, a sixth switch tube and a third capacitor. And the negative electrode of the third capacitor is used as the third end of the bottom end unit. And the emitter of the fifth switching tube is connected with the collector of the sixth switching tube, the connection point is the third two ends of the bottom end unit, and the emitter of the sixth switching tube is used as the third three ends of the bottom end unit.

Further, the rectifying circuit of the present invention is connected to the grid side reactance through a second five port of the intermediate unit, and then the grid side reactance is connected to the ac side.

Further, any one of the basic units, namely the top end unit, the middle unit and the bottom end unit, comprises two switching tubes, and three switching states can be combined by controlling the on or off of the two switching tubes. Taking the top end unit as an example, the top end unit includes the first switch tube and the second switch tube, and the three switch states include that the first switch tube is turned on and the second switch tube is turned off, the first switch tube and the second switch tube are both turned off, the first switch tube is turned off and the second switch tube is turned on, and there is no switch state in which the first switch tube and the second switch are turned on at the same time.

It should be noted that, although the switching tubes used in the circuit shown in the drawings of the present invention are all IGBTs, the application scope of the present invention is not limited thereto, and the switching tubes may be fully-controlled power electronic switching tubes, specifically including gate turn-off thyristors (GTO), power transistors (GTR), power field effect transistors (power MOSFETs), insulated gate transistors (IGBTs), and the like.

The invention has the following beneficial effects: the invention provides a half-bridge cascade type multi-level current circuit, which solves the problems that the system structure becomes complex and the voltage conversion is difficult as the number of levels increases, three introduced basic units do not increase the complexity of a rectifying circuit, the control mode is simple, and the output freedom degree of line voltage levels is high.

Description of the drawings:

FIG. 1 is a schematic structural view of a head unit M1 according to the present invention;

FIG. 2 is a schematic structural diagram of an intermediate unit M2 according to the present invention;

FIG. 3 is a schematic structural view of the bottom end unit M3 according to the present invention;

fig. 4 is a schematic structural diagram of a half-bridge cascaded five-level rectifier circuit according to an embodiment of the present invention;

fig. 5 is a schematic diagram of a half-bridge cascaded single-phase full-bridge rectifier circuit according to an embodiment of the present invention;

FIG. 6 is a waveform diagram of phase voltage of a half-bridge cascaded single-phase full-bridge rectifier circuit according to an embodiment of the present invention;

fig. 7 is a waveform diagram of the line voltage output of a half-bridge cascaded single-phase full-bridge rectifier circuit according to an embodiment of the present invention;

the specific implementation mode is as follows:

the technical solutions of the present invention are further described in detail below with reference to the accompanying drawings, but it should be noted that the scope of the present invention is not limited to the following description.

When the half-bridge cascade type multi-level current circuit needs to generate N (N is more than or equal to 2) levels, the control mode is as follows:

(1) modulating signal U_refIs a sine wave, and N-1 triangular waves U_tri1~U_tri（N-1）As a carrier, the on-off of 2 switching tubes in the top end unit, the middle unit and the bottom end unit is controlled at the intersection point moment of the modulation signal and the carrier, and then the width of a rectangular pulse corresponding to the carrier is changed to control the amplitude of the output fundamental wave of the submodule; the output frequency of the half-bridge cascade type multi-level current circuit is controlled by changing the modulation period of the carrier wave, so that the amplitude and the frequency of the half-bridge cascade type multi-level current circuit are controlled while the voltage is output.

(2) Inputting the modulation signal U_refThe triangular carrier waves U are sequentially stacked with the same frequency as the N-1 frequencies_tri1~U_tri（N-1）And comparing, wherein the obtained PWM waveform is used as a driving signal of each switching tube in the basic unit, and the specific control method comprises the following steps:

n-1 triangular carriers are stacked from the amplitude value of-1, and the amplitude value U of the nth (N is more than or equal to 1 and less than or equal to N-1, N is an integer) carrier_tri（n）In the range of [ (2N-N +1)/N-1, (2N-N + 2)/N-1]The peak value of the N-1 th carrier wave is 1, all the carrier waves have phase difference of 2 pi/N in turn_refThe amplitude range of the signal is changed between-1 and 1;

when U is turned_ref<0 and U_tri（n）<U_ref<U_tri(n+1)(if N is an odd number, 1)<N is less than or equal to (N-1)/2; if N is an even number, 1<N is less than or equal to N/2), setting the (N-1) th basic unit to be in a switching-on state, setting the (N-1) th to (K-1) th basic units to be in a switching-on state, setting the (K) th basic unit to be in a second state, and setting the rest basic units to be in a blocking state; when n =1, all of the 1 st to K-1 th basic cells are in an on state, the kth basic cell is set to a state two, and all of the remaining basic cells are in a off state.

When U is turned_refIs more than or equal to 0 and U_tri（n）≤U_ref≤U_tri（n+1）(if N is an odd number, (N + 1)/2. ltoreq. N<N-1; if N is an even number, (N + 2) is less than or equal to N<N-1), setting the nth sub-module to be in state, setting the K +1 th to the nth-1 th sub-modules to be in conducting state, setting the K sub-module to be in state one, and setting the rest sub-modules to be in blocking state; when N = N-1, the kth sub-module is set to the state one, the K +1 th to the N-1 th modules are all in the on state, and the rest modules are all in the off state.

Wherein the content of the first and second substances,

the first state: the third switch tube in the middle unit is turned on, and the fourth switch tube is turned off;

and a second state: the third switch tube in the middle unit is turned off, and the fourth switch tube is turned on;

the input state: the first switch tube in the top end unit is turned off, and the second switch tube is turned on; the fifth switching tube in the bottom end unit is switched on, and the sixth switching tube is switched off;

a blocking state: two switching tubes in the top end unit, the middle unit or the bottom end unit are all turned off;

and (3) conducting state: the first switch tube in the top end unit is switched on, and the second switch tube is switched off; and the fifth switch tube in the bottom end unit is switched off, and the sixth switch tube is switched on.

It should be noted that the type of the modulated wave is not limited to a specific waveform, and the waveform of the modulated wave is general.

Referring to fig. 1, a schematic structural diagram of the top cell M1 constituting the topology of the present invention includes a first switch TM11, a second switch TM12, and a first capacitor C1. The specific connection mode of the basic unit M1 is as follows: the positive electrode of the first capacitor C1 is the first port MA1 of the top unit; the collector of the first switch TM11 is the first two-port MC1 of the top end unit M1; the emitter of the first switch TM11 is connected to the collector of the second switch TM12, which is the first three-port O1 of the top end unit M1.

Referring to fig. 2, a schematic structural diagram of the middle cell M2 constituting the topology of the present invention includes the third switching tube TM21, the fourth switching tube TM22, and the second capacitor C2. The specific connection mode of the intermediate unit M2 is as follows: the specific connection mode of the two branches is as follows: the second capacitor C2 alone forms a branch, and the positive electrode of the second capacitor C2 is the second first port MA2 of the middle unit M2, and the negative electrode is the second port MB2 of the middle unit M2; the other branch is formed in a manner that an emitter of the third switching tube TM21 is connected with a collector of the fourth switching tube TM22, the collector of the third switching tube TM21 is the second third port MC2 of the middle unit M2, the emitter of the fourth switching tube TM22 is the second fourth port MD2 of the middle unit M2, and a connection point of the emitter of the third switching tube TM21 and the collector of the fourth switching tube TM22 is the second five port O2 of the middle unit M2.

Referring to fig. 3, a schematic structural diagram of the bottom unit M3 constituting the topology of the present invention includes a fifth switch TM31, a sixth switch TM32, and a third capacitor C3, and a cathode of the third capacitor C3 is used as a third port MB3 of the bottom unit M3. The emitter of the fifth switch TM31 is connected to the collector of the sixth switch TM32, and this connection point is the third second port O3 of the bottom end unit M3, and the emitter of the sixth switch TM32 is used as the third port MD3 of the bottom end unit M3.

Fig. 4 is a schematic structural diagram of a half-bridge cascaded five-level rectifier circuit according to an embodiment of the present invention. The half-bridge cascade five-level rectification circuit is composed of 1 top unit M1, 1 middle unit M2 and 2 third sub-modules M3. The connection of the top, middle and bottom units has been described in detail in fig. 1, 2 and 3, and therefore, it is not described in detail in this and the following embodiments, but only how the top, middle and bottom units are connected. The specific connection mode among the basic units is as follows: the first primary port MA1 of the top end unit M1 is connected with the first secondary port MC 1; the MB1 port of the top unit is connected to the MA2, second port of the middle unit M2; the first three-port O1 of the top cell M1 is connected with the second three-port MC2 of the middle cell M2; a second five-port O2 of the middle unit M2 is connected to a grid-side reactance; the second port MB2 of the middle unit M2 is connected with the MA3 port of the bottom unit M3; the second four port MD2 of the middle unit M2 is connected with the third second port O3 of the bottom end unit M3; the third port MB3 of said bottom end unit M3 is connected to the MA4 port of a second said bottom end unit M4; the third port MD3 of the bottom end unit M3 is connected with the fourth port O4 of the second bottom end unit M4; the fourth port MB4 of a second of said bottom units is connected to the fourth port. And finishing the structural connection of the half-bridge cascade five-level rectifying circuit.

The half-bridge cascade five-level rectifying circuit can output 5 levels, which are respectively as follows: E. 3/4E, 1/2E, E/4, 0. The specific implementation mode of the half-bridge cascade five-level rectifier circuit is as follows:

therefore, the topology structure of the half-bridge cascade five-level rectifying circuit comprises the top end unit M1, the middle unit M2 and the bottom end unit M3. By combining the top end unit M1, the middle unit M2 and the bottom end unit M3 in a certain way, different multi-level topologies can be obtained, multi-level can be freely output, and the voltage level of a direct current bus can be improved by connecting a plurality of capacitors in series at the direct current side. Compared with a diode clamping type topological structure, a cascade H-bridge type topological structure and a modular multilevel topological structure, extra diodes and capacitors are not needed, the number of used devices is small, the circuit structure is simple, and the hardware cost is effectively reduced.

As another embodiment of the present invention, referring to fig. 5, a schematic diagram of a half-bridge cascaded single-phase full-bridge rectifier circuit is shown. The structure of each set of bridge arms in the half-bridge cascaded single-phase full-bridge rectifier circuit is the same as that of the half-bridge cascaded five-level rectifier circuit in the previous embodiment of the invention, so the specific connection mode of the three basic units included in the half-bridge cascaded single-phase full-bridge rectifier circuit is not repeated, and only the connection mode between two bridge arms is described. The connection mode between the two groups of bridge arms is as follows: the first group of bridge arms and the second group of bridge arms are respectively connected to two sides of the alternating current voltage source. And finishing the connection of the half-bridge cascade type single-phase full-bridge rectifying circuit.

The phase voltage is the voltage value of two ends of each phase power supply relative to the reference point selected in the phase, and the line voltage is the voltage difference value between two phases, and has positive and negative fractions according to different specified directions. Therefore, the phase voltage does not conflict with the line voltage.

Fig. 6 is a waveform diagram of phase voltage output of a half-bridge cascaded single-phase full-bridge rectifier circuit according to an embodiment of the invention. As can be seen from the figure, the phase voltage output range of the half-bridge cascade type single-phase full-bridge rectifier circuit is +120V to-120V, the phase difference is 120 degrees, the capacitance voltage in the three basic units is 30V, and the positive and negative of the three basic units respectively have four levels, namely +120V, +90V, +60V, +30V, 0V, -30V, -60V, -90V and-120V.

Referring to fig. 7, which is a waveform diagram of the line voltage output of the half-bridge cascaded single-phase full-bridge rectifier circuit according to an embodiment of the present invention, the phase difference is 120 ° with reference to MB2 in the half-bridge cascaded single-phase full-bridge rectifier circuit of fig. 5, and the capacitor voltages in the three basic cells are all 30V. Therefore, the line voltage output range of the half-bridge cascade type single-phase full-bridge rectifying circuit is +60V to-60V, and the positive and negative output levels are respectively-60V, -30V, 0V, +30V and + 60V.

Because the two groups of bridge arms in the half-bridge cascade five-level rectification circuit have the same structure, only one group of bridge arms is taken as an example to describe the voltage value of the output line and the state of the corresponding switching tube:

therefore, the half-bridge cascade type five-level rectifying circuit can achieve the purpose of outputting five voltages of-60V, -30V, 0, +30V and +60V by controlling the states of the first switching tube TM11, the second switching tube TM21, the fifth switching tube TM31, the sixth switching tube TM32, the seventh switching tube TM41 and the eighth switching tube TM42 in the circuit and combining the states. The specific switch state control mode is as follows: when-60V voltage is output, the seventh switching tube TM42, the sixth switching tube TM32 and the fourth switching tube TM22 are conducted; when-30V voltage is output, the sixth switching tube TM41, the sixth switching tube TM32 and the fourth switching tube TM22 are conducted; when the voltage of 0V is output, the fifth switch tube TM31 and the fourth switch tube TM22 are turned on.

Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, is limited to these examples; within the idea of the invention, also features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity.

The embodiments of the invention are intended to embrace all such alternatives, modifications and variances that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, substitutions, improvements and the like that may be made without departing from the spirit and principles of the invention are intended to be included within the scope of the invention.