阅读说明：本技术 一种压电致动单元逆变型功率放大电路效率提升方法 (Efficiency improvement method for piezoelectric actuation unit inversion type power amplification circuit ) 是由 赵勃 史维佳 谭久彬 于 2020-04-24 设计创作，主要内容包括：一种压电致动单元逆变型功率放大电路效率提升方法,涉及两相致动单元的电源驱动技术。本发明是解决了传统推挽逆变拓补结构效率低、电流尖峰大的问题。所提出的方法通过在推挽逆变电路中引入两个Snubber电容,并通过优化设计匹配电感感值、Snubber电容容值和死区时间,使得电感和Snubber电容间出现谐振,实现推挽逆变电路中功率管的零电压零电流开关,使开关损耗降至为零,进而较大程度地提升了逆变电路的效率。本发明两相推挽逆变的两个信号输入端连接电网,两相全桥逆变电路的两个信号输出端分别连接匹配电路的两个信号输入端,匹配电路的输出端分别用于连接两相电机。(A method for improving efficiency of a piezoelectric actuating unit inversion type power amplifying circuit relates to a power supply driving technology of a two-phase actuating unit. The invention solves the problems of low efficiency and large current peak of the traditional push-pull inversion topological structure. According to the method, two Snubber capacitors are introduced into the push-pull inverter circuit, and the inductance value, the capacitance value of the Snubber capacitors and dead time are matched through optimization design, so that resonance occurs between the inductors and the Snubber capacitors, zero-voltage zero-current switching of a power tube in the push-pull inverter circuit is realized, switching loss is reduced to zero, and the efficiency of the inverter circuit is further improved to a greater extent. Two signal input ends of two-phase push-pull inversion are connected with a power grid, two signal output ends of a two-phase full-bridge inversion circuit are respectively connected with two signal input ends of a matching circuit, and the output ends of the matching circuit are respectively used for being connected with a two-phase motor.)

1. the efficiency improvement method of the piezoelectric actuation unit inversion type power amplification circuit is characterized by comprising a push-pull inversion circuit (101) comprising a Snubber circuit, a calculation method of series inductance values of a matching circuit (102), a calculation method of capacitance values of a Snubber capacitor (103) and a calculation method of switch dead time.

2. The efficiency improvement method of the inverter type power amplifier circuit of the piezoelectric actuator unit according to claim 1, wherein the push-pull inverter circuit (101) comprising a Snubber circuit comprises four power switching transistors and two Snubber capacitors (102), and specifically comprises a first MOS transistor (Q)₁) MOS transistor II (Q)₂) MOS transistor III (Q)₃) MOS transistor IV (Q)₄) First Snubber capacitor (C)_Q2) Snubber capacitor II (C)_Q4) First transformer (T)_A) And second transformer (T)_B)，

MOS transistor I (Q)₁) Source electrode of MOS transistor II (Q)₂) Source electrode of MOS transistor III (Q)₃) Source electrode of (1), MOS transistor (Q)₄) Source electrode, buffer capacitor (C)_Q2) And a second buffer capacitor (C)_Q4) One end of the push-pull inverter circuit is connected with the negative electrode of a direct current bus of the push-pull inverter circuit (101),

first transformer (T)_A) Primary winding center tap and second transformer (T)_B) The middle tap of the primary winding is connected with the positive pole of a direct current bus of the push-pull inverter circuit (101),

MOS transistor I (Q)₁) Leakage stage of and transformer No. one (T)_A) One end of the primary winding is connected with a first transformer (T)_A) The secondary winding and one end of the end with the same name as the secondary winding are used as a first voltage output end of the push-pull inverter circuit (101),

MOS transistor II (Q)₂) Drain stage, buffer capacitor (C)_Q2) Another end of (1) and a transformer (T)_A) The other end of the primary winding is connected with a first transformer (T)_A) A secondary winding andone end of the end with the same name is used as a second voltage output end of the push-pull inverter circuit (101),

MOS transistor III (Q)₃) Leakage stage of and transformer No. two (T)_B) One end of the primary winding is connected with a second transformer (T)_B) The secondary winding and one end of the end with the same name as the secondary winding are used as a third voltage output end of the push-pull inverter circuit (101),

MOS transistor IV (Q)₄) Drain stage, buffer capacitor II (C)_Q4) Another end of (2) and a second transformer (T)_B) The other end of the primary winding is connected with a second transformer (T)_B) The secondary winding and one end of the end with the same name as the secondary winding are used as a fourth voltage output end of the push-pull inverter circuit (101),

the voltage between the first voltage output end and the second voltage output end of the push-pull inverter circuit (101) is used as one-phase input voltage of the two-phase load,

and the voltage between the third voltage output end and the fourth voltage output end of the push-pull inverter circuit (101) is used as the other phase input voltage of the two-phase load.

The two-phase load can be two-phase inductive, capacitive or resistive loads such as a two-phase electromagnetic motor, a two-phase ultrasonic motor connected with a matching circuit, or a two-phase piezoelectric transducer.

3. The push-pull inverter circuit (101) comprising a Snubber circuit of claim 2, wherein the switch control logic applied to the four power switch tube bases:

first power switch tube (Q)₁) And a second power switch tube (Q)₂) Has a specific dead time between the switch states, power switch tube III (Q)₃) And a fourth power switch tube (Q)₄) There is the same specific dead time between the switching states,

first power switch tube (Q)₁) Second power switch tube (Q)₂) Power switch tube III (Q)₃) And a fourth power switch tube (Q)₄) There is only one turn-on or one turn-off in each inversion period.

4. The efficiency improvement method of the inverter type power amplification circuit of the piezoelectric actuation unit as claimed in claim 1, wherein the matching circuit (102) comprises a first inductor (L)_A) And a second inductor (L)_B)，

The first voltage output end of a push-pull inverter circuit (101) comprising a Snubber circuit is connected with a first inductor (L)_A) One terminal of (c), a first inductor (L)_A) The other terminal of the first and second voltage-sensing circuits (102) as a first voltage output terminal,

a third voltage output end of a push-pull inverter circuit (101) comprising a Snubber circuit is used as a third voltage output end of a matching circuit (102),

the second voltage output end of the push-pull inverter circuit (101) comprising the Snubber circuit is connected with the second inductor (L)_B) One terminal of (2), a second inductor (L)_B) The other terminal of the first and second voltage outputs of the matching circuit (102),

the voltage between the first voltage output end of the matching circuit (102) and the third voltage output end of the matching circuit (102) is used as the two-phase voltage of the two-phase ultrasonic motor/piezoelectric sensor,

and the voltage between the second voltage output end of the matching circuit (102) and the third voltage output end of the matching circuit (102) is used as the other two-phase signal of the two-phase ultrasonic motor/piezoelectric sensor.

5. The DC/AC inverter current spike suppression method of claim 1, wherein a number one inductor (L) in the matching circuit (102)_A) Inductor II (L)_B) The method for calculating the inductance value is that,

in the matching circuit (102), a first inductor (L)_A) And a second inductor (L)_B) Are all represented by inductance L:

L＝(C_dR_m ²L_mC_m/(L_mC_m+C_d ²R_m ²))×(1+α_L),

wherein the content of the first and second substances,

R_m＝1/(max(G)-min(G))，

C_m＝1/(L_mω_r ²)，

C_d＝(max(B)+min(B))/(2ω_r)，

α therein_LAs a result of the residual inductance, the inductance,which represents the conductance of the electrical conductor,represents susceptance, | Y | andis the absolute value and phase of the admittance, which can be measured directly by an impedance analyzer, ω (-) is a function of angular frequency under output (-) conditions, ω_rIndicating the resonant frequency, relative residual inductance α_LThe design of (A) needs to balance the contradiction between conduction losses and switching losses, α_LToo large causes large conduction losses, α_LToo small causes large switching losses, and a typical value for this parameter may be 0.1.

6. The efficiency improvement method of piezoelectric actuator unit inverter type power amplifier circuit according to claim 1, wherein the buffer capacitor (C) is the first buffer capacitor in Snubber capacitor (102)_Q2) And a second buffer capacitor (C)_Q4) A special capacity value calculation method needs to be satisfied,

buffer capacitor (C) in Snubber capacitor (103)_Q2) And a second buffer capacitor (C)_Q4) Is equal, denoted by C, and the expression:

C＞max(10C_OSS，4/R_Eω_E)，

wherein the content of the first and second substances,

R_E＝R_mL_mC_m/(n_T ²(L_mC_m+C_d ²R_m ²))，

ω_E＝1/(α_LC_dR_m)，

wherein, C_OSSIndicating the output capacitance of the power switch, α_LIs the residual coefficient of inductance, n_TThe turn ratio of the transformer is the ratio of the turns of the transformer,which represents the conductance of the electrical conductor,represents susceptance, | Y | andis the absolute value and phase of the admittance, which can be measured directly by an impedance analyzer, ω (-) is a function of angular frequency under output (-) conditions, ω_rIndicating the resonant frequency, relative residual inductance α_LThe design of (A) needs to balance the contradiction between conduction losses and switching losses, α_LToo large causes large conduction losses, α_LToo small causes large switching losses, and a typical value for this parameter may be 0.1. If the MOS transistor with smaller output capacitance is selected, the capacitance of the MOS transistor satisfies C_OSS＜＜0.4/(R_Eω_E) Then the capacitance of C is expressed as:

C＝4/(R_Eω_E)×(1+α_C),

α therein_CIs the residual capacitance coefficient α_CThe design of (A) needs to balance the contradiction between conduction losses and switching losses, α_CToo large causes large conduction losses, α_CToo small causes large switching losses, and a typical value for this parameter may be 0.1.

7. The efficiency improvement method of the inverter type power amplification circuit of the piezoelectric actuation unit as claimed in claim 1, wherein the specific dead time t is provided_d，

Dead time t_dFrom time t_d1And t_d2Common composition, can be described as follows:

t_d＝t_d1+t_d2＝1/ω_E+1/(2ω₀)。

Technical Field

The invention relates to a power supply driving technology of a two-phase actuating unit, in particular to a method for improving the efficiency of a piezoelectric actuating unit inversion type power amplifying circuit for controlling a two-phase motor; the scheme of the invention is particularly suitable for the optimization design of various types of two-phase motor driving circuits.

Background

The piezoelectric actuating unit is widely applied to high-precision scientific research equipment such as aerospace equipment, precision measurement instruments and particle accelerators, has the outstanding advantages of high displacement sensitivity, high positioning precision, high static holding force when an input power supply is cut off and the like, and is considered to be an excellent substitute of a traditional electromagnetic motor.

The piezoelectric actuating unit needs to use a power amplifying circuit to obtain enough input power during operation. Compared with a linear power amplifying circuit, the inverter type power amplifying circuit has the advantages of small size, high efficiency and the like, but when the switching frequency is high, the efficiency of the inverter type power amplifying circuit is further improved to a greater extent due to high switching loss. For the piezoelectric actuating unit, the operating frequency is often higher, often higher than 20kHz or even up to mhz, so how to reduce the switching loss of the inverter circuit is an urgent problem to be solved for the driving power supply of the piezoelectric actuating unit.

According to the invention, two Snubber capacitors are introduced into the push-pull inverter circuit, and the inductance value, the capacitance value and dead time of the Snubber capacitors are matched through optimized design, so that resonance occurs between the inductors and the Snubber capacitors, zero-voltage zero-current switching of a power tube in the push-pull inverter circuit is realized, the switching loss is reduced to zero, and the efficiency of the inverter circuit is further improved to a greater extent.

Disclosure of Invention

The invention aims to solve the problems of low efficiency and large current peak of the traditional push-pull inversion topological structure. The efficiency improvement method of the piezoelectric actuation unit inversion type power amplification circuit is characterized by comprising a push-pull inversion circuit (101) comprising a Snubber circuit, a calculation method of series inductance values of a matching circuit (102), a calculation method of capacitance values of a Snubber capacitor (103) and a calculation method of switch dead time.

The push-pull inverter circuit (101) comprising the Snubber circuit consists of four power switching tubes and two Snubber capacitors (102), and specifically comprises a first MOS tube (Q)₁) MOS transistor II (Q)₂) MOS transistor III (Q)₃) MOS transistor IV (Q)₄) First Snubber capacitor (C)_Q2) Snubber capacitor II (C)_Q4) First transformer (T)_A) And second transformer (T)_B)，

MOS transistor I (Q)₁) Source electrode of MOS transistor II (Q)₂) Source electrode of MOS transistor III (Q)₃) Source electrode of (1), MOS transistor (Q)₄) Source electrode, buffer capacitor (C)_Q2) And a second buffer capacitor (C)_Q4) One end of the push-pull inverter circuit is connected with the negative electrode of the direct current bus of the push-pull inverter circuit (101),

first transformer (T)_A) Primary winding center tap and second transformer (T)_B) The middle tap of the primary winding is connected with the positive pole of a direct current bus of the push-pull inverter circuit (101),

MOS transistor I (Q)₁) Leakage stage of and transformer No. one (T)_A) One end of the primary winding is connected with a first transformer (T)_A) The secondary winding and one end of the end with the same name as the secondary winding are used as a first voltage output end of the push-pull inverter circuit (101),

MOS transistor II (Q)₂) Drain stage, buffer capacitor (C)_Q2) Another end of (1) and a transformer (T)_A) The other end of the primary winding is connected with a first transformer (T)_A) The secondary winding and one end of the end with the same name as the secondary winding are used as a second voltage output end of the push-pull inverter circuit (101),

MOS transistor III (Q)₃) Leakage stage of and transformer No. two (T)_B) One end of the primary winding is connected with a second transformer (T)_B) The secondary winding and one end of the end with the same name as the secondary winding are used as a third voltage output end of the push-pull inverter circuit (101),

MOS transistor IV (Q)₄) Drain stage, buffer capacitor II (C)_Q4) Another end of (2) and a second transformer (T)_B) The other end of the primary winding is connected with a second transformer (T)_B) The secondary winding and one end of the end with the same name as the secondary winding are used as a fourth voltage output end of the push-pull inverter circuit (101),

the voltage between the first voltage output end and the second voltage output end of the push-pull inverter circuit (101) is used as one-phase input voltage of the two-phase load,

and the voltage between the third voltage output end and the fourth voltage output end of the push-pull inverter circuit (101) is used as the other phase input voltage of the two-phase load.

The two-phase load can be two-phase inductive, capacitive or resistive loads such as a two-phase electromagnetic motor, a two-phase ultrasonic motor connected with a matching circuit, or a two-phase piezoelectric transducer.

According to the DC/AC inverter current spike suppression method, characterized in that the matching circuit (102) comprises a first inductor (L)_A) And a second inductor (L)_B)，

The first voltage output end of a push-pull inverter circuit (101) comprising a Snubber circuit is connected with a first inductor (L)_A) One terminal of (c), a first inductor (L)_A) The other terminal of the first and second voltage-sensing circuits (102) as a first voltage output terminal,

a third voltage output end of a push-pull inverter circuit (101) comprising a Snubber circuit is used as a third voltage output end of a matching circuit (102),

the second voltage output end of the push-pull inverter circuit (101) comprising the Snubber circuit is connected with the second inductor (L)_B) One terminal of (2), a second inductor (L)_B) The other terminal of the first and second voltage outputs of the matching circuit (102),

the voltage between the first voltage output end of the matching circuit (102) and the third voltage output end of the matching circuit (102) is used as the two-phase voltage of the two-phase ultrasonic motor/piezoelectric sensor,

and the voltage between the second voltage output end of the matching circuit (102) and the third voltage output end of the matching circuit (102) is used as the other two-phase signal of the two-phase ultrasonic motor/piezoelectric sensor.

In the matching circuit (102), a first inductor (L)_A) And a second inductor (L)_B) Are all represented by inductance L:

L＝(C_dR_m ²L_mC_m/(L_mC_m+C_d ²R_m ²))×(1+α_L),

wherein the content of the first and second substances,

R_m＝1/(max(G)-min(G))，

C_m＝1/(L_mω_r ²)，

C_d＝(max(B)+min(B))/(2ω_r)，

α therein_LWhich is the residual coefficient of the inductance,which represents the conductance of the electrical conductor,represents susceptance, | Y | andis the absolute value and phase of the admittance, which can be measured directly by an impedance analyzer, ω (-) is a function of angular frequency under output (-) conditions, ω_rIndicating the resonant frequency, relative residual inductance α_LThe design of (A) needs to balance the contradiction between conduction losses and switching losses, α_LToo large causes large conduction losses, α_LToo small causes large switching losses, and a typical value for this parameter may take 0.1.

According to the DC/AC inverter current spike suppression method, the method is characterized in that a first Snubber capacitor (C)_Q2) And a Snubber capacitor (C)_Q4) A method for calculating a capacitance value of a capacitor,

buffer capacitor (C) in Snubber capacitor (103)_Q2) And a second buffer capacitor (C)_Q4) Is equal, denoted by C, and the expression:

C＞max(10C_OSS，4/R_Eω_E)，

wherein the content of the first and second substances,

R_E＝R_mL_mC_m/(n_T ²(L_mC_m+C_d ²R_m ²))，

ω_E＝1/(α_LC_dR_m)，

wherein, C_OSSIndicating the output capacitance of the power switch, α_LIs the residual coefficient of inductance, n_TThe turn ratio of the transformer is the ratio of the turns of the transformer,

if a switch with a smaller output capacitance is selected, its capacitanceSatisfies C_OSS＞＞0.4/(R_Eω_E) Then the capacitance of C is expressed as: c is 4/(R)_Eω_E)×(1+α_C),

α therein_CIs the residual capacitance coefficient α_CThe design of (A) needs to balance the contradiction between conduction losses and switching losses, α_CToo large causes large conduction losses, α_CToo small causes large switching losses, and a typical value for this parameter may be 0.1.

Push-pull inverter circuit (101) comprising a Snubber circuit, characterized in that it has a specific dead time t_dAnd a delay time t_dltWherein the dead time t_dFrom t_d1And t_d2Common composition, can be described as follows:

t_d＝t_d1+t_d2＝1/ω_E+1/(2ω₀)，

delay time t_dltThe following can be described:

t_dlt＝T_S/4-t_d,

wherein T is_SIs the period of the output current.

The invention has the beneficial effects that: the novel two-phase push-pull inversion topological structure is adopted, the inductance value, the capacitance value of the Snubber capacitor, the dead time and the delay time are reasonably selected and matched, resonance between the inductance and the Snubber capacitor can be guaranteed, and then zero-voltage zero-current switching is realized in the working process of the inverter power supply switching tube, so that the current peak is greatly reduced. Compared with the existing driving scheme, the output current has fewer harmonics and higher efficiency.

In addition, the push-pull inverter circuit comprising the Snubber circuit has different connection modes according to different electrical characteristics of the connected motor. When the electromagnetic motor needs to be accessed, two-phase voltage of a push-pull inverter circuit comprising a Snubber circuit can be directly connected with the motor; when an ultrasonic motor or a piezoelectric transducer needs to be connected, two-phase voltage of a push-pull inverter circuit comprising a Snubber circuit is connected to the motor through a matching circuit. The push-pull inverter circuit comprising the Snubber circuit can be used in the design of various two-phase ultrasonic/piezoelectric sensor driving circuits, such as driving circuits of two-phase actuators of a rotary traveling wave ultrasonic motor, a linear traveling wave ultrasonic motor, a longitudinal-torsional composite ultrasonic motor, a two-phase electromagnetic motor, a piezoelectric sensor and the like, and has the advantages of high efficiency, low loss, low cost, stable performance, easiness in implementation and the like.

Drawings

FIG. 1 is a schematic diagram of a push-pull inverter circuit including a Snubber circuit;

FIG. 2 is an equivalent circuit diagram of a transformer and a piezoelectric device matching the inductance;

fig. 3 is a waveform diagram illustrating the control of a single-phase output voltage in the push-pull inverter circuit including the Snubber circuit shown in fig. 1.

Detailed Description