阅读说明：本技术 集成器件制造方法及相关产品 (Integrated device manufacturing method and related product ) 是由 樊永辉 曾学忠 樊晓兵 许明伟 于 2020-04-26 设计创作，主要内容包括：本申请实施例公开了一种集成器件制造方法及相关产品,所述集成器件包括至少一个磷化铟高电子迁移率晶体管(InP HEMT)和至少一个LC滤波器。制作方法包括：提供晶圆,并在所述晶圆上设置外延结构；针对所述外延结构执行InP HEMT制造工艺,同时制作电感和电容,形成滤波器。设置金属连线和/或空气桥以连接功率放大器与滤波器的电感和电容,形成功率放大器与滤波器的集成芯片。InP HEMT适用于制作基于InP HEMT的、应用于毫米波和太赫兹通信的功率放大器、低噪放大器以及射频开关。将不同的器件制作在同一芯片上,提高产品的集成度,减小产品尺寸,提升产品性能。(The embodiment of the application discloses a manufacturing method of an integrated device and a related product, wherein the integrated device comprises at least one indium phosphide high electron mobility transistor (InP HEMT) and at least one LC filter. The manufacturing method comprises the following steps: providing a wafer, and arranging an epitaxial structure on the wafer; and performing an InP HEMT manufacturing process on the epitaxial structure, and simultaneously manufacturing an inductor and a capacitor to form the filter. And arranging metal connecting wires and/or air bridges to connect the inductors and the capacitors of the power amplifier and the filter to form an integrated chip of the power amplifier and the filter. The InP HEMT is suitable for manufacturing power amplifiers, low-noise amplifiers and radio-frequency switches which are based on the InP HEMT and applied to millimeter wave and terahertz communication. Different devices are manufactured on the same chip, so that the integration level of the product is improved, the size of the product is reduced, and the performance of the product is improved.)

1. An integrated device manufacturing method applied to a device manufacturing system for manufacturing an integrated device integrating at least one indium phosphide high electron mobility transistor (InP HEMT) and at least one filter, the filter including a passive LC filter, the method comprising:

providing a wafer, and arranging an epitaxial structure on the wafer;

executing a preset InP HEMT manufacturing process aiming at the epitaxial structure of the InP HEMT to obtain the InP HEMT, and manufacturing an inductor and a capacitor to form a filter;

and arranging metal wires and/or air bridges to connect the InP HEMT and the filter to form an integrated device for integrating the InP HEMT and the LC filter.

2. The method of claim 1, further comprising:

the InP HEMT is used for manufacturing any one or more of the following devices: the low-noise amplifier based on the InP HEMT, the radio frequency switch based on the InP HEMT and the power amplifier based on the InP HEMT.

3. The method of claim 1, wherein performing the pre-designed InP HEMT fabrication process for the InP HEMT epitaxial structure comprises:

manufacturing a source electrode and a drain electrode above the epitaxial structure of the InP HEMT;

manufacturing an InP HEMT first passivation layer on the upper end face of the epitaxial structure of the InP HEMT, wherein the InP HEMT passivation layer comprises an insulating material;

etching the first passivation layer to manufacture a grid electrode above the epitaxial structure of the InP HEMT;

arranging a second passivation layer on the upper surface of the first passivation layer, wherein the second passivation layer covers the outer surfaces of the source electrode, the drain electrode and the grid electrode;

and arranging a first metal layer on the upper end surfaces of the source electrode and the drain electrode, and arranging a second metal layer above the first metal layer.

4. The method of claim 1, wherein the inductor and capacitor are fabricated to form the LC filter at the same time as the InP HEMT.

5. The method of claim 4, wherein the fabricating of the inductance of the LC filter comprises:

manufacturing a metal layer for the inductance winding on the passivation layer;

performing gluing, alignment, exposure, development and etching on the metal layer;

and removing the photoresist and cleaning the etched metal layer to obtain the inductor.

6. The method of claim 4, wherein the fabricating of the capacitance of the LC filter comprises:

manufacturing a capacitor lower electrode on the passivation layer;

manufacturing a capacitor dielectric layer, wherein the capacitor dielectric layer covers the outer surface of the lower electrode;

etching the capacitor dielectric layer to obtain a first through hole;

manufacturing an intermetallic insulating layer on the upper end face of the capacitor dielectric layer, and etching the intermetallic insulating layer to obtain a second through hole;

and arranging a first metal pin through the first through hole, and arranging a second metal layer and a second metal pin through the second through hole.

7. The method of claim 1, wherein the LC filter comprises a resistor, and wherein the resistor is fabricated by a method comprising:

manufacturing a thin film resistance layer above the passivation layer;

coating glue, aligning, exposing, developing and etching the thin film resistor layer;

and removing the photoresist and cleaning the etched thin film resistor layer to obtain the resistor.

8. An integrated device, wherein the integrated device integrates at least one indium phosphide high electron mobility transistor, InP HEMT, and at least one filter;

wherein, the InP HEMT is used for manufacturing any one or more of the following devices: the low-noise amplifier based on the InP HEMT, the radio-frequency switch based on the InP HEMT and the power amplifier based on the InP HEMT;

wherein the filter comprises a passive LC filter;

the device based on the InP HEMT and the filter share the same wafer as a substrate, if one end face of the wafer is taken as the upper end face of the wafer, and one end face of the wafer is taken as the lower end face of the wafer, the upper end face of the wafer is provided with an epitaxial structure, the InP HEMT is manufactured on the epitaxial layer, an inductor and a capacitor of the filter are manufactured, and a cross-over metal connecting wire and/or an air bridge connecting the InP HEMT and the filter are/is manufactured.

9. The integrated device of claim 8, wherein the InP HEMT includes a source, a drain, a gate, a first passivation layer, a second passivation layer, a first metal layer, and a second metal layer, wherein,

the source electrode and the drain electrode are located above the epitaxial structure of the InP HEMT, the first passivation layer is arranged on the upper end face of the epitaxial structure of the InP HEMT and comprises an insulating material, the grid electrode penetrates through the first passivation layer and is arranged on the upper end face of the epitaxial structure of the InP HEMT, and the second passivation layer is additionally arranged on the grid electrode.

10. The integrated device of claim 8, wherein the LC filter comprises at least one inductor and at least one capacitor, wherein,

each inductor in the at least one inductor comprises an inductor input end and an inductor output end, and each capacitor in the at least one capacitor comprises a capacitor upper electrode, a capacitor dielectric layer, a capacitor lower electrode, a first metal pin and a second metal pin;

wherein the at least one inductor is electrically connected with the at least one capacitor so that the filter meets pre-referred filtering requirements, the electrical connection comprising a metal interconnect and/or an air bridge connection.

11. The integrated device of claim 8, wherein the LC filter further comprises a resistor, wherein,

the resistor comprises a resistor input end and a resistor output end, and the resistor is electrically connected with the at least one inductor or the at least one capacitor through the resistor input end and the resistor output end;

wherein the electrical connection comprises a metal interconnect and/or an air bridge connection.

Technical Field

The present application relates to the field of wireless communications, and more particularly, to a method for manufacturing an integrated device and a related product.

Background

With the continuous development of communication technology, in 5G and future communications, radio frequency devices are widely applied, and the radio frequency devices relate to satellite communications, aerospace and national defense systems, and also include base stations, mobile phones and other various intelligent terminal devices. The frequency requirements for radio frequency devices are also increasing. The indium phosphide (InP) material has the advantages of high electron mobility, good radiation resistance, large forbidden band width and the like. Indium phosphide high electron mobility transistors (InP HEMTs) are used to fabricate devices such as power amplifiers, low noise amplifiers, radio frequency switches, etc. that implement millimeter wave and terahertz communications. Currently, various rf front-end chips, such as power amplifiers, filters, low noise amplifiers and rf switches, are manufactured by different manufacturers or manufactured by different product lines of the same company, and then integrated into one module at the packaging stage for the end user.

Disclosure of Invention

The embodiment of the application provides an integrated device manufacturing method and a related product, and a plurality of devices such as a filter and a power amplifier included in a radio frequency front end are integrated on the same chip, so that the size of the devices can be reduced, the manufacturing cost can be reduced, and the performance of the devices can be improved.

In a first aspect, embodiments of the present application provide an integrated device manufacturing method applied to a device manufacturing system for manufacturing an integrated device that integrates at least one indium phosphide high electron mobility transistor, InP HEMT, and at least one filter, the filter comprising a passive LC filter, the method comprising:

providing a wafer, and arranging an epitaxial structure on the wafer;

executing a preset InP HEMT manufacturing process aiming at the epitaxial structure of the InP HEMT to obtain the InPHEMT, and manufacturing an inductor and a capacitor to form a filter;

and arranging metal wires and/or air bridges to connect the InP HEMT and the filter to form an integrated device for integrating the InPHEMT and the LC filter.

In a second aspect, embodiments of the present application provide an integrated device that integrates at least one indium phosphide high electron mobility transistor, InP HEMT, and at least one filter;

wherein, the InP HEMT is used for manufacturing any one or more of the following devices: the low-noise amplifier based on the InP HEMT, the radio-frequency switch based on the InP HEMT and the power amplifier based on the InP HEMT;

wherein the filter comprises a passive LC filter;

the device based on the InP HEMT and the filter share the same wafer as a substrate, if one end face of the wafer is taken as the upper end face of the wafer, and one end face of the wafer is taken as the lower end face of the wafer, the upper end face of the wafer is provided with an epitaxial structure, the InP HEMT is manufactured on the epitaxial layer, an inductor and a capacitor of the filter are manufactured, and a cross-over metal connecting wire and/or an air bridge connecting the InP HEMT and the filter are/is manufactured.

In the embodiment of the present application, at least one indium phosphide high electron mobility transistor InPHEMT and at least one filter are integrated on the same chip and are manufactured at the same time, that is, one chip can integrate two or more devices in the radio frequency front end. Thereby greatly reducing the size of the device, improving the performance of the device and reducing the cost of the product. Furthermore, because the InP HEMT has the performances of high frequency, high power, low noise and radiation resistance, the InP HEMT is used for manufacturing devices with various functions of the radio frequency front end, such as a power amplifier, a low noise amplifier, a radio frequency switch and the like, and the performance of the radio frequency front end can be improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1A is a schematic structural diagram of a wireless communication system and a radio frequency front end module according to an embodiment of the present disclosure;

fig. 1B is a schematic structural diagram of a wafer integrating a plurality of devices according to an embodiment of the present disclosure;

fig. 2A is a schematic diagram of a method for manufacturing an integrated device according to an embodiment of the present disclosure;

fig. 2B is a schematic diagram of an epitaxial structure of an integrated device according to an embodiment of the present disclosure;

fig. 2C is a schematic diagram of a connection relationship between a transmitting channel and a receiving channel device according to an embodiment of the present disclosure;

fig. 2D is a schematic diagram illustrating a connection relationship between an integrated transmit channel device and a receive channel device according to an embodiment of the present disclosure;

FIG. 2E is a schematic diagram illustrating connection relationships among devices in a multi-channel system according to an embodiment of the present disclosure;

FIG. 2F is a schematic diagram of the connection relationship of devices in another multi-channel system provided by the embodiments of the present application;

fig. 2G is a schematic diagram of a wafer integrating a plurality of rf front-end devices according to an embodiment of the present disclosure;

fig. 2H is a schematic diagram of an InP HEMT manufacturing process provided in an embodiment of the present application;

FIG. 2I-1 is a schematic structural diagram of a metal layer of an inductor according to an embodiment of the present disclosure;

fig. 2I-2 is a schematic diagram of a developed metal layer structure of an inductor according to an embodiment of the present disclosure;

fig. 2I-3 are schematic structural diagrams of a metal layer after etching of an inductor according to an embodiment of the present disclosure;

fig. 2I-4 are schematic structural diagrams of an inductor according to embodiments of the present disclosure;

FIG. 2J-1 is a schematic diagram of a method for fabricating a lower electrode of a capacitor according to an embodiment of the present disclosure;

fig. 2J-2 is a schematic structural diagram of a MIM capacitor dielectric layer according to an embodiment of the present disclosure;

FIGS. 2J-3 are schematic diagrams illustrating the fabrication of an inter-metal dielectric (IMD) layer according to embodiments of the present disclosure;

2J-4 are schematic structural diagrams of a capacitor provided by an embodiment of the present application;

FIG. 2K is a diagram of a thin film resistor according to an embodiment of the present disclosure;

FIG. 2L-1 is a schematic diagram of a method for forming a resistive thin film resistor layer according to an embodiment of the present disclosure;

FIG. 2L-2 is a schematic structural diagram of a developed thin resistive layer according to an embodiment of the present disclosure;

2L-3 is a schematic structural diagram of an etched thin resistive layer according to an embodiment of the present disclosure;

2L-4 is a schematic structural diagram of a resistor provided in an embodiment of the present application;

fig. 2M is a schematic diagram of an integrated device overall manufacturing process provided by an embodiment of the present application;

fig. 2N is a schematic diagram of an overall manufacturing process of another integrated device provided in the embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

With the continuous development of information technology, in order to better meet the requirements of next-generation communication technology, the design requirements on the radio frequency front end of wireless communication are higher and higher. First, please refer to fig. 1A for a schematic structural diagram of a wireless communication system and a radio frequency front end module. The wireless communication system comprises a baseband chip, a transceiver, an antenna and a radio frequency front end module. The rf front-end module includes an rf switch, a low noise amplifier LNA, a power amplifier PA, and a duplexer (filter), which refers to FDD (frequency division duplex) including a receiving filter and a transmitting filter, and the receiving and transmitting frequencies are different. Of course, TDD (time division duplex) may also be adopted, and the receiving and transmitting functions are implemented by using the same filter, and the receiving and transmitting frequencies are the same.

Currently, various rf front-end chips, such as power amplifiers, filters, low noise amplifiers and rf switches, are manufactured by different manufacturers or manufactured by different product lines of the same company, and then integrated into one module at the packaging stage for the end user. The 5G communication puts higher demands on integration and miniaturization of the communication system. The embodiment of the application provides a manufacturing method of an integrated device, which is applied to a device manufacturing system and integrates two or more chips at a radio frequency front end on the same chip, as shown in fig. 1B. The wafer on the left part (a) of the figure is a chip on which various integrated schemes of various wireless communication radio frequency front ends, such as power amplifiers, filters (duplexers), low noise amplifiers, radio frequency switches, and the like, are manufactured. The specific scheme may be integration of any two devices, may include all the devices, and may be any combination of the devices. Each device may be one or more. Taking the right part (b) of the figure as an example, the circuit connection relationship of each part can be as shown in the right part (b) of the figure, wherein the power amplifier is connected with the transmitting filter, the low noise amplifier is connected with the receiving filter, and then the low noise amplifier is respectively connected with the radio frequency switch. If the wafer integrates other devices, the connection relationship of each part is adjusted by referring to the mode adaptation.

The following detailed description is made with reference to the accompanying drawings.

Referring first to fig. 2A, a flow chart of a method for manufacturing an integrated device is shown, which may include, but is not limited to, the following steps:

201. a wafer is provided, and an epitaxial structure is disposed on the wafer.

Specifically, the specific epitaxial structure disposed on the wafer is to meet the functional requirements of the InP HEMT. The wafer is an indium phosphide substrate, and the substrate can be 2-6 inches (50-150mm) in size. The initial thickness of the wafer is 0.3-1mm, and the thickness is generally 20-150um after the fabrication.

The specific implementation manner of disposing the epitaxial structure on the wafer may be performed by an MOCVD (metal organic chemical vapor deposition) method or an MBE (molecular beam epitaxy) method.

Wherein an epitaxial structure is disposed on the wafer, comprising: arranging a buffer layer or a transition layer on the wafer; arranging a channel layer on the upper end surface of the buffer layer or the transition layer; disposing a barrier layer over a channel layer, the channel layer forming a heterojunction with the barrier layer and generating a high-mobility two-dimensional electron gas; and arranging a cap layer on the upper end face of the barrier layer.

Specifically, before the channel layer is formed, some thin film layers for absorbing stress and realizing lattice matching are usually formed as buffer layers or transition layers. In this example, the material of the transition layer is InAlAs, the thickness is varied from 0.5 um to 1um, and the specific thickness is not specifically limited. The Channel layer (Channel) is InGaAs and typically 5-20nm thick, and a Barrier layer (Barrier) is provided over the Channel to form a heterojunction with the Channel layer and to generate a high mobility two-dimensional electron gas (2 DEG). In this example the barrier layer is InAlAs, and has a thickness of between 5-20 nm. The barrier layer may also be doped, typically n-type doped, to increase the concentration of the two-dimensional electron gas and reduce the ohmic contact resistance. The barrier layer may also have a doped Cap layer (Cap layer) thereon, such as an n-type doped InAlAs/InGaAs, having a thickness of 2-10 nm. The epitaxial layer may also have other structures such as a composite channel layer and barrier layer.

In addition, a barrier layer is arranged on the channel layer, optionally, the barrier layer is arranged on the upper end surface of the channel layer, and the channel layer and the barrier layer form a heterojunction and generate two-dimensional electron gas with high mobility; or, optionally, an isolation layer (Spacer) is disposed on an upper end surface of the channel layer, and a barrier layer is disposed on an upper end surface of the isolation layer, and the channel layer and the barrier layer form a heterojunction and generate a two-dimensional electron gas with high mobility. The isolation layer may be undoped InAlAs with a thickness of 0.5-10nm to further increase the concentration of the two-dimensional electron gas, and the epitaxial layer structure is formed as shown in fig. 2B.

202. And executing a preset InP HEMT manufacturing process aiming at the epitaxial structure of the InP HEMT to obtain the InPHEMT, and manufacturing an inductor and a capacitor to form a filter.

Specifically, the epitaxial structure of the InP HEMT is manufactured into a specific epitaxial structure on one end face of a wafer in order to meet the functional requirements and the process requirements of the InP HEMT. The epitaxial structure is as described above and will not be described in detail herein. And performing a preset InP HEMT manufacturing process for the epitaxial structure of the InPHEMT, such as manufacturing a grid electrode, a source electrode, a drain electrode and the like. The LC filter is also formed by performing a predetermined InP HEMT manufacturing process to obtain the InP HEMT and also by simultaneously manufacturing an inductor and a capacitor.

203. And arranging metal wires and/or air bridges to connect the InP HEMT and the filter to form an integrated device for integrating the InPHEMT and the LC filter.

Specifically, after the InP HEMT and the filter are manufactured, a metal connecting wire is arranged to connect the relevant components included in the InP HEMT and the filter; or an air bridge is arranged to connect the related components contained in the two components; or, according to the process requirement, both the metal connecting wire and the air bridge are arranged to connect the related components contained in the metal connecting wire and the air bridge.

In the embodiment of the application, at least one indium phosphide high electron mobility transistor InP HEMT and at least one filter are integrated on the same chip and are manufactured at the same time, namely, one chip can integrate two or more devices of a radio frequency front end. Thereby greatly reducing the size of the device, improving the performance of the device and reducing the cost of the product.

In one possible embodiment, the InP HEMT is used to fabricate any one or more of: the low-noise amplifier based on the InP HEMT, the radio frequency switch based on the InP HEMT and the power amplifier based on the InP HEMT.

Specifically, it can be understood that, due to the characteristics of the InP HEMT, a variety of devices such as a power amplifier, a low noise amplifier, and an rf switch can be fabricated at the rf front end. The integrated device may be as shown in fig. 1B, and may integrate a power amplifier and a filter of the radio frequency front end, and optionally further include a low noise amplifier and a radio frequency switch. And all the components of the integrated device are connected in a circuit according to the requirement of radio frequency front-end communication. As shown in fig. 2C, if the filter is a fdd filter, the transmit channel is connected to the transceiver and the antenna after the power amplifier is connected to the transmit filter; the receiving channel is formed by connecting a low-noise amplifier with a receiving filter and then connecting the receiving filter with a transceiver and an antenna; the devices in the connected relationship shown in fig. 2C are then combined into a device in the connected relationship shown in fig. 2D.

Further, in the case of a multi-channel system, there are multiple transmit channels and multiple receive channels. As shown in fig. 2E, the transmit path portion is a power amplifier with multiple switches and multiple filters. In the reception channel section, the low-noise amplifier uses an InP HEMT as a reception channel of the LNA. In fig. 2E, 8 channels are shown, with 8 filters and 16 switches for the receive and transmit channels, respectively. The 8 filters are 8 LC filters with different frequencies, and the 16 switches are 16 InP HEMT transistors.

In addition, as shown in fig. 2F, in the transmission channel, the InP HEMT-based rf switch between the power amplifier and the filter may be eliminated, and instead, an equal number of InP HEMT-based power amplifiers may be used; in the receive path, the InP HEMT-based radio frequency switch is replaced by an equal number of InP HEMT-based Low Noise Amplifiers (LNAs). In addition, the multi-channel system in fig. 2E or fig. 2F may integrate the integrated device as shown in fig. 2G, and the completed wafer in fig. 2G (a) integrates the rf front-end device in part (b).

Therefore, a plurality of or all elements are integrated on the same chip, and the purposes of reducing the size of the device, reducing the cost and improving the performance can be achieved. Furthermore, because the InP HEMT has the performances of high frequency, high power, low noise and radiation resistance, the InP HEMT is used for manufacturing devices with various functions of the radio frequency front end, such as a power amplifier, a low noise amplifier, a radio frequency switch and the like, and the performance of the radio frequency front end can be improved.

In one possible embodiment, the performing the predetermined InP HEMT fabrication process for the epitaxial structure of the InP HEMT comprises: manufacturing a source electrode and a drain electrode above the epitaxial structure of the InP HEMT; manufacturing an InP HEMT first passivation layer on the upper end face of the epitaxial structure of the InP HEMT, wherein the InP HEMT passivation layer comprises an insulating material; etching the first passivation layer to manufacture a grid electrode above the epitaxial structure of the InP HEMT; arranging a second passivation layer on the upper surface of the first passivation layer, wherein the second passivation layer covers the outer surfaces of the source electrode, the drain electrode and the grid electrode; and arranging a first metal layer on the upper end surfaces of the source electrode and the drain electrode, and arranging a second metal layer above the first metal layer.

Specifically, as shown in fig. 2H, the source and drain electrodes may be directly formed on the surface of the epitaxial layer, or a groove may be etched first. The source (S) and drain (D) are typically a combination of several metals alloyed by high temperature annealing to reduce resistance. These metals include Ti, Al, Ni, Au, which are typically deposited layer by layer onto the wafer by metal evaporation or sputtering. After the annealing process, a first passivation layer, typically silicon nitride (Si), is formed₃N₄) Or silicon oxide (SiO)₂). When the grid (G) is manufactured, the first passivation layer silicon nitride passivation layer of the grid potential is etched firstly, then a groove is etched on the epitaxial layer, and then metal is manufactured in the groove. The grid may be rectangular, T-shaped or Y-shaped in shape. The gate is generally made of metal such as Ni, Au, Pt, Ti, Al, etc. and is deposited on the wafer layer by a metal evaporation or sputtering method. A first metal layer may be disposed on the upper end surfaces of the source electrode and the drain electrode, and a second metal layer may be disposed above the first metal layer. An inter-metal dielectric layer may be disposed between the first metal layer and the second metal layer.

Therefore, when the InP HEMT is manufactured, in addition to the components for protecting the InP HEMT, such as the source, the drain, and the gate of the InP HEMT, the first metal layer and the second metal layer are provided to facilitate connection between the components.

And when the InP HEMT is manufactured, executing the preset filter manufacturing process to obtain the LC filter consisting of the inductor and the capacitor.

In particular, it is understood that the LC filter is composed of an inductor and a capacitor. The inductor is made of metal winding wires and can be a square winding, a circular winding or other shapes. The inductance metal can be made of Au, Al, Cu, Fe, Ni or the like or alloy, and the shape of the metal conductor can be round or square. In semiconductor processing, the shape of the metal conductors is generally square or rectangular, and the thickness, width, number of turns, and spacing are determined by the specific design and application. The input and output ports may be formed by etching through holes and forming metal wiring, or may be formed by connecting the inner port to the periphery of the winding by other means, such as an air bridge process.

The other electronic component of the LC filter is a capacitor. In semiconductor processes, MIM (metal-dielectric-metal) structures are generally employed. The shape of the capacitor is also various, and in the semiconductor process, a square or a rectangle is generally adopted. The capacitor dielectric is typically silicon nitride or silicon oxide, but may be other dielectric materials, such as aluminum oxide, hafnium oxide, zirconium oxide, hafnium silicate, zirconium silicate, and other dielectric constant dielectrics to further increase the capacitor density. The metal electrode material is generally Au, Al, Cu, and may be other metals or alloys. The thickness of the dielectric and metal, and the size and shape of the capacitor are determined by the particular application and design. Different frequency ranges of the filter are realized by designing different sizes of inductors and capacitors.

Therefore, the specific structure, shape, size and material of the capacitor and the inductor of the LC filter are determined by the specific application and design of the LC filter, so that the LC filter has different frequency ranges, and the application scenes of the LC filter are effectively increased.

In one possible embodiment, the inductor and capacitor are fabricated to form an LC filter at the same time as the InP HEMT.

Specifically, it is understood that after the structure of the integrated device is designed, all devices included in the integrated device can be simultaneously manufactured. For example, if the integrated device includes an InP HEMT-based power amplifier and filter, then both types of devices are fabricated simultaneously. Of course, the integrated device may also integrate devices as shown in fig. 2D or fig. 2G, as previously described.

Therefore, when the device contained in the integrated device is manufactured, a plurality of devices are manufactured at the same time, and the manufacturing efficiency can be improved.

In one possible embodiment, the manufacturing of the inductance of the LC filter includes: manufacturing a metal layer on the passivation layer; performing gluing, alignment, exposure and development etching on the metal layer; and removing the photoresist and cleaning the etched metal layer to obtain the inductor.

Specifically, in the semiconductor process, the inductor is formed on the second passivation layer, and the metal winding is formed by the first metal layer M1 and is formed simultaneously with M1. The inductor can also be manufactured on the surface of the epitaxial layer, and the metal winding is composed of ohmic contacts and is manufactured with the source and drain ohmic contacts at the same time. Further, the inductor can also be fabricated on an inter-metal dielectric (IMD) layer, and the metal winding is formed of a second metal layer M2, fabricated at the same time as M2. Furthermore, when needed, the three layers of surfaces can be simultaneously manufactured, and the metal windings are respectively composed of ohmic contacts, M1 and M2, so that the purpose of reducing the size of the chip is achieved. There are various ways to fabricate the inductor, such as etching, metal stripping, etc., and the etching method will now be described. Taking the example of forming the inductor on the intermetallic electrolyte layer, a metal layer is first formed, which may be formed by vacuum evaporation or sputter deposition, such as the metal deposition shown in fig. 2I-1; secondly, as shown in FIG. 2I-2, glue spreading, alignment, exposure and development are carried out; thirdly, as shown in FIG. 2I-3, metal etching is carried out; finally, the photoresist is removed and cleaned as shown in FIGS. 2I-4.

In one possible embodiment, the manufacturing of the capacitance of the LC filter includes: manufacturing a lower electrode on the passivation layer; manufacturing a capacitor dielectric layer, wherein the capacitor dielectric layer covers the outer surface of the lower electrode; etching the capacitor dielectric layer to obtain a first through hole; manufacturing an intermetallic insulating layer on the upper end face of the capacitor medium, and etching the intermetallic insulating layer to obtain a second through hole; and arranging a first metal pin through the first through hole, and arranging a second metal layer and a second metal pin through the second through hole.

Specifically, the capacitor is an MIM capacitor, and the manufacturing process thereof is as follows: as shown in fig. 2J-1, a first metal layer can be formed on the substrate as the lower electrode of the capacitor. Like the inductor, the first metal layer can be formed by etching or metal stripping. And manufacturing a capacitor lower electrode on the passivation layer, wherein the first metal layer can be manufactured on the upper end surface of the epitaxial layer, the upper end surface of the second passivation layer or the upper end surface of the intermetallic electrolyte layer. The capacitor dielectric layer (i.e., MIM dielectric layer) is typically formed by a chemical deposition (CVD) process. As shown in fig. 2J-2, and etching a first Via (Via 1); manufacturing an Inter-Metal Dielectric (IMD), and etching a second Via (Via 2), as shown in FIG. 2J-3; a second metal layer or top electrode is formed and the first metal line is formed, as shown in fig. 2J-4. The inter-metal dielectric layer (IMD) may be Polyimide (PI) or benzocyclobutene (BCB), or may be silicon nitride or silicon oxide.

In one possible embodiment, the LC filter includes a resistor, and the method of manufacturing the resistor includes: manufacturing a thin film resistance layer above the passivation layer; coating glue, aligning, exposing, developing and etching the thin film resistor layer; and removing the photoresist and cleaning the etched thin film resistor layer to obtain the resistor.

Specifically, the resistance may be a Thin Film resistance (TFR-Thin Film Resistor), as shown in fig. 2K. The thin film resistor can be fabricated by various methods, such as etching, metal stripping, etc., and the etching method will be described. Firstly, a thin film resistance layer can be manufactured by vacuum evaporation, sputtering or chemical deposition and other methods, as shown in FIG. 2L-1; secondly, as shown in FIG. 2L-2, glue spreading, alignment, exposure and development are carried out; thirdly, as shown in FIG. 2L-3, performing thin film resistor etching; finally, as shown in FIG. 2L-4, the photoresist is removed and cleaned. The material of the thin film resistor includes Ni-Co, Ta, Si, cermet, Au-Cr, Ni-P, and the like, and NiCr, TaN, and the like are commonly used.

Therefore, in the manufacturing process of the LC filter, a thin film resistor can be manufactured according to the design requirement.

Optionally, the manufacturing method of the integrated device further includes a wafer back processing process: thinning and polishing a wafer bonded wafer, debonding the wafer and cleaning the wafer. The purpose is to make a back hole to realize that part of the element is grounded from the back of the wafer.

Referring next to the integrated device provided in the embodiments of the present application, the integrated device integrates at least one indium phosphide high electron mobility transistor InP HEMT and at least one filter;

wherein, the InP HEMT is used for manufacturing any one or more of the following devices: the low-noise amplifier based on the InP HEMT, the radio-frequency switch based on the InP HEMT and the power amplifier based on the InP HEMT;

wherein the filter comprises a passive LC filter;

the device based on the InP HEMT and the filter share the same wafer as a substrate, if one end face of the wafer is taken as the upper end face of the wafer, and one end face of the wafer is taken as the lower end face of the wafer, the upper end face of the wafer is provided with an epitaxial structure, the InP HEMT is manufactured on the epitaxial layer, an inductor and a capacitor of the filter are manufactured simultaneously, and a jumper metal connecting wire and/or an air bridge connecting the InP HEMT and the filter are/is manufactured.

Optionally, as shown in fig. 2M, the LC filter in the integrated device shown further comprises a resistor.

In addition, the InP HEMT may further include a back hole, and a top end face of the back hole is a lower end face of the source electrode; and arranging metal on the InP HEMT edge at the inner side of the back hole to form a back hole metal layer of the power amplifier, and arranging metal on a preset area of the lower end surface of the wafer to form a back metal layer of the InP HEMT. The source of the InP HEMT is connected to the back metal through the back hole metal layer and grounded.

It can be seen that the integrated device in the embodiment of the present application integrates at least one indium phosphide high electron mobility transistor InPHEMT and at least one filter. The devices share the same wafer as a substrate, and the InP HEMT and the filter are connected by a bridging metal connecting wire and/or an air bridge, so that the size and the cost of the devices are reduced, the manufacturing process is simplified, and the manufacturing efficiency of the devices is improved while the performance of each device is ensured to be met. And the InP HEMT is used for manufacturing a low-noise amplifier based on the InP HEMT, a radio-frequency switch based on the InP HEMT, a power amplifier based on the InP HEMT and the like, so that the integration level and the device performance of the radio-frequency front-end device are further improved.

In one possible example, the InP HEMT includes a source electrode, a drain electrode, a gate electrode, a first passivation layer, a second passivation layer, a first metal layer and a second metal layer, wherein the source electrode and the drain electrode are located above an epitaxial structure of the InP HEMT, the first passivation layer is disposed on an upper end face of the epitaxial structure of the InP HEMT, the first passivation layer includes an insulating material, the gate electrode is disposed on the upper end face of the power amplifier epitaxial structure through the first passivation layer, and the second passivation layer is added on the gate electrode.

In one possible example, the LC filter includes at least one inductor and at least one capacitor, wherein each inductor of the at least one inductor includes an inductor input terminal and an inductor output terminal, and each capacitor of the at least one capacitor includes a capacitor upper electrode, a capacitor dielectric layer, a capacitor lower electrode, a first metal pin and a second metal pin; wherein the at least one inductor is electrically connected with the at least one capacitor so that the filter meets pre-referred filtering requirements, the electrical connection comprising a metal interconnect and/or an air bridge connection.

Wherein the at least one inductor and the at least one capacitor are electrically connected in a manner that includes at least one of:

the input end of the at least one inductor is connected with the InPHEMT, and the output end of the at least one inductor is connected with the upper electrode of the capacitor;

the output end of the at least one inductor is connected with the input ends of other inductors in the at least one inductor;

the output end of the at least one inductor is grounded;

the lower electrode of the at least one capacitor is connected with the input end of the at least one inductor;

the lower electrode of the at least one capacitor is connected with the upper electrode of the at least one capacitor;

the lower electrode of the at least one capacitor is grounded. In addition, the specific connection relation of all devices in the integrated device through metal interconnection or through air bridge connection is adjusted according to specific design so as to meet the communication requirement. For example, the input end and the output end of one component are connected, and the output end is grounded through a metal wire, or is grounded through ohmic contact, or is connected with the input end of another component, and the like.

In addition, the inductor or the capacitor of the filter is grounded, a back hole can be made below the inductor and the capacitor of the LC filter, the port to be grounded is connected to the back metal and grounded, and the specific port to be grounded depends on the specific design scheme of the filter, for example, different ports of the filter are grounded according to whether the filter is a low-pass filter, a high-pass filter, a band-pass filter or a band-stop filter, so that the functional requirements of the filter are met. In the case where back holes are made below the inductor and capacitor of the LC filter and the port to be grounded is connected to the back metal and grounded, only one port of the inductor and capacitor or resistor needs to be connected to the second metal layer (M2), and the process flow is changed accordingly. For example, ohmic contacts should also be made under the grounded capacitance and inductance, which can be made simultaneously with the source and drain ohmic contacts. The resulting integrated device is shown in fig. 2N, where the example in fig. 2N does not include a thin film resistor, but may include a thin film resistor, and other devices in the rf front end, and so on.

In one possible example, the LC filter further comprises a resistor, wherein the resistor comprises a resistor input terminal and a resistor output terminal, and the resistor is electrically connected with at least one inductor or the at least one capacitor through the resistor input terminal and the resistor output terminal; wherein the electrical connection comprises a metal interconnect and/or an air bridge connection.

The above embodiments are described in detail, and the principles and embodiments of the integrated device manufacturing method of the present application are described herein by using specific examples, and the description of the above embodiments is only used to help understand the method and its core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the integrated device manufacturing method of the present application, there may be variations in the specific implementation and application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

While the present disclosure has been described with reference to particular embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure.