阅读说明：本技术 一种交叉双pv源输入级联多电平逆变器电路 (Cross double-PV-source input-stage-connected multi-level inverter circuit ) 是由 阿拉丁·穆斯塔法·穆罕默德·哈森 李小腾 周永兴 陈文洁 杨旭 戴立宇 王睿 于 2020-05-15 设计创作，主要内容包括：本发明公开了一种交叉双PV源输入级联多电平逆变器电路,采用九个开关管连接形成交叉双PV源输入级联多电平逆变器电路拓扑结构,不需要额外电容,可以兼容多种新能源的同时接入,通过对单个拓扑结构的级联,可以得到高的输出电压和输出功率,同时总谐波畸变也会明显改善,适用于多种新能源发电系统的混合使用,结构简单。采用多个多电平逆变器电路级联,拓展了多电平逆变器电路的输出电平数目以及高功率应用场合的需求,在级联结构下,功率等级会有所提高,总谐波畸变会显著减小,增加了系统的可靠性和减小滤波元件的数目和体积。(The invention discloses a cross double-PV-source input-stage-connected multi-level inverter circuit, which adopts nine switching tubes to be connected to form a cross double-PV-source input-stage-connected multi-level inverter circuit topological structure, does not need additional capacitance, can be compatible with simultaneous access of various new energy sources, can obtain high output voltage and output power through the cascade connection of a single topological structure, can obviously improve the total harmonic distortion, is suitable for the mixed use of various new energy power generation systems, and has simple structure. The cascade connection of a plurality of multi-level inverter circuits is adopted, the output level number of the multi-level inverter circuits and the requirements of high-power application occasions are expanded, the power level is improved, the total harmonic distortion is obviously reduced, the reliability of the system is improved, and the number and the size of filter elements are reduced.)

1. A cross double-PV-source input-stage multi-level inverter circuit is characterized by comprising a first switch tube Qa, a second switch tube Qb, a third switch tube Qc, a fourth switch tube Qd, a fifth switch tube Q1, a sixth switch tube Q2, a seventh switch tube Q3, an eighth switch tube Q4 and a ninth switch tube Q5;

the collector c of the fifth switching tube Q1, the emitter e of the sixth switching tube Q2, the collector c of the eighth switching tube Q4 and the collector c of the ninth switching tube Q5 are connected with a second direct current power supply V_dc2One connecting electrode of (1); the collector c of the seventh switching tube Q3, the emitter e of the third switching tube Qc and the emitter e of the fourth switching tube Qd are connected with a second direct current power supply V_dc2The other is connected with the electrode;

the emitter e of the fifth switching tube Q1, the collector c of the first switching tube Qa and the collector c of the second switching tube Qb are connected to a first direct current power supply V_dc1One connecting electrode of (1); the collector c of the sixth switching tube Q2 and the emitter e of the seventh switching tube Q3 are connected with a first direct current power supply V_dc1The other is connected with the electrode;

an emitter e of the first switching tube Qa, an emitter e of the eighth switching tube Q4 and a collector c of the third switching tube Qc are connected with the positive electrode of the output end; the emitter e of the second switch tube Qb, the emitter e of the ninth switch tube Q5 and the collector c of the fourth switch tube Qd are connected to the negative electrode of the output terminal.

2. The cross-coupled dual-PV-source input-stage multilevel inverter circuit of claim 1, wherein the first switch tube Qa, the second switch tube Qb, the third switch tube Qc, the fourth switch tube Qd, the fifth switch tube Q1, the sixth switch tube Q2 and the seventh switch tube Q3 are all IGBT field effect tubes with damping diodes.

3. The cross-coupled double-PV-source input-stage multi-level inverter circuit as claimed in claim 1, wherein the eighth switching transistor Q4 and the ninth switching transistor Q5 are N-type IGBT fets.

4. The cross-coupled dual PV source input stage multi-level inverter circuit of claim 1, wherein the negative output terminals of one of the multi-level inverter circuits are connected to the positive output terminals of the other multi-level inverter circuit to form a cascade topology, wherein the positive output terminals of one of the multi-level inverter circuits are positive output terminals of the cascade topology, and the negative output terminals of the other multi-level inverter circuit are negative output terminals of the cascade topology.

5. The cross-coupled double-PV-source input-stage-coupled multilevel inverter circuit according to claim 1, wherein the negative poles of the output terminals of the multiple multilevel inverters are connected with the positive poles of the output terminals in sequence to form a multilevel cascade topology.

Technical Field

The invention belongs to the field of power electronic research, and particularly relates to a cross double-PV-source input-stage-connected multi-level inverter circuit.

Background

In recent years, multi-level inverters (MLIs) have been favored by many scholars, and have attracted much attention in the industrial field.

A series of advantages of MLIs are attributed to its own features: the reduction of Total Harmonic Distortion (THD) and the more excellent electromagnetic compatibility characteristics of the multi-level operation, which in turn, affect the whole system, thus improving the efficiency and stability of the whole system. Meanwhile, the multilevel operation of the multilevel inverter can reduce the stress on the switching devices, thereby reducing the switching loss of the switching devices and optimizing the overall efficiency characteristic. However, the multi-level inverter adopted in the new energy application fields of wind power generation, photovoltaic power generation and the like at present adopts a single-topology module structure, cannot adapt to the reliability of new energy power generation systems of wind power generation, photovoltaic power generation and the like, adopts a multi-topology structure, needs additional capacitance circuit assistance, and is complex in structure and poor in stability.

Disclosure of Invention

The invention aims to provide a cross double-PV-source input-stage cascade multilevel inverter circuit to overcome the defects of the prior art.

In order to achieve the purpose, the invention adopts the following technical scheme:

a cross double-PV-source input-stage-connected multi-level inverter circuit comprises a first switching tube Qa, a second switching tube Qb, a third switching tube Qc, a fourth switching tube Qd, a fifth switching tube Q1, a sixth switching tube Q2, a seventh switching tube Q3, an eighth switching tube Q4 and a ninth switching tube Q5;

the collector c of the fifth switching tube Q1, the emitter e of the sixth switching tube Q2, the collector c of the eighth switching tube Q4 and the collector c of the ninth switching tube Q5 are connected with a second direct current power supply V_dc2One connecting electrode of (1); the collector c of the seventh switching tube Q3, the emitter e of the third switching tube Qc and the emitter e of the fourth switching tube Qd are connected with a second direct current power supply V_dc2The other is connected with the electrode;

the emitter e of the fifth switching tube Q1, the collector c of the first switching tube Qa and the collector c of the second switching tube Qb are connected to a first direct current power supply V_dc1One connecting electrode of (1); the collector c of the sixth switching tube Q2 and the emitter e of the seventh switching tube Q3 are connected with a first direct current power supply V_dc1The other is connected with the electrode;

an emitter e of the first switching tube Qa, an emitter e of the eighth switching tube Q4 and a collector c of the third switching tube Qc are connected with the positive electrode of the output end; the emitter e of the second switch tube Qb, the emitter e of the ninth switch tube Q5 and the collector c of the fourth switch tube Qd are connected to the negative electrode of the output terminal.

Further, the first switch tube Qa, the second switch tube Qb, the third switch tube Qc, the fourth switch tube Qd, the fifth switch tube Q1, the sixth switch tube Q2 and the seventh switch tube Q3 are all IGBT field-effect transistors with a damping diode.

Further, the eighth switching transistor Q4 and the ninth switching transistor Q5 are N-type IGBT fets.

Furthermore, the cathode of the output end of one of the multi-level inverter circuits is connected with the anode of the output end of the other multi-level inverter circuit to form a cascade topology structure, the anode of the output end of one of the multi-level inverter circuits is the anode of the output end of the cascade topology structure, and the cathode of the output end of the other multi-level inverter circuit is the cathode of the output end of the cascade topology structure.

Furthermore, the negative electrodes of the output ends of the multi-level inverters are sequentially connected with the positive electrodes of the output ends to form a multi-stage cascade topology structure.

Compared with the prior art, the invention has the following beneficial technical effects:

the invention relates to a cross double-PV-source input-stage-connected multi-level inverter circuit, which adopts nine switching tubes to be connected to form a cross double-PV-source input-stage-connected multi-level inverter circuit topological structure, does not need additional capacitors, can be compatible with simultaneous access of various new energy sources, can obtain high output voltage and output power by cascading a single topological structure, can obviously improve total harmonic distortion, is suitable for mixed use of various new energy power generation systems, and has a simple structure.

Furthermore, a plurality of multi-level inverter circuits are cascaded, the output level number of the multi-level inverter circuits and the requirements of high-power application occasions are expanded, the power level is improved, the total harmonic distortion is obviously reduced, the reliability of the system is improved, and the number and the size of filter elements are reduced.

Drawings

Fig. 1 is a circuit diagram of a multilevel inverter according to an embodiment of the present invention.

Fig. 2 is a schematic diagram of different switch operation modes of the multilevel inverter circuit according to the embodiment of the invention.

FIG. 3 is a schematic diagram of sinusoidal pulse width modulation and corresponding switching tube gate drive signals used in an embodiment of the present invention.

Fig. 4 is a cascaded structure of two multilevel inverter circuit topology blocks in an embodiment of the invention.

Fig. 5 shows a control strategy under a cascade structure of two multilevel inverter circuit topology modules according to an embodiment of the present invention.

Fig. 6 is an output voltage waveform of an inverter simulated in MATLAB/SIMULINK software in an embodiment of the present invention.

Fig. 7 is a graph of simulated output voltage and current waveforms for a single inverter under resistive load in an embodiment of the present invention.

Fig. 8 is a voltage waveform simulated under the cascade structure in the embodiment of the present invention.

Fig. 9 shows simulated voltage and current waveforms of a resistor load in a cascade structure according to an embodiment of the present invention.

Detailed Description

The invention is described in further detail below with reference to the accompanying drawings:

as shown in fig. 1, a cross-coupled dual PV source input stage multilevel inverter circuit includes a first switch tube Qa, a second switch tube Qb, a third switch tube Qc, a fourth switch tube Qd, a fifth switch tube Q1, a sixth switch tube Q2, a seventh switch tube Q3, an eighth switch tube Q4, and a ninth switch tube Q5;

the collector c of the fifth switching tube Q1, the emitter e of the sixth switching tube Q2, the collector c of the eighth switching tube Q4 and the collector c of the ninth switching tube Q5 are connected with a second direct current power supply V_dc2One connecting electrode of (1); the collector c of the seventh switching tube Q3, the emitter e of the third switching tube Qc and the emitter e of the fourth switching tube Qd are connected with a second direct current power supply V_dc2The other is connected with the electrode;

the emitter e of the fifth switching tube Q1, the collector c of the first switching tube Qa and the collector c of the second switching tube Qb are connected to a first direct current power supply V_dc1One connecting electrode of (1); the collector c of the sixth switching tube Q2 and the emitter e of the seventh switching tube Q3 are connected with a first direct current power supply V_dc1The other is connected with the electrode;

an emitter e of the first switching tube Qa, an emitter e of the eighth switching tube Q4 and a collector c of the third switching tube Qc are connected with the positive electrode of the output end; the emitter e of the second switch tube Qb, the emitter e of the ninth switch tube Q5 and the collector c of the fourth switch tube Qd are connected to the negative electrode of the output terminal.

The first switch tube Qa, the second switch tube Qb, the third switch tube Qc, the fourth switch tube Qd, the fifth switch tube Q1, the sixth switch tube Q2 and the seventh switch tube Q3 are all IGBT field effect tubes with damping diodes; the eighth switch tube Q4 and the ninth switch tube Q5 are N-type IGBT field effect tubes.