阅读说明：本技术 混合升压转换器 (Hybrid boost converter ) 是由 傅电波 陈东 于 2018-09-19 设计创作，主要内容包括：一种转换器包括：第一开关组件和第二开关组件,所述第一开关组件和所述第二开关组件耦合在输入电源与输出电容器之间；以及电感器,所述电感器耦合到所述第一开关组件和所述第二开关组件的公共节点,其中所述第二开关组件包括：第一二极管和第一开关,所述第一二极管和所述第一开关串联连接在所述第二开关组件的第一端子与第二端子之间；以及第二二极管,所述第二二极管连接在所述第二开关组件的所述第一端子与所述第二端子之间。(A converter includes: a first switching component and a second switching component coupled between an input power source and an output capacitor; and an inductor coupled to a common node of the first switching component and the second switching component, wherein the second switching component comprises: a first diode and a first switch connected in series between a first terminal and a second terminal of the second switching component; and a second diode connected between the first terminal and the second terminal of the second switching component.)

1. A converter, comprising:

a first switching component and a second switching component coupled between an input power source and an output capacitor; and

an inductor coupled to a common node of the first switching component and the second switching component, wherein the second switching component comprises:

a first diode and a first switch connected in series between a first terminal and a second terminal of the second switching component; and

a second diode connected between the first terminal and the second terminal of the second switching component.

2. The converter of claim 1, further comprising:

the first switch is a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device; and is

The first switch component is an Insulated Gate Bipolar Transistor (IGBT) device.

3. The converter of claim 2, wherein:

a source of the first switch is connected to an anode of the first diode;

a drain of the first switch is connected to an anode of the second diode; and is

The cathode of the first diode is connected to the cathode of the second diode.

4. The converter of claim 1, wherein:

the first diode is a low forward voltage drop diode; and is

The second diode is a low reverse recovery diode.

5. The converter of claim 1, wherein:

the first diode is a schottky diode; and is

The second diode is a silicon carbide (SiC) diode.

6. The converter of claim 1, wherein:

the inductor is connected between the input power source and the common node of the first and second switching components; and is

The second switching component is connected between the inductor and the output capacitor.

7. The converter of claim 1, further comprising:

a third diode connected in parallel with the first switching component.

8. The converter of claim 1, wherein:

the second diode is for conducting current through the inductor during a first failure time between turn-off of the first switch component and turn-on of the first switch.

9. The converter of claim 1, wherein:

the second diode is for conducting current therethrough during a second failure time between the turning off of the first switch and the turning on of the first switch component.

10. A method, comprising:

turning off a first switch of a power converter, the power converter including an inductor coupled to a common node of the first and second switches of the power converter;

during a first failure time, flowing current through a first diode having an anode connected to the second switch;

after the first failure time, turning on the second switch; and

flowing the current through the first diode during a second failure time after turning off the second switch.

11. The method of claim 10, wherein:

the power converter is a boost converter.

12. The method of claim 11, further comprising:

a second diode connected in series with the second switch, wherein the second diode and the second switch are connected between the inductor and an output capacitor of the boost converter.

13. The method of claim 12, further comprising:

preventing the current from flowing through the second diode by maintaining the second switch off during the first and second failure times.

14. The method of claim 12, wherein:

the first switch is an Insulated Gate Bipolar Transistor (IGBT) device;

the second switch is a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device;

the first diode is a low reverse recovery diode; and is

The second diode is a low forward voltage drop diode.

15. The method of claim 14, further comprising:

a source of the second switch is connected to an anode of the second diode;

a drain of the second switch is connected to an anode of the first diode; and is

A cathode of the first diode is connected to a cathode of the second diode and further connected to an output capacitor of the power converter.

16. The method of claim 14, wherein:

the voltage rating of the first switch is at least ten times greater than the voltage rating of the second switch.

17. An apparatus, comprising:

a first switch having a first terminal coupled to a positive terminal of a power supply through an inductor, and a second terminal coupled to a negative terminal power supply;

a second switch and a first diode connected in series and further coupled between the inductor and an output capacitor; and

a second diode coupled between a common node of the first switch and the second switch and the output capacitor.

18. The apparatus of claim 17, wherein:

the first switch is an Insulated Gate Bipolar Transistor (IGBT) device;

the second switch is an n-type Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device;

the first diode is a low forward voltage drop diode; and is

The second diode is a low reverse recovery diode.

19. The apparatus of claim 17, wherein:

a collector of the first switch is connected to a drain of the second switch;

an emitter of the first switch is connected to the power supply;

a source of the second switch is connected to an anode of the first diode;

an anode of the second diode is connected to the drain of the second switch; and is

The cathode of the second diode is connected to the cathode of the first diode.

20. The apparatus of claim 17, wherein:

a voltage rating of the first switch is in a range of about 600V to about 650V; and is

The second switch has a voltage rating in the range of about 60V to about 100V.

Technical Field

The present invention relates to a hybrid boost converter, and in particular embodiments to a hybrid boost converter with lower switching and conduction losses.

Background

Renewable energy sources include solar, wind, tidal, and the like. The solar energy conversion system may include a plurality of solar panels connected in series or parallel. The output of the solar panel may generate a variable dc voltage depending on a number of factors such as time of day, location, and sun-tracking ability. To regulate the output of the solar panel, the output of the solar panel may be coupled to a direct current/direct current (dc/dc) converter to achieve a regulated output voltage at the output of the dc/dc converter. In addition, the solar panel may be connected to the backup battery system by a battery charging control device. During the day, the backup battery is charged by the output of the solar panel. The backup battery provides power to a load coupled to the solar panel when utility power fails or the solar panel is an off-grid power system.

Because most applications can be designed to operate on 120 volt ac power, solar inverters are employed to convert the variable dc output of the photovoltaic module to 120 volt ac power. Multiple multi-level inverter topologies can be employed to achieve high power and high efficiency conversion from solar energy to utility power. In particular, high power ac output may be achieved by using a series of power semiconductor switches to convert a plurality of low voltage dc sources into high power alternating current (ac) output by combining the stepped voltage waveforms.

A boost converter may be employed to generate additional voltage levels to form the stepped voltage waveform of the multi-level inverter. The boost converter may be implemented by using a boost circuit, such as a non-isolated boost converter. The non-isolated boost converter is formed from an input inductor, a low-side switch, a blocking diode, and an output capacitor. An input inductor is coupled between the input power source and a common node of the low-side switch and the blocking diode. The output capacitor is connected to the blocking diode and ground.

The blocking diode of the step-up converter may be implemented as a silicon carbide diode or a silicon diode. Silicon carbide diodes have a high forward voltage drop, which may increase the conduction losses of the boost converter. Silicon diodes may have poor reverse recovery performance, which may cause additional switching losses. It is desirable to have a mixing device that exhibits good behavior such as low forward pressure drop and rapid reverse recovery.

Disclosure of Invention

These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by preferred embodiments of the present invention which provide a hybrid boost converter with lower switching and conduction losses.

According to an embodiment, a converter includes a first switching component and a second switching component coupled between an input power source and an output capacitor. The converter further includes an inductor coupled to a common node of the first switching component and the second switching component. The second switch assembly includes: a first diode and a first switch connected in series between a first terminal and a second terminal of the second switching component; and a second diode connected between the first terminal and the second terminal of the second switching component.

According to another embodiment, a method includes turning off a first switch of a power converter. The power converter includes an inductor coupled to a common node of the first and second switches of the power converter. During a first dead time after turning off the first switch, current flows through a first diode. The first diode has an anode connected to the second switch. After the first dead time, turning on the second switch. The current flows through the first diode during a second failure time after turning off the second switch.

According to yet another embodiment, an apparatus includes a first switch having a first terminal coupled to a positive terminal of a power supply through an inductor, and a second terminal coupled to a negative terminal power supply. The device further includes a second switch and a first diode connected in series and further coupled between the inductor and an output capacitor. The apparatus further includes a second diode coupled between a common node of the first switch and the second switch and the output capacitor.

An advantage of an embodiment of the present invention is a hybrid boost converter that provides lower conduction and switching losses in order to improve the efficiency, reliability and cost of the boost converter.

The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.

Drawings

For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a block diagram of a boost converter according to various embodiments of the present invention;

FIG. 2 is a schematic diagram of the boost converter shown in FIG. 1, according to various embodiments of the present invention;

FIG. 3 is a gate control signal for the switches of the hybrid boost converter shown in FIG. 2, according to various embodiments of the present invention; and is

Fig. 4 is a flow diagram of a method for controlling the hybrid boost converter shown in fig. 2, according to various embodiments of the present invention.

Corresponding reference numerals and symbols in the various drawings generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.

Detailed Description

The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated that many of the applicable inventive concepts provided by the present invention can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not delimit the scope of the invention.

In a specific environment, i.e. in a hybrid boost converter, the invention will be described with respect to a preferred embodiment. However, the present invention can also be applied to various power converters. The embodiments will be described in detail below with reference to the accompanying drawings.

Fig. 1 is a block diagram of a boost converter according to various embodiments of the present invention. Boost converter 100 includes a first switching component 112, a second switching component 114, an inductor L1, an input capacitor C_INAnd an output capacitor Co. As shown in fig. 1, the inductor L1 is connected to a common node of the first and second switching components 112 and 114. Inductor L1 and second switching component 114 are connected across input capacitor C_INAnd an output capacitor Co. The first switching assembly 112 is connected between the common node of the inductor L1 and the second switching assembly 114 and ground.

The boost converter 100 may further include a controller 110. As shown in fig. 1, the controller 110 may detect the input voltage Vin, the output voltage Vo, and generate two gate driving signals to control the first and second switching components 112 and 114 to be turned on and off, respectively. The controller 110 may be a Pulse Width Modulation (PWM) controller. Alternatively, the controller 110 may be implemented as a digital controller, such as a microcontroller, digital signal processor, or the like.

It should be noted that although the examples throughout the description are based on a boost converter and a controller for generating gate drive signals for a boost converter (e.g., boost converter 100 shown in fig. 1), the boost converter 100 shown in fig. 1 and the controller 110 may have many variations, substitutions, and modifications. For example, the controller 110 may detect other necessary signals, such as input and/or output current, drain-to-source voltage of the boost converter 100, temperature of the boost converter 100, and so forth. Further, there may be a dedicated driver or a plurality of dedicated drivers coupled between the controller 110 and the first and second switch assemblies 112, 114.

The boost converter 100 and the controller 110 illustrated herein are limited only for the purpose of clearly illustrating the inventive aspects of the various embodiments. The present invention is not limited to any particular power topology.

The first and second switching components 112 and 114 shown in fig. 1 may be implemented as n-type metal oxide semiconductor (NMOS) transistors. Alternatively, the switches may be implemented as other suitable controllable devices, such as Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices, Bipolar Junction Transistor (BJT) devices, Super Junction Transistor (SJT) devices, Insulated Gate Bipolar Transistor (IGBT) devices, gallium nitride (GaN) based power devices, and so forth.

Further, at least one of the first and second switching assemblies 112, 114 may be implemented as a hybrid device including a combination of multiple switching devices (e.g., a combination of a MOSFET device and multiple diodes). The detailed structure of the plurality of switching devices will be described below with respect to fig. 2. Throughout the description, boost converter 100 may alternatively be referred to as hybrid boost converter 100.

Fig. 2 is a schematic diagram of the boost converter shown in fig. 1, according to various embodiments of the present invention. Hybrid boost converter 100 includes a first switching component 112, a second switching component 114, an inductor L1, an input capacitor C_INAnd an output capacitor Co. As shown in FIG. 2Input capacitor C_INAcross the two output terminals (Vin + and Vin-) of the power supply Vin. Inductor L1 is connected to input capacitor C_INAnd a common node of the first switching component 112 and the second switching component 114. The first switching assembly 112 has a first terminal connected to inductor L1 and a second terminal connected to ground. The second switching component 114 is connected between the inductor L1 and the output capacitor Co. The output capacitor Co serves to suppress voltage ripples and provide a stable voltage for various loads coupled to the hybrid boost converter 100.

In some embodiments, the first switch assembly 112 is implemented as an Insulated Gate Bipolar Transistor (IGBT) device Q1. As shown in fig. 2, the collector of the IGBT device Q1 is connected to a common node of the inductor L1 and the second switching component 114. The emitter of IGBT device Q1 is grounded. The gate of the IGBT device Q1 is used to receive a gate drive signal from the controller 110.

As shown in fig. 2, the third diode D3 is connected in parallel with the IGBT device Q1. Third diode D3 is used to provide a reverse conduction path for hybrid boost converter 100. In other words, the third diode D3 is an anti-parallel diode. In some embodiments, the third diode D3 is co-packaged with the IGBT device Q1. In an alternative embodiment, the third diode D3 is placed outside the IGBT device Q1.

The second switching assembly 114 includes a switch S1, a first diode D1, a second diode D2, and a fourth diode D4. In some embodiments, switch S1 is implemented as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device. More specifically, switch S1 is an n-type MOSFET device. Throughout the description, switch S1 may alternatively be referred to as MOSFET device S1.

As shown in fig. 2, the drain of the MOSFET device S1 is connected to the inductor L1 and the IGBT device Q1. The source of the MOSFET device S1 is connected to the anode of a first diode D1. The gate of the MOSFET device S1 is used to receive a gate signal from the controller 110.

Fig. 2 further illustrates that the MOSFET device S1 and the first diode D1 are connected in series to form a first conductive path between the inductor L1 to the output capacitor Co. The second diode D2 forms a second conductive path between the inductor L1 to the output capacitor Co. As shown in fig. 2, the anode of the second diode D2 is connected to the drain of the MOSFET device S1. The cathode of the second diode D2 is connected to the cathode of the first diode D1. The first conductive path and the second conductive path are connected in parallel between the inductor L1 and the output capacitor Co.

In some embodiments, the fourth diode D4 is a body diode of the MOSFET device S1. In alternative embodiments, when switch S1 is implemented as other suitable switching devices, such as IGBT devices, a separate freewheeling diode may be required to connect in parallel with its corresponding switch.

In operation, there may be two failure times during the on and off transitions between the IGBT device Q1 and the MOSFET device S1. During these two failure times, both the IGBT device Q1 and the MOSFET device S1 turn off. The second diode D2 acts as a freewheeling diode that provides a conductive path for the current of the hybrid boost converter 100 during the dead time. To reduce switching losses during the on and off transitions, the second diode D2 is implemented as a diode with a short reverse recovery time and a low reverse recovery charge. The operating principle of the second diode D2 will be described below with respect to fig. 3.

In some embodiments, the first diode D1 is implemented as a low forward voltage drop diode, such as a schottky diode or the like. The second diode D2 is implemented as a low reverse recovery diode, such as a silicon carbide diode, an ultrafast silicon diode, or the like. In some embodiments, the second diode D2 has a shorter reverse recovery time and lower reverse recovery charge than the first diode D1. The forward voltage drop of the second diode D2 is greater than the forward voltage drop of the first diode D1.

In some embodiments, the output voltage of hybrid boost converter 100 is about 500V. The rated voltage of the first diode D1 is in the range of about 600V to about 650V. The rated voltage of the second diode D2 is in the range of about 600V to about 650V. The rated voltage of the IGBT device Q1 is in the range of about 600V to about 650V. The voltage rating of the MOSFET device S1 is in the range of about 60V to about 100V.

In some embodiments, the rated voltage of the IGBT device Q1 is equal to 600V. The rated voltage of the MOSFET device S1 is equal to 60V. In other words, the rated voltage of the IGBT device Q1 is at least ten times greater than the rated voltage of the MOSFET device S1.

One advantageous feature of having a combination of a high voltage IGBT device (e.g., 600V IGBT device Q1) and a low voltage MOSFET device (e.g., 60V MOSFET device S1) is that the low voltage MOSFET device S1 has a much lower on-resistance. The lower on-resistance of MOSFET device S1 helps improve the efficiency of hybrid boost converter 100.

In operation, current may continue to flow through inductor L1. The controller 110 generates a signal that turns off the IGBT device Q1. In response to the turn-off signal applied to the gate of IGBT device Q1, IGBT device Q1 turns off. To prevent the shoot through problem, a first failure time is scheduled after turn off of the IGBT device Q1. As described above, the MOSFET device S1, the first diode D1, and the second diode D2 form two conductive paths connected in parallel. During the first failure time, the MOSFET device S1 remains off. The MOSFET device S1, which is turned off, prevents current from entering the first diode D1. Thus, the current of the hybrid boost converter 100 flows completely through the second diode D2 during the first dead time. Because the second diode D2 is a high speed diode (a diode with shorter reverse recovery time and lower reverse recovery charge), switching losses of the hybrid boost converter 100 may be reduced by switching transitions of the second diode D2.

Likewise, when the controller 110 generates a signal to turn off the MOSFET device S1, a second failure time is scheduled after the turn off of the MOSFET device S1. During the second failure time, current flows completely through the second diode D2. Because the second diode D2 is a high speed diode, switching losses of the hybrid boost converter 100 may be reduced by switching transitions of the second diode D2.

One advantageous feature of having a low forward drop diode (e.g., first diode D1) and a low reverse recovery diode (e.g., second diode D1) is that the low reverse recovery diode helps reduce switching losses of hybrid boost converter 100. On the other hand, a low forward drop diode helps to reduce conduction losses of the hybrid boost converter 100.

Fig. 3 is a gate control signal for a switch of the hybrid boost converter shown in fig. 2, according to various embodiments of the present invention. The horizontal axis of fig. 2 represents time intervals. There may be two vertical axes. The first vertical axis Y1 represents the gate drive signal of the IGBT device Q1 shown in fig. 2. A second vertical axis Y2 represents the gate drive signal for the MOSFET device S1 shown in fig. 2.

As shown in fig. 3, the time from t0 to t4 represents one switching cycle of the hybrid boost converter 100. The IGBT device Q1 is turned on from time t0 to time t1 as indicated by the gate drive signal of the IGBT device Q1. During time t0 to time t1, MOSFET device S1 remains off as indicated by the gate drive signal of MOSFET device S1.

The MOSFET device S1 is turned on from time t2 to time t3, as indicated by the gate drive signal of the MOSFET device S1. During time t2 to time t3, IGBT device Q1 turns off as indicated by the gate drive signal of IGBT device Q1.

In one switching cycle as shown in fig. 3, there are two dead times. During these two failure times, both the IGBT device Q1 and the MOSFET device S1 turn off. As shown in fig. 3, the first failure time is from time t1 to time t 2. The first dead time is used to prevent a breakdown current from flowing in hybrid boost converter 100 during the turn-off process of IGBT device Q1. The second failure time is from time t3 to time t 4. The second dead time is used to prevent a breakdown current from flowing in the hybrid boost converter 100 during the turn-off process of the MOSFET device S1. Both the first failure time and the second failure time are predetermined. It should be noted that the first and second failure times may vary depending on different applications and design needs. In some embodiments, the switching frequency of hybrid boost converter 100 is about 300 KHz. The first failure time is about 50 nanoseconds. The second failure time is about 50 nanoseconds.

During the first and second failure times, the current of the hybrid boost converter 100 flows through the second diode D2. The second diode D2 is a high speed diode that may reduce switching losses of the hybrid boost converter 100. On the other hand, during the on-time of the MOSFET device S1, current flows through the first diode D1 with a low forward voltage drop. Such a low forward voltage drop helps reduce conduction losses of hybrid boost converter 100.

Fig. 4 is a flow diagram of a method for controlling the hybrid boost converter shown in fig. 2, according to various embodiments of the present invention. This flow diagram shown in fig. 4 is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. For example, various steps illustrated in FIG. 4 may be added, removed, replaced, rearranged, and repeated.

Referring back to fig. 2, the hybrid boost converter 100 includes a first switch Q1, a second switch S1, a first diode D1, and a second diode D2. The second switch S1 and the first diode D1 are connected in series between the inductor L1 and the output capacitor Co. A source of the second switch S1 is connected to an anode of the first diode D1. The second switch S1 and the first diode D1 form a first conductive path between the inductor L1 and the output capacitor Co. The second diode D2 forms a second conductive path between the inductor L1 and the output capacitor Co. The first conductive path and the second conductive path are connected in parallel between the inductor L1 and the output capacitor Co. In some embodiments, the conduction loss of the second conductive path is greater than the conduction loss of the first conductive path.

At step 402, upon receiving an off signal of the first switch Q1 from a feedback loop (not shown), a controller (e.g., the controller 110 shown in fig. 2) turns off the first switch of the power converter. In some embodiments, the power converter is a hybrid boost converter 100. Referring back to fig. 2, the hybrid boost converter 100 includes a first switch Q1 implemented as an IGBT, a second switch S1 implemented as a MOSFET, a first diode D1, a second diode D2, and an inductor connected to a common node of the first switch and the second switch.

At step 404, after a first expiration time, the controller turns on the second switch S1. During the first failure time, current flows through the second diode D2. In some embodiments, the second diode D2 is a low reverse recovery diode, such as a silicon carbide diode or the like. Such a low reverse recovery diode helps to reduce switching losses during the first failure time. Further, after the current of the power converter flows through the second diode D2, the voltage stress across the second switch S1 is substantially equal to zero. Thus, the second switch S2 may enable zero voltage switching, thereby further reducing the switching losses of the hybrid boost converter 100.

At step 406, upon receiving the turn-off signal of the second switch S1 from the feedback loop, the controller turns off the second switch S1. In response to the turning off of the second switch S1, current moves from the first conductive path to the second conductive path.

At step 408, after a second failure time, the controller turns the first switch on. During the second failure time, current flows through the second diode D2.

In some embodiments, the first failure time is about 50 nanoseconds. The second failure time is about 50 nanoseconds. The first and second expiration times given above are predetermined. The first failure time and/or the second failure time may vary depending on different applications and design needs.

In some embodiments, to achieve zero voltage switching, the first failure time is longer than the second failure time. For example, the first failure time is about 100 nanoseconds. The second failure time is about 50 nanoseconds. In other words, the first failure time is at least twice as long as the second failure time. Such a failure timing may help to further improve the efficiency of hybrid boost converter 100.

Although the embodiments of the present invention and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.