阅读说明：本技术 电流输出的及与其相关的改进 (Improvements in and relating to current output ) 是由 彼得·拉尔克 于 2018-07-10 设计创作，主要内容包括：一种电流输出装置,其适于与负载电连接以向该负载输出电流。该装置包括：电流输出端子,用于连接所述负载的第一端子,以向该负载传递电流。提供有电流输入端子,用于连接所述负载的第二端子,以接收从该负载返回的所述电流。电压调节器可操作以向所述电流输出端子提供电压,该电压被调节为与施加到所述电流输入端子的电压有差异,所述差异的量足以使所述电流从所述电流输出端子经由所述负载而流向所述电流输入端子。所述电压调节器可操作并被布置以向所述电流输出端子提供正极性的或负极性的电压,用于将所述电流分别提供给对所述电流输出端子呈现正极性的或负极性的电压的负载。(A current output device is adapted to be electrically connected to a load to output a current to the load. The device includes: a current output terminal for connection to a first terminal of the load to deliver current to the load. A current input terminal is provided for connection to a second terminal of the load to receive the current returned from the load. The voltage regulator is operable to provide a voltage to the current output terminal that is regulated to differ from a voltage applied to the current input terminal by an amount sufficient to cause the current to flow from the current output terminal to the current input terminal via the load. The voltage regulator is operable and arranged to provide a positive or negative polarity voltage to the current output terminals for providing the current to a load presenting the positive or negative polarity voltage to the current output terminals, respectively.)

1. A current output device adapted to be electrically connected to a load to output current thereto, the device comprising:

a current output terminal for connection to a first terminal of the load to deliver current to the load;

a current input terminal for connection to a second terminal of the load to receive the current returned from the load;

a voltage regulator operable to provide a voltage to the current output terminal that is regulated to differ from a voltage applied to the current input terminal by an amount sufficient to cause the current to flow from the current output terminal to the current input terminal via the load;

wherein the voltage regulator is operable and arranged to provide a positive or negative polarity voltage to the current output terminals for providing the current to a load presenting the positive or negative polarity voltage to the current output terminals, respectively.

2. A current output device according to any preceding claim, wherein the current output device is operable to supply a voltage of positive polarity to the current output terminals when supplying current to a sinking load, and to supply a voltage of negative polarity to the current output terminals when supplying current to a pulling load.

3. A current output arrangement according to any preceding claim, comprising a synchronous rectifier arranged to rectify an alternating voltage signal provided by a first transformer winding coupled to the synchronous rectifier and provide a rectified voltage to the voltage regulator, wherein the synchronous rectifier comprises a Field Effect Transistor (FET) and a control unit arranged to synchronously control the conductivity of the transistor to provide a negative polarity direct current voltage to the voltage regulator.

4. The current output device of claim 3, wherein the control unit comprises a second transformer winding coupled to a gate terminal of the field effect transistor of the synchronous rectifier, wherein a polarity of a voltage at the second transformer winding can be controlled for applying a positive polarity voltage to the gate terminal of the field effect transistor of the synchronous rectifier coupled with an end of the first transformer winding when the end of the first transformer winding has a negative polarity voltage such that the negative polarity voltage of the first transformer winding is presented to the voltage regulator.

5. Current output device according to claim 3 or 4, characterized by a further rectifier electrically coupled to the first transformer winding and arranged to rectify an alternating voltage signal provided by the first transformer winding coupled to the further rectifier and to provide the rectified voltage as a direct voltage of positive polarity to the voltage regulator.

6. A current output device according to any preceding claim, comprising a current controller electrically connected to the current input terminal and arranged to regulate the voltage at the current input terminal such that the magnitude of the returned current substantially matches the magnitude of the predetermined current.

7. The current output device of claim 6, wherein the voltage regulator is electrically connected to the current input terminal so as to receive the voltage thereat as an input signal and to regulate the voltage provided to the current output terminal in accordance with the voltage at the current input terminal such that the magnitude of the returned current substantially matches the magnitude of the predetermined current.

Technical Field

The invention relates to a current output circuit and a method. In particular, the present invention relates to a circuit for providing power to or drawing power from a load (sink load) that does not have its own power source. The present invention relates to a device for outputting current to any type of load as required, using its own device. The invention also allows current to be output to a pull load while reducing power dissipation within the circuit elements of the device.

Background

It may often be desirable to use electronic devices in hazardous environments. Including for example, environments containing volatile materials. The danger is caused by heat or sparks from the electronics that may ignite the volatile substances. Therefore, electronic circuits used in these hazardous environments must comply with strict safety/protection standards to ensure that these hazards do not arise.

One way to provide such protection is to provide a potential isolated power supply for the hazardous load. This is accomplished by employing transformer circuitry through which power can be transferred from an external power source to the circuitry in the hazardous environment. To optimize safety, the current, power and voltage within the circuit in the hazardous environment should be limited to a level that prevents ignition of volatile substances due to heat generated by the circuit, etc.

If the load that needs to supply current is a load that does not contain its own power supply (sink load), a dedicated type of current supply circuit is required to meet these requirements. In such a circuit, the power generated by the current drawn from the current supply is substantially dissipated in the load. However, when the load contains its own power supply (pull-load), a different current supply circuit is required. In that case, a greater proportion of the power may be dissipated in the current supply itself. This is undesirable because it wastes energy and causes heating of circuit elements in the current supply device, which heat may cause damage thereto.

The present invention aims to provide an improved current supply arrangement.

Disclosure of Invention

Most generally, the invention involves supplying current via a current output port at which the polarity of the voltage is controllably variable to accommodate the polarity of the voltage of a load connected to the current output port. This makes it possible to adapt the current output port to output a current to a sinking or pulling load which, when connected, may assume a voltage of opposite polarity to the respective polarity of the current output port.

According to the present invention, there is provided an apparatus and method as set forth in the appended claims. Further features of the invention will become apparent from the dependent claims and the following description.

In a first aspect, the present invention provides a current output device adapted to be electrically connected to a load to output a current to the load, the device comprising: a current output terminal for connection to a first terminal of the load to deliver current to the load. A current input terminal is provided for connection to a second terminal of the load to receive the current returned from the load. A voltage regulator is provided and is operable to provide a voltage to the current output terminal that is regulated to differ from a voltage applied to the current input terminal by an amount sufficient to cause the current to flow from the current output terminal to the current input terminal via the load. The voltage regulator is operable and arranged to provide a positive or negative polarity voltage to the current output terminals for providing the current to a load presenting the positive or negative polarity voltage to the current output terminals, respectively.

In this way, the polarity and magnitude of the voltage provided at the current output port can be controlled to comply with conditions present at the current output port when a pull or sink load is connected to the port. This enables current to flow from the current output port and be provided into the connected load regardless of whether the load is a pull load or a sink load. The structure and elements of the current supply circuit need not be modified to allow the current supply circuit previously used to supply current to a pull load to be used to supply current to a sink load and vice versa. This versatility is particularly beneficial for users who may need the device to be suitable for use in any one situation, because the user intends to use it to provide different types of load at different times/locations, or because they do not yet know which type of load will be used in the future.

The device is operable to provide a voltage of positive polarity to the current output terminal when supplying current to the sink load and to provide a voltage of negative polarity to the current output terminal when supplying current to the pull load.

In this way, a simple device may be controlled to provide its current output terminals with a polarity voltage that is suitable for any type of load (e.g., sink/pull load) that is connected to the terminals and supplied with current.

The apparatus can provide a voltage of variable polarity at an output terminal by alternately combining two Direct Current (DC) component voltages of opposite polarity in sequence at a variable ratio. The variable ratio (e.g. in pulse width modulation, e.g. the ratio of time) may be such that the net polarity provided in this way matches the polarity of the dc component voltage which has the greater ratio of the two component voltages in this combination. The magnitude of the net voltage may thus be proportional to, or at least determined by, the difference in magnitude between the two dc component voltages, and/or the relative time proportion of the two dc component voltages alternately combined one after the other in time.

The device can provide two dc component voltages concurrently and simultaneously so that they can be combined in time continuously, even though the proportion or manner of combination of the two dc component voltages can vary over time if desired.

The voltage regulator may comprise a switching unit arranged to provide a voltage alternately switching between DC component voltages of positive and negative DC polarity. The voltage regulator may be arranged to alternately provide the voltage of positive DC polarity and the voltage of negative DC polarity to the smoothing electrical filter for selected respective periods of time and to output the result to the current output terminal as a DC voltage. In this way, the voltage regulator may comprise an electrical filter arranged to smooth variations of the voltage output from the switching unit for supply to the current output terminal. This switching operation may be performed by a switching arrangement comprising two switches (e.g. one or more diodes, one or more transistors) operable to switch in opposite relative directions, such that when one switch for connecting/supplying the DC component voltage of positive DC polarity is non-conducting (off), the other switch for connecting/supplying the DC component voltage of negative DC polarity may be conducting (on), and vice versa.

The two dc component voltages may have similar or substantially the same magnitude, but opposite polarities. The two direct current component voltages may be generated by the device as separate direct current voltage signals rectified from the same Alternating Current (AC) voltage signal. The two dc component voltages may preferably be provided by transformer windings. The apparatus may be arranged for electrical connection with terminals of a transformer winding and for deriving two direct current component voltages from the transformer winding. The alternating voltage signal may be generated by an alternating voltage unit of the apparatus. The ac voltage unit may include a transformer winding of a transformer circuit operable to be driven by an ac drive signal, the transformer circuit generating the ac voltage signal in response to the ac drive signal.

The current output means may comprise a synchronous rectifier arranged to rectify an alternating voltage signal provided by a first transformer winding coupled to the synchronous rectifier. The synchronous rectifier may comprise a transistor arranged to provide full wave rectification of the alternating voltage of the first transformer winding. Thus, the synchronous rectifier may provide current from the first transformer winding during both half-cycles of each cycle of its alternating voltage, such that the negative polarity end of the first transformer winding is presented to the voltage regulator electrically connected/communicated to the current output terminal of the current output device throughout the alternating current cycle of the transformer winding. Thus, when the negative end of the first transformer winding changes position from one physical end of the winding to the other during an ac voltage cycle, the physical winding end with negative polarity is selected as the transformer end which is electrically connected/communicated (e.g. via a voltage regulator) to the current output terminal of the current output device.

The transistors used in the synchronous rectifiers preferably have a structure that allows current to flow in either direction when the transistor gates are biased. Examples include FETs. Some illustrative examples include: junction FETs (JFETs) or Insulated Gate FETs (IGFETs), such as MOSFETs and the like. MOSFETs are preferred because their gate drive is generally easier, MOSFET designs have many options, and MOSFETs are generally cheaper than other FETs. The synchronous rectifier may be arranged to provide a rectified voltage to the voltage regulator. The synchronous rectifier preferably comprises a Field Effect Transistor (FET). The current output means may comprise a control unit arranged to synchronously control the conductivity of the FETs to provide a negative polarity dc voltage to the voltage regulator.

The synchronous rectifier may include a plurality of (e.g., four or more) FETs arranged in a bridge form. Desirably, the gate terminal of each such FET may be electrically connected to (and driven by) a respective alternating voltage source (e.g., a transformer winding). The synchronous rectifier may have FETs arranged in pairs, with each pair of FETs electrically connected in series with a respective one of two opposite polarity output terminals of an alternating voltage source (e.g., a winding). Preferably, the drain terminal of each FET of each pair of FETs (arranged) is electrically connected to (or arranged to) the AC voltage source (e.g. one winding terminal) to which the pair in question is electrically connected. Preferably, the source terminal of each FET of a given pair of FETs is (or is arranged to be) electrically connected to a respective one of the voltage regulator, ground terminal electrical connections. Desirably, in a pair of such FETs, the FET arranged for electrical connection with the ground terminal is a P-type FET. Desirably, in one such pair of FETs, the FET disposed for electrical connection with the voltage regulator is an N-type FET. Ideally, in each of the two pairs of FETs, the FETs are arranged to allow them to be driven so that current flows via the P-type FET of one pair to the N-type FET of the other pair. Ideally, two pairs of FETs may be driven such that current is received at the source terminal of the P-type FET of one pair and output via the source terminal of the N-type FET of the other pair. Ideally, the gate terminals of each pair of FETs are driven synchronously and in unison. Ideally, the gate terminals of different pairs (e.g. two pairs) of the FETs are driven in anti-phase by an ac voltage source, such that the drain of one pair of FETs connected to one voltage terminal (e.g. the winding terminal) of the ac source is driven "on" and the gate terminal of the other pair of FETs connected to the other terminal (e.g. the other winding terminal) of the ac source is driven "off", or vice versa. This provides synchronous rectification capability.

The current output means may comprise a further rectifier electrically coupled to the first transformer winding and arranged to rectify an alternating voltage signal provided by the first transformer winding coupled to the further rectifier and provide the rectified voltage to the voltage regulator as a positive polarity direct voltage. Passive diodes may be used for this purpose, for example arranged to provide a full wave rectifier, such as a bridge rectifier.

The control unit may be arranged to be electrically connected to or may comprise a second transformer winding coupled to (or for coupling to) the gate terminal of the FET of the synchronous rectifier. The polarity of the voltage at the second transformer winding may be controlled/controllable to be opposite to the polarity of the voltage at the first transformer winding. The control unit may be arranged to apply a positive polarity voltage to the gate terminal of the FET of the synchronous rectifier. The transistor in question may be electrically coupled to one end of the first transformer winding. The positive gate voltage may be applied when the terminal of the first transformer has a negative polarity voltage (e.g., the opposite voltage polarity). Thus, the voltage of the negative pole of the first transformer winding may be presented to the voltage regulator for providing a voltage at the current output terminal.

The current output device may comprise a current controller electrically connected to the current input terminal and arranged to adjust the magnitude of the returned current to substantially match a predetermined magnitude.

The voltage regulator may be electrically connected to the current input terminal so as to receive the voltage thereat as an input signal and to regulate the voltage provided to the current output terminal in dependence on the voltage at the current input terminal so as to regulate (e.g. most preferably to minimise) the power dissipated in the current controller.

Drawings

For a better understanding of the present invention, and to show how embodiments thereof may be carried into effect, reference will now be made, by way of example only, to the accompanying drawings, in which:

fig. 1 schematically shows a current output device;

fig. 2 schematically shows a current output device according to an embodiment of the present invention;

FIG. 3 shows a circuit design of a relevant portion of the current output circuit of the apparatus of FIG. 2, in accordance with an embodiment of the present invention;

FIGS. 4A and 4B each schematically illustrate the operation of a synchronous rectifier of an embodiment of the present invention;

FIGS. 5A and 5B each schematically illustrate the operation of a bridge rectifier of an embodiment of the present invention;

FIG. 5C schematically illustrates the operation of two bridge rectifiers;

FIGS. 5D and 5E each schematically illustrate operation of a respective one of the two bridge rectifiers of FIG. 5C;

FIG. 6 schematically illustrates a voltage input signal to a comparator of a voltage regulator of an embodiment of the present invention and its corresponding concurrently generated output voltage signal;

FIG. 7 schematically illustrates a circuit diagram showing certain elements of a voltage regulator of an embodiment of the present invention in relation to its voltage input and output signals shown in FIG. 6;

fig. 8 schematically shows a current output device according to an embodiment of the present invention;

fig. 9 schematically shows a current output device according to an embodiment of the present invention;

fig. 10 schematically shows a current output apparatus according to an embodiment of the present invention.

Detailed Description

In the drawings, like items are assigned like reference numerals for consistency.

Fig. 1 schematically shows a current output device for transmitting a current between a current input circuit region 1 and a current output circuit region 2, which current output circuit region 2 is galvanically isolated from the input region. The electromagnetic coupling between the current input and output circuits is provided by a transformer comprising a chopper winding 5B of a chopper unit 5 arranged in the current output circuit region, which chopper winding 5B is electromagnetically coupled with a chopper winding 6B of a chopper unit 6 arranged in the current input circuit region. The chopper unit 5 of the current output circuit region is electrically connected to a chopper control unit 7, and is functionally controlled by the chopper control unit 7, the chopper control unit 7 including a chopper control winding 7B (center-tap transformer winding). Chopper control winding 7B is electromagnetically coupled to transformer drive winding 3C of power circuit region 3 and defines a transformer in cooperation with transformer drive winding 3C.

The chopper unit 6 of the current input circuit region is electrically connected to a chopper control unit 8, and is functionally controlled by the chopper control unit 8, the chopper control unit 8 including a chopper control winding 8B (center-tap transformer winding). Chopper control winding 8B is electromagnetically coupled to transformer drive winding 3C of power circuit region 3 and, together with transformer drive winding 3C, defines a transformer. Power is delivered from an external power source 3A of the circuit area to chopper control winding units 7, 8 via a line conditioning unit 3B and the transformer windings 3C of the power circuit. The line conditioning unit 3B is for conditioning the power so supplied and may be any suitable power conditioner, for example, such a conditioner would be well known and available to those of ordinary skill in the art.

The transformer drive winding 3C supplies not only the chopper control units 7, 8 of the current input and output circuit regions 1, 2 with power in a galvanically isolated manner, but also the power transformer winding 16 of the current input circuit region 1 and at the same time the power transformer winding 17 of the current output circuit region 2. The transformer drive windings constitute a transformer arrangement electromagnetically coupled in a galvanically isolated manner, wherein each power transformer winding 16, 17 of the current input circuit and the output circuit is identical, so that power can be supplied to the current input circuit and the current output circuit from an external power supply simultaneously. Each of the two terminals of the power windings 16, 17 of the current input and output circuit is electrically connected to a respective full-wave bridge rectifier circuit 9, 10 of the current input or output circuit in question.

This enables the ac current output from the power windings 16, 17 of the given connection to enter the associated full wave bridge rectifier 9, 10 and to take the output from the rectifier as rectified current. The anodes of the bridge rectifiers 9, 10 not connected to the terminals of the respective power winding 16, 17 are connected to the ground terminal, while the cathodes 9, 10 of the bridge rectifiers not connected to the terminals of the respective power winding (16 or 17) are electrically connected to the current output terminals 12, 30. In the case of the current input circuit region 1, the cathode in question defines a bridge rectifier current output port 12 for current infusion into portion 11 which is electrically connected to the input circuit region in use. The current injection portion draws current from the power winding 16 (which supplies current to the bridge rectifier circuit 9) and then draws current out to the current input port 13 of the chopper unit 6 of the current input circuit region 1.

The current supplied to the chopper unit 6 through the current injection 11 is then utilized by the chopper unit 6 and its chopper windings 6B to electromagnetically generate a current signal in the chopper windings 5B corresponding to the chopper unit 5 in the current output region, and forms a transformer together with the chopper windings 5B. In this way, the chopper unit 5 of the current output circuit region 2 acts as a "current follower" which regenerates the current signal provided by the current input 11 of the current input circuit region galvanically isolated therefrom. Similarly, in the case of the current output circuit region 2, the cathode of the full-wave bridge rectifier unit 10, which is not electrically connected to the power winding 17 of the current output circuit, forms the current output port 30 of the rectifier. Which in use is electrically connected to a current sink load 32. The current sink load draws current from the power winding 17 via the bridge rectifier unit 10, wherein the power winding 17 supplies current to the bridge rectifier 10 of the current output circuit region 2. The current sink load then directs current into the current input port 31 of the current output circuit region. In the current output circuit region, this current input port is electrically connected to the current input port of the chopper winding 5B of the chopper circuit 5 via a current control unit 22, thereby enabling an electromagnetic coupling to be formed between the current input circuit region 1 and the current output circuit region 2 to allow the current in the current output circuit region 2 to "follow" the current in the current input circuit region 1.

The current controller unit 22 comprises a variable impedance unit 34, which variable impedance unit 34 is in the form of a FET (field effect transistor) and has a drain terminal connected to the current input terminal 31 to receive current from the "sink" load and a source terminal connected to the chopper unit 5 to provide a signal thereto. In particular, the chopper control winding drives the chopper to chop the signal current. The gate terminal of the FET 34 is connected to the output port of the differential amplifier 35, and the inverting and non-inverting input ports of the differential amplifier are electrically connected to the source terminal and the ground terminal of the FET 34, respectively. Thus, the output signal generated by the differential amplifier is proportional to the voltage drop across the variable impedance of the FET, which in turn determines the signal provided to the gate terminal of the FET to control its impedance as a feedback loop. Which serves to keep the current to the chopper unit 5 of the current output circuit region at a stable, predetermined level or within a desired range. In particular, a differential amplifier (operational amplifier) is provided to control the gate voltage of the FET 34 to minimise the source voltage of the FET 34 and hence the voltage across the chopper and chopper windings to maximise accuracy. The chopper unit 6 in the current input circuit area 1 chops to ground and in practice has a very small Direct Current (DC) voltage across it. The chopper unit 7 in the current output circuit region 2 is also controlled to 0 vdc for symmetry between input and output and current transmission accuracy.

The arrangement of fig. 1 has been described so far in terms of the transfer of current from the current sink input 11 in the current input circuit region 1 to the current "sink" (passive) load in the galvanically isolated current output circuit region. However, current output may also be achieved when the current sink input 11 is replaced with a current pull input 14, and at the same time the passive "sink" load is replaced with an active load (current "source" load) 33 by 32. These pull/active inputs and loads contain their own power supply (as shown in fig. 1), making the power windings 16, 17 and associated bridge rectifier circuits 9, 10 of the current input and output circuit regions 1, 2 redundant. Instead, the current input terminals of the current drawing input 14 and the current drawing load 33 are connected to the respective ground terminals 15, 35 of the current input and current output circuit areas, and the current output terminals of the current drawing input/ load 14, 33 are connected to the respective chopper circuit 6, 5 of the current input/output circuit area in question. Thus, an "active" load 33 cannot be connected to the current output port 30 of the current output circuit region, and a "passive" load cannot be connected to the current output port 35 of the current output circuit region. A pair of current input and output ports cannot simultaneously serve two types of loads ("active" and "passive").

This illustrates the principle of limitation, which is also found in other current output circuits available to those skilled in the art, regardless of the form and structure, different from that of fig. 1.

Referring to fig. 2, which shows an embodiment of the invention in schematic form, presented as a modification of the schematic circuit of fig. 1 in order to better understand the invention, in particular, the current output section of the current output device of fig. 1 further comprises a synchronous rectifier unit 18, a Pulse Width Modulation (PWM) unit 20, 24 and a level- slip filter unit 28, 29. Diode 26 allows inductor current to flow from synchronous rectifier 18 to level- slip filters 28, 29 while PWM transistor 24 is turned off.

The synchronous rectifier unit 18 comprises four Field Effect Transistors (FETs) arranged in a bridge fashion such that the drain terminal of each FET is electrically connected to a respective end of the power winding 17 of the current output circuit region. The drain terminal of each of a first pair of the four FETs of the synchronous rectifier 18 is electrically connected to one end of the power winding 17, while the drain terminal of each of a second pair of FETs comprising the other two FETs of the four FETs is electrically connected to the other end of the power winding 17. The source terminals of one of the first pair of FETs and one of the second pair of FETs of the FETs are connected to the ground line/terminal of the current output circuit region. The source terminal of the other FET of the first and second pairs of FETs is electrically connected (indirectly) via level- slip filter cells 28, 29 with a current output terminal 30 of the current output circuit region. And an intermediate diode 26 is provided between the FET source terminals and the level-slip filter, the diode 26 having its anode connected to the former and its cathode connected to the latter, thereby allowing inductor current to flow from the synchronous rectifier 18 to the level- slip filters 28, 29, while the PWM transistor 24 is turned off. That is, when PWM transistor 24 transitions from the "on" state to the "off state, the resulting rapid drop in current (dI/dt) at inductor input terminal 25 induces a voltage (V-LdI/dt) generated by the inductor's inductance (L). The switched-mode inductor will resist the change of current with "back electromotive force" (V), so when applied, the current rises gradually (δ i ═ V)⁺–V_{Output of}) δ t/L) of positive voltage (V)⁺) The voltage on capacitor 29 will increase. Then, the current is slowly decreased (δ i ═ V) by applying^-–V_{Output of}) δ t/L) negative voltage (V)^-) The voltage on capacitor 29 will decrease. At steady output, the two values of δ i tend to be equal and opposite, but the value of δ t is controlled to maintain the proper voltage on the capacitor. PWM mixing is achieved by ramping up and down the inductor current, which has the effect of mixing the two voltages onto the output capacitor 29.

This induced "back emf" places a forward bias voltage at diode 26, causing it to conduct and allow current to flow therethrough from the synchronous rectifier to level- slip filters 28, 29. In an alternative embodiment, this switching operation may be performed by another switching device (e.g., one or more transistors) that may be controlled to be on (turned on) when the PWM switch 24 is "off. In this way, the switching operation is performed by a switching device including two switches (e.g., diode 26, transistor 24) operable to switch in opposite directions, so that when one switch 24 for connecting/supplying the DC component voltage of the positive DC polarity to the smoothing unit 28 is non-conductive (off), the other switch 26 for connecting/supplying the DC component voltage of the negative DC polarity to the smoothing unit 28 is conductive (on), and vice versa.

A capacitor 19 is located between the full wave bridge rectifier unit 10 and the ends of the power windings 17 connected thereto. These capacitors 19 couple the ac voltage from the power winding 17 to the rectifier 10 to avoid the need for separate windings for the (positive) rectifier 10 and the (negative) rectifier 18.

Each of the gate terminals of the FETs of the first pair of FETs is commonly connected to one end of the chopper control winding 7B of the chopper control unit 7, and each of the gate terminals of the FETs of the second pair of FETs is commonly connected to the other end of the chopper control winding 7B of the chopper control unit. As a result, in operation, the voltage applied to the gate terminals of the first pair of FETs is in opposite phase (i.e., opposite polarity) to the voltage applied to the gate terminals of the second pair of FETs. This also means that the synchronous rectifier unit 18 is driven synchronously with the chopper control winding and the chopper unit 5.

The PWM units 20, 24 are arranged to receive two input signals. The first input signal 23 is the voltage level present at the current input terminal 31 of the current output circuit region and the second input signal 21 is the current output from the full wave bridge rectifier unit 10. The PWM unit comprises a switch 24 arranged to apply the second input signal 21 to an output port 25 of the PWM unit in dependence on the value of the first input signal 23. When the switch becomes conductive, then the voltage 21 from the full wave bridge rectifier is applied to the current output port of the PWM unit and from there to the input port 25 of the level-slip filter connected to the output port of the PWM unit. When the switch becomes non-conductive, the voltage output from the synchronous rectifier 18 is applied to the input port 25 of the electrical smoothing filter 28, 29. The magnitude and polarity of the voltage at the output of the level- slip filters 28, 29 presented to the current output port 30 of the current transfer circuit region 2 is controlled by the PWM 20 duty cycle.

The terminals of full-wave bridge rectifier 10 from which the PWM unit (and level-slip filter) receives the input current have a positive voltage polarity, while the terminals of synchronous rectifier unit 18 from which the smoothing filter receives the input current have a negative voltage polarity. The PWM unit operates to alternately combine the positive polarity voltage and the negative polarity voltage over a controlled period of time such that the voltage thus input to the level-slip filter input terminal 25 assumes an output voltage that, when smoothed by the smoothing filter, has a polarity and magnitude determined by the duration of the combined voltage. That is, the temporal width or duty cycle of the switches 24 of the PWM units 20, 24 controllably determines the magnitude and polarity of the voltage (derived from the bridge rectifier 10 and the synchronous rectifier 18) presented to the current output port 30 of the current delivery circuit region 2.

Thus, the magnitude and polarity of the voltage at the current output port 30 may be controllably varied in a manner such that it is suitably connected to either the current input port (typically positive polarity) of the "passive"/"sink" load 32 or the current input port (typically negative polarity) of the "active"/"pull" load 33. For illustrative purposes, both "active" and "passive" loads connected in this manner are shown in FIG. 2. However, in use, the load is typically of one type or the other alone, rather than both types at the same time.

Fig. 3 shows a circuit diagram of the elements of the current output circuit region 2 shown with the schematic of fig. 2.

The chopper control winding 7B includes a center-tapped winding, the terminal of which is connected to the ground line. The two pairs of diodes 60, 61 connected to the chopper control winding 7B are also both connected to the +5 volt rail (rail) and the-5 volt rail. A first pair of these diodes 60 comprises two diodes connected in series, the cathode terminals of the two diodes being connected to the +5 volt rail, and the anode terminals of the pair of diodes being connected to the-5 volt rail. The same arrangement is also applicable to the other pair of diodes 61 of the two pairs. Smoothing capacitors 62 are connected to a respective one of the +5 volt rail, the-5 volt rail, and the ground line. It should be noted that voltages other than +/-5 volts may also be provided to the rails described above.

A respective one of each of the two ends of the center-tap chopper control winding 7B is electrically connected to a respective one of the diodes 60, 61 at a point between the two pairs of diodes 60, 61, and is also electrically connected to the gate terminal of the field effect transistor (FET: 65, 66, 67, 68) of the chopper unit 5. The chopper unit 5 includes a chopper winding 5B, terminal ends of the chopper winding 5B being electrically connected to the two pairs of FETs 66, 67; 65. 68, wherein the two pairs of FETs are connected to opposite respective ends of the chopper winding 5B. The drain terminal of one FET 67, 68 of each of the two pairs of FETs is connected to the ground rail of the current output circuit region 2, while the drain terminal of the other FET 65, 66 of each of the two pairs of FETs is connected to the current output port of the variable impedance unit 34 of the current controller, thereby receiving, in use, current input to the current input terminal 31 of the circuit from a load (pull-load or sink-load) connected thereto.

Resistor 69 connects the gate terminals of each respective pair of two pairs of FETs on either side of chopper winding 5B. The voltage from the chopper control winding 7B is fed to the gate terminal via a resistor 69 to control the conductivity of the FET in question, thereby accurately operating the chopper.

It should be noted that the terminal end of the chopper control winding 7B is connected not only to the FET of the chopper unit 5 but also to the gates "G" of the FETs 40, 41, 42, 43 of the synchronous rectifier unit 18 described above at the same time. This allows the gate of the FET of the synchronous rectifier unit to be supplied with a gate voltage signal via an intermediate resistor and capacitor connected between the chopper control winding 7B and the FET gate terminal of the synchronous rectifier unit 18, as shown in fig. 3. It should be noted that the connections of the FETs of the synchronous rectifier 18 (source and drain terminals) and the FETs of the chopper circuit 5 are different with respect to the respective transformer windings they serve. The operation of the synchronous rectifier unit 18 and the full-wave bridge rectifier unit 10 will be described in detail with reference to fig. 4A and 4B and with reference to fig. 5A to 5E, respectively.

Fig. 3 shows the main circuit elements of the current output circuit in fig. 2 in more detail.

The synchronous rectifier 18 comprises an arrangement of four Field Effect (FET) transistors 40, 41, 42, 43 arranged in the form of a bridge. The drain terminal of each of the four transistors is connected to the power winding 17 of the current output circuit, one pair 40, 42 of the four transistors being connected in this way to one end of the power winding, the other pair 41, 43 of the four transistors being connected to the other end of the power winding. In each such pair of transistors, one of the two transistors of the pair is a P-type transistor arranged such that its source terminal is connected to the ground rail of the current output circuit, while the other transistor of the pair is an N-type transistor arranged such that its source terminal is connected to the output port 30 of the current output circuit via the schottky diode 26 and the smoothing circuits 28, 29 of the current output circuit described with reference to fig. 1 above.

The gate terminal of each of the four transistors of the synchronous rectifier is connected to the unrectified output signal of the chopper control winding 7B. The transistor gate terminal of each of the first pair of transistors 40, 42 of the synchronous rectifier is connected to one end of the chopper control winding 7B, while the transistor gate terminal of each of the second pair of transistors 41, 43 of the synchronous rectifier is connected to the other end of the chopper control winding 7B.

Thus, since the polarity of the voltage at one end of the chopper control winding 7B is alternated, this end provides a sequence of voltage pulses of alternating polarity that is inverted with respect to the polarity of the voltage provided at the other end of the chopper control winding 7B. Thus, voltage signals of opposite polarity, alternating in time, are fed to the gate terminals of the first pair of transistors 40, 42 of the synchronous rectifier 18, respectively, while being fed to the gate terminals of the second pair of transistors 41, 43 of the synchronous rectifier. The result of these opposite polarities at the gate terminals of the synchronous rectifier transistors, which are connected to the power winding 17, allows the transistors to provide synchronous rectification of the ac voltage provided at the power winding 17. Since the transistors of the synchronous rectifier are Field Effect (FET) transistors, electrons can flow through these transistors in any direction through the channel (resistive channel) created in any one of the FET transistors when turned "on" by applying a suitable voltage signal to the gate terminal of the transistor in question. With this characteristic of the FET transistor, current can be drawn through power winding 17 when the voltage polarity of the power winding is negative. As a result, the synchronous rectifier 18 is able to provide a rectified negative voltage from the voltage provided at the power supply winding for output to the output terminal 30 of the current output circuit as required when connecting a pull-load to the output terminal 30 of the current output circuit.

A P-type FET transistor is characterized in that the transistor becomes non-conductive when the polarity of the voltage applied to the gate terminal of the transistor is positive, and becomes conductive when the polarity of the gate voltage is negative. In contrast, the characteristics of an N-type FET transistor are reversed in this respect. In particular, with an N-type FET transistor, when the polarity of the voltage applied to the gate terminal is negative, the transistor becomes non-conductive, and the transistor is made conductive by applying a positive voltage. This means that in the arrangement shown in fig. 3, in which the gate terminal of each transistor of a given transistor pair (one being N-type and the other being P-type) is arranged to receive the common voltage from the chopper control winding 7, when the polarity of the chopper control voltage is positive, the P-type FET of the transistor pair becomes non-conductive and the N-type transistor of the transistor pair becomes conductive.

Conversely, when the polarity of the chopper control voltage is negative, the P-type FET of the transistor pair becomes conductive and the N-type transistor of the pair becomes non-conductive. Thus, at any given moment, the P-type FET transistor of one of the two transistor pairs, which connects one end of the power winding 17 to ground, is conductive, while the N-type FET transistor of the other transistor pair, which connects the other end of the power winding 17 to the output terminal 30 of the circuit, is also conductive. The two conducting FET transistors enable an electrical connection to be made between the ground rail of the current output circuit and the current output port 30 of the circuit via the power winding 17. Since each FET transistor has the characteristic of causing current to flow in any direction, when in the "on" state (i.e., one is conductive), this means that when the polarity of the power winding is negative, the power winding 17 can become electrically connected (i.e., connected) to the output terminal 30 of the current transfer circuit, thereby presenting a negative polarity voltage to the output terminal 30 of the current output circuit.

Fig. 4A and 4B schematically illustrate this synchronous operation of synchronous rectifier 18 driven by chopper control winding 7B. Note that at any given time, the polarity of the chopper control winding is opposite to the polarity of the power winding 17. This ensures that a positive gate voltage is applied to the transistor of the synchronous rectifier which is electrically coupled to one end of the power winding, which in this case has the opposite voltage polarity. This ensures that the negative terminal of the power winding is always presented to the output port 30 of the current output circuit by the FET transistor synchronously controlled by the chopper control winding 7B.

This operation is in contrast to the operation of full-wave bridge rectifier 10 of a current output circuit that can only provide a rectified positive polarity voltage at output terminal 30 of the current output circuit. This is because the diodes 44, 45 are able to conduct in one direction when the voltage between them has the appropriate polarity. In particular, as shown in fig. 5A and 5B, these diodes are turned on only when the polarity of the voltage applied to the anode of the rectifier 10 through one end of the power winding 17 is positive. This means that current is only allowed to flow through the rectifier 10 in this manner to present the positive polarity end of the power winding 17 to the output terminals, and the negative polarity end of the power winding cannot be coupled to the output port 30. In this way, the result is that the rectifier 10 of the current supply circuit can only provide a positive voltage at the output port 30 of the current supply circuit.

The effect of providing a synchronous rectifier circuit 18 driven by the chopper control winding 7 as described above is therefore to be able to present a rectified voltage of negative polarity to the output port 30 of the current supply circuit and a rectified voltage of positive polarity to this output port when appropriate, for example when a pull load is connected between the output terminal 30 and the input terminal 31 of the circuit.

Fig. 5C-5E schematically illustrate how the second full wave bridge rectifier cannot replace the synchronous rectifier unit 18 in a manner that would provide the functionality of the synchronous rectifier unit 18 described above with reference to fig. 2 and 3. Referring to fig. 5C, this shows an arrangement in which the synchronous rectifier 18 of fig. 2 and 3 is replaced by another full wave bridge rectifier. The result is a first bridge rectifier comprising two pairs of diodes 44A, 45A, the diodes 44A, 45A having their terminal cathodes connected to the positive voltage rail and their terminal anodes connected to the ground rail (0 v). Meanwhile, the second bridge rectifier comprises two pairs of diodes 44B, 45B, the diodes 44B, 45B having their terminal cathodes connected to the negative voltage rail and their terminal anodes connected to the ground rail.

Each end of the power winding 17 is connected to a respective one of the two pairs of diodes of the two bridges. When the PWM unit is "on", the current (I)_{Output of}) May flow from the first bridge to the level-slip filter and may be returned via the ground rail of the bridge, as schematically shown in fig. 5D. However, when the PWM unit is "off" and current is prevented from flowing from the first bridge to the level-slip circuit, no current flows in the same direction from the second bridge rectifiers 44B, 45B, as shown in fig. 5C. This is because of the current (I)_{Output of}) May only flow from the ground rail and return via the negative voltage rail as shown in fig. 5E. This is exactly opposite to the desired current flow direction, wherein the current has to flow outwardly from the power winding 17 towards the current output terminal 30 of the current output circuit region 2. The synchronous rectifier unit 18 is able to achieve this.

Fig. 6 and 7 relate to the operation of the PWM units 20, 24 in combination with the current controller unit 22 of fig. 3.

The PWM unit comprises a pair of voltage comparator units 50, 51, each comprising an inverting input port and a non-inverting input port. The non-inverting input port of each voltage comparator is electrically connected to the current input port 31 of the current output circuit region 2 to receive as input the voltage level provided at the current input port 31. The inverting input port of each of the two voltage comparators is electrically connected to a respective one of two opposite ends of the chopper control winding 7B via an intermediate respective RC filter 48, 49, 46, 47. This means that the inverting input of each voltage comparator is fed with a voltage signal derived from and synchronized with the voltage generated at the chopper control winding 7B. This is also synchronized with the drive signal provided by the chopper control winding 7B to the gate (G) of the FET of the synchronous rectifier unit 18.

In particular, each voltage comparator of the PWM unit 20 is connected to a respective end of the chopper control winding through filter means comprising a pair of resistors 46 forming a voltage divider. One end resistor of the voltage divider is connected to one end of the chopper control winding 7B and the other end resistor of the voltage divider is connected to the 5 volt rail (other voltages may be used). The intermediate point between these two end resistors is connected to the inverting input port of the respective voltage comparator 50, 51 and is also connected to the ground rail via the capacitor 47 of the filter, which provides an RC filter arrangement. The voltage level fed to the inverting input through the RC filter rises monotonically (exponentially) when the chopper control winding 7B supplies a positive voltage to the voltage divider 46, 48 of the RC filter in question, and falls exponentially when the chopper control winding supplies a negative voltage to the voltage divider (i.e. the capacitor 47 or 48 discharges in this case).

The result is a sawtooth voltage (V) provided to the inverting input of each voltage comparator_G) (and labeled "-") in the form shown in FIG. 6. At the same time, the voltage (V) at the current input port 31_{Input device}) Is fed to the non-inverting input of each voltage comparator 50, 51 via an electrical connection and 23. Each voltage comparator generates a PWM signal (V) at its output port_S) The PWM signal is formed by the difference (V) between the input voltages thereof_{Input device}–V_G) To be determined. The open collector outputs of the two comparators are out of phase as driven by opposite ends of chopper control winding 7B and combine via resistor 52 at twice the oscillation frequency of chopper control winding 7B to drive the base terminal of PNP bipolar junction transistor switch 24. The operation of switch 24 is to amplify the small current leaving its base terminal at the collector output of the switch. That is, PNP transistor switch 24 is "turned on" when the base voltage of PNP transistor switch 24 is pulled low relative to its emitter voltage. Fig. 7 schematically shows the arrangement of the base terminal B, emitter terminal E and collector terminal C of the PNP transistor switch 24 with respect to one of the voltage comparators 50, 51 of the PWM unit and the level- slip filters 28, 29. Although the operation of the switch 24 is described herein in terms of a PNP transistor, the PWM transistor 24 is not limited to a PNP transistor and may be, for example, a Pch MOSFET in other arrangements.

Sawtooth voltage (V)_G) Is fed to the inverting input (-) of the voltage comparator which is synchronized with the voltage from the chopper control winding 7B applied to the gates of a respective one of the two pairs of FETs of the synchronous rectifier 18. Voltage (V) from current input port 31 of current output circuit region 2_{Input device}) Are simultaneously fed to the non-inverting inputs (+).

When V is_{Input device}Less than V_gTime, output voltage V_SLow, drawing current from the base of PNP transistor switch 24. When the voltage at the base terminal V_SAt low, a positive polarity voltage + V from the bridge rectifier unit 10 is fed to the emitter terminal E of the switch 24 and current flows from the emitter terminal E to the collector terminal C of the switch (i.e. the switch is "on"). When the switch is "on", a positive voltage + V (less than the voltage drop across switch 24) is applied to the input ports of electrical smoothing circuits 28, 29. The level-slip circuit comprises an inductor 28 at its input port, followed by a capacitor 29 connected in parallel with the ground line. Output terminal and current output of inductorThe current output ports 30 of the circuit region 2 are connected in series, as are the non-ground terminals of the capacitors 29 of the smoothing filter.

When V is shown in FIG. 6_{Input device}Higher than sawtooth voltage (V)_G) At the time, the output voltage V applied to the base terminal B of the switch 24_SRising, the switch "turns off" and the current in inductor 28 is forced to flow from the negative voltage from synchronous rectifier 80 via diode 26. The resulting PWM voltage is applied to the inductor 28 of the smoothing circuit. The voltage developed across capacitor 29 is sufficient to drive the load plus current control circuit 22. The voltage across the current control circuit 22 is the current input voltage 22 that controls the PWM. It will have a sawtooth waveform (V) at 100% PWM duty cycle (maximum loading voltage)_G) Peak of (d) and sawtooth waveform (V) at 0% PWM duty cycle (maximum pull-up voltage)_G) To the trough of the wave.

The values of the resistors of the voltage dividers 46, 48 and the values of the capacitors 47, 49 forming an RC filter at the inverting input of the differential amplifier are selected to determine the sawtooth waveform (V)_G) Suitable rates of rise and fall. For example, the RC filter may be set to allow a saw-tooth type voltage at 1 volt<V_G<Up/down in the voltage range of 2 volts. Thus, the voltage (V) fed to the non-inverting input_{Input device}) The value will rise and fall within this voltage range. In response to V_{Input device}The switch 24 of the PWM unit 20 is in an "on" state for a short time, the net effect being that the voltage input to the LC smoothing circuits 28, 29 has a reduced positive component from the bridge rectifier 10 relative to the negative voltage component from the synchronous rectifier 18. Smoothed outputs (V) of the LC smoothing circuits 20, 20_{Output of}) The value decreases (i.e., becomes less positive and becomes negative). This has the effect of causing current to be output at the input port 31 of the circuit region 2 (V)_{Input device}) The voltage at that point is dropped and therefore regulated, as the input voltage drops, the duration for the switch 24 to "turn on" rises and the larger component of the positive voltage from the bridge rectifier 10 is combined with the negative voltage from the synchronous rectifier 18. The net result(net result) once smoothed by the LC level-smoothing circuits 28, 29, the output voltage (V) at the current output port 30 and at the same time at the current input port 31_{Output of}) Rises, wherein a voltage (V) is input at the current input port 31_{Input device}) Rising in series. Thus, a feedback loop is provided to regulate the output voltage (V) at the current output port 30_{Output of}) And by monitoring the input voltage (V) in the PWM device_{Input device}) To regulate the input voltage (V) at the current input port_{Input device})。

In this regard, it is instructive to consider an example of the operation and function of the current output circuit region 2 of fig. 2, hereinafter simply referred to as a current output device, to assist in understanding the preferred embodiment of the present invention.

In summary, the current output device of fig. 2 comprises a circuit configured for supplying a current to a pull/active load 33 or a sink/passive load 32 connected to a current output terminal 30 and a current input terminal 31 of the device. The pull/active load comprises a load (active load) and its own internal power supply (providing a voltage V)_{Pulling device}) And passive load elements, and are therefore referred to in the art as "pull loads". Sink/passive loads include loads (passive loads) that do not have any power source of their own and are therefore referred to in the art as "sink loads". A passive load is thus a special case of an active load, in which case it can be conceptually considered that there is an internal power source but zero power is generated. The device of fig. 2 is arranged to be connected to one or the other sink load and to a pull load separately, but both load types are shown in fig. 2 for illustrating how each load is connected to the current input/output terminals of the device. In fact, only one of the two loads is so connected at any one time. It is noted that the negative polarity terminal of the internal voltage source of the active load 33 will be connected to the current output terminal of the device and the passive elements of the load will be connected to the current input terminal of the device.

This connection device contrasts with a connection device for a current output device, as shown in fig. 1, in which the negative terminal of the internal voltage source of the pull load 33 is connected to the ground output terminal 35 of the current output device, which is a completely different arrangement than the output terminal 30 for connection to the sink/passive load 32. Indeed, the graph of fig. 1 illustrates how one such circuit (unmodified) cannot be used to connect to each of the sink and pull loads.

The current output device circuit comprises a power supply unit 3, 17, which power supply unit 3, 17 is connected to a voltage regulator unit 20, 23, 24, so that power can be supplied from the power supply unit to the voltage regulator. The voltage regulator is arranged to control the magnitude and polarity of the voltage supplied to the first terminal (current output terminal 30') with the voltage supplied by the power supply unit.

The current output device further comprises a current controller unit 22, which current controller unit 22 comprises a variable impedance unit 34 in the form of a MOSFET, and an operational amplifier 35. The grounded non-inverting input terminal of the operational amplifier provides a reference voltage signal and the voltage on the chopper is connected to the inverting input terminal of the operational amplifier (see fig. 3) to maintain a nominal 0V (for transmission accuracy) on the chopper 5. The variable impedance unit 34 may not be a MOSFET and may be an NPN/PNP Darlington circuit (see fig. 3), or an NPN Darlington circuit (not shown), or an Nch depletion MOSFET, or an NPN/Pch pair circuit, or other suitable circuit that provides a controllable variable impedance to input current through the variable resistance. This may also be applicable in alternative arrangements, for example, in which the signal chopper 5 is omitted. Fig. 8 shows an example. In the portion of the circuit between the variable impedance unit 34 and the 0V (ground) terminal to which the variable impedance unit 34 is connected, the input voltage will be the product of the desired output current and the resistance (R, e.g., 250 ohms). Another example is shown in fig. 9. The reference numerals in fig. 8 and 9 are the same as those shown in fig. 3, e.g. the contents of items 7, 10, 18, 20 are the same as those of items 7, 10, 18, 20 described with reference to fig. 3.

The reference voltage signal is input to a non-inverting input of the two inputs of the comparator circuit 35 to provide the comparator with the reference voltage signal. A resistor (fig. 3) is connected in series with the variable impedance unit 34 and the current input terminal 31 of the current output device to allow the return current to flow from the input terminal through the resistor. The inverting input of the comparator is connected to a point following the resistor such that the resistor is connected between the variable impedance unit and the inverting input terminal of the comparator to feed the voltage dropped across the resistor to the inverting input terminal for comparison with the reference voltage signal. The voltage dropped across the resistor represents the current delivered to the load via the current output/input terminals of the device.

The current control unit 22 controls the impedance of the variable impedance unit 34 in response to a comparison of the reference voltage signal and the voltage dropped across the resistor to control the current delivered to the chopper circuit 5 to a desired current level.

The drain (or collector (if a compound darlington circuit)) terminal of transistor 34 is connected to a current input terminal 31, which current input terminal 31 has a small positive voltage (relative to 0V) to ensure low power consumption in transistor circuit 34. The source (or emitter) terminal of the transistor is connected to a resistor, so that the resistor forms a voltage drop across itself proportional to the current flowing through it. This voltage provides a feedback voltage signal for the comparator circuit. The output of the comparator circuit (differential amplifier 35) is connected to the gate of the transistor circuit so that a control signal is applied to the gate terminal in accordance with a comparison between signals present at its inverting and non-inverting inputs simultaneously. Thereby adjusting the impedance of the transistor circuit in accordance with the value of the control signal.

The Pulse Width Modulation (PWM) unit 20 controls a voltage supplied to the current output terminal 30. The PWM unit is arranged to provide a voltage to the current output terminal that is different from the voltage applied to the current input terminal 31, ensuring that a required predetermined amount of current is provided to the load at the output terminal 30 as required. The voltage difference (Δ V) between the output terminal 30 and the input terminal 31 of the device is given by:

for a pull load:

ΔV＝V_{output of}–V_{Input device}＝(I_{Output of}R_Load(s)–V_{Pulling device})

Wherein the resistance of the load is R_Load(s). Therefore, the temperature of the molten metal is controlled,

V_{output of}＝V_{Input device}+(I_{Output of}R_Load(s)–V_{Pulling device})

It should be understood that although both a "pull" load and a "sink" load are shown in FIG. 2, the present invention may be operated to separately apply either a "pull" load or a "sink" load as desired during use. In the former case, the "passive load" in fig. 2 would not be present, while in the latter case the "active load" would not be present. Thus, in the case of a "sink" load, the voltage difference Δ V between the output and input terminals of the device is given by:

for irrigation load (V)_{Pulling device}＝0)：

ΔV＝V_{Output of}–V_{Input device}＝I_{Output of}R_Load(s)

Wherein the resistance of the load is R_Load(s). Therefore, the temperature of the molten metal is controlled,

V_{input device}＝V_{Output of}–I_{Output of}R_Load(s)

Regulating the voltage applied to the output terminal 30 (V) according to the voltage across the load_{Output of}) The voltage value of (a) is only due to the load resistance (I) in the case of a sinking load_{Output of}R_Load(s)) Or in a "pull" load (I)_{Output of}R_Load(s)–V_{Pulling device}) Due to the additional voltage of the internal power supply. While performing the voltage regulation, the current controller supplies the current (I)_{Output of}) Is maintained at a desired predetermined value. Thus, given (I)_{Output of}R_Load(s)) And (V)_{Pulling device}) Is not a freely variable parameter but is constrained by the load properties. Thus, in order to provide a predetermined current to the load, the invention is arranged to vary the parameter V_{Output of}Thereby controlling V_{Input device}While maintaining av substantially stable or constant, as required by the load supplied with current.

In order to make Δ V substantially stable or constant, the PWM unit 20 is electrically connected to the current input terminal 31 of the device, thereby applying a voltage V to the input terminal_{Input device}The value of (a) is sampled. With this information, the voltage regulator is arranged to maintain the condition V by ensuring that it is substantially maintained_{Output of}＝ΔV+V_{Input device}An appropriate voltage (V) is supplied to the output terminal 30_{Output of}) This results in the desired voltage (V) being generated at input terminal 31_{Input device})。

Therefore, the "overvoltage" (V) is given by the following relation_{Input device}) Controlled to as low as possible:

V_{input device}＝V_{Output of}+(V_{Pulling device}–I_{Output of}R_Load(s))。

Term (V)_{Output of}) May be negative because a voltage is available at the current output port 30, which negative voltage may reduce the net value of the overvoltage (output voltage). As a result V_{Input device}Low (or negative) so that less power is dissipated in the circuitry of the device. This is done by pulling power from the load (V)_{Pulling device}) Flowing out to reduce the amount of current drawn from the external power supply 3A.

It is desirable to maintain a voltage value (V) at the input terminal that is preferably less than about 20V, but greater than zero_{Input device}): i.e. 0V<V_{Input device}<20V. More preferably, it is desirable to maintain a voltage value (V) at the input terminal that is preferably less than about 10V, but greater than zero_{Input device}): i.e. 0V<V_{Input device}<10V. More preferably, however, it is desirable to maintain a voltage value (V) at the input terminal that is preferably less than about 5V, but greater than zero_{Input device}): i.e. 0V<V_{Input device}<5V. Most preferably, it is desirable to maintain a voltage value (V) at the input terminal that is preferably less than about 3V, but greater than zero_{Input device}): i.e. 0V<V_{Input device}<3V. A value between about 1V to about 2V is desirable.

These voltage values result in a very low amount of power dissipation at the variable impedance unit 34 of the current controller. This means that power wastage is reduced and the potential for damage to the variable impedance unit is avoided or minimised.

The voltage (V) at the pair of output terminals 30_{Output of}) As a result of the arrangement for controlling, it is possible to make a suitable choice of the value of the output voltage provided by the PWM unit 20, while still maintaining a favourably low value of the input voltage (V)_{Input device}) The same device is used to supply current to either a "pull" load or a "sink" load.

Indeed, when connected to a "pull" load, the PWM unit 20 may control the voltage (V) at the output terminal 30, if appropriate_{Output of}) So that it has a negative polarity. Due to the negative polarity at the current output terminal, the device is able to draw power from the power source within the pull load to the current output terminal 30 rather than to the current input terminal 31. Electric current (I)_{Output of}) Flows out from the current output terminal 30 to the current input terminal 31 by pulling a load, however, since the current is "positive" and the voltage applied to the current output terminal 30 is "negative", the resultant power (P) output from the current output terminal 30_{Output of}＝I_{Output of}V_{Output of}) Is negative (i.e. I)_{Output of}>0, but V_{Output of}<0). This means that power does not flow from the current output terminal 30, but from the power supply (V) pulling the load_{Pulling device}) Flows into the current output terminal 30. Power from the pull load flows into the power supply unit 3 which supplies the device, rather than being dissipated in the variable impedance unit 34 as would otherwise be the case. This reduces the amount of current drawn from the external power supply unit 3A.

The PWM unit 20 is operable to vary the voltage (V) supplied to the first terminal 30 in a process of mixing two separated DC voltages of opposite polarities (i.e., one + ve, one-ve) in a variably controlled proportion by a Pulse Width Modulation (PWM) process_{Output of}) The size of (2). By ensuring that the proportion of DC current drawn from the voltage of-ve polarity exceeds the proportion of DC current drawn from the voltage of + ve polarity, the net result of this combination is an effective output voltage (V)_{Output of}) Wherein the effective output voltage is negative in polarity but variable (adjustable as needed).

To this end, in a preferred embodiment, said voltageThe regulator comprises a switching unit arranged to provide said voltage regulator with a voltage alternately switching between said positive and negative polarity direct voltage, the result being subsequently smoothed. The voltage regulator is arranged to alternately supply a voltage of positive polarity and then a voltage of negative polarity to the smoothing circuits 28, 29 for selected respective time periods. The smoothing circuit outputs the result to a first terminal ("output"), i.e., a current output terminal. In this way, the voltage (V) output by the voltage regulator is controlled by changing the time ratio of the connection of the smoothing circuit to the positive polarity DC voltage or the negative polarity DC voltage_{Output of}) The size of (2). Whereby a smoothed voltage (V) of continuously controllable magnitude and polarity can be supplied to the current output terminal_{Output of})。

The positive and negative polarity dc voltages are generated as concurrent outputs of the rectifier unit 10 and the synchronous rectifier unit 18 of fig. 2 and 3. Each rectifier is fed by a secondary transformer winding 17 of the power transformer unit, for which the transformer driver 3C provides a transformer primary winding portion.

It should be noted that although the embodiments of the current output device of the present invention described with reference to fig. 2 to 9 relate to a current output device in the form of a current transmission device, the present invention is not limited to a current transmission device. For example, the invention is applicable to a current output representing any measurement signal from an isolated input area.

That is, in the examples shown in fig. 2 to 9, the signal output by the current output device 2, which outputs the result at the output area 2, represents the value of the current signal generated in the isolated input area 1 and transmitted to the output area 2. This arrangement is a "current follower" arrangement in which chopper circuits 6, 7 of the input region 1 and the output region 2 are employed for the purpose of transmitting a signal (a value characterizing the current) from the input region to the output region.

However, in other applications of the current output device of the present invention, the transmitted signal may represent something other than the value of the current in the input area 1. Means other than chopper circuits may be used to transmit the signal from the input area 1 to the output area 2. An example of this more general application is schematically illustrated in figure 10. In fig. 10, compared to fig. 2, the chopper circuit 6 of the input area 1 is replaced with an isolated input interface 100, which isolated input interface 100 may be a chopper or may be an optoelectronic unit for outputting an optical signal that conveys a magnitude (e.g., current, voltage, etc.) to be transmitted to the output area 2. In fig. 10, compared to fig. 2, the chopper circuit 5 of the output area 2 is replaced by an isolated input interface 120, which isolated input interface 120 may be a corresponding chopper or may be a corresponding electro-optical unit for receiving the above mentioned optical signal, which optical signal conveys the value of the quantity (e.g. current, voltage, etc.) transmitted to the output area 2. The transformers 4, 5B, 6B of fig. 2 are replaced by galvanic isolation units 110, which galvanic isolation units 110 may be transformers (according to fig. 2) or may be means for transmitting the above mentioned optical signals.

In fig. 10, compared to fig. 2, the current feed 11, or alternatively a suitable current pull 12, is replaced by a transmitter unit 130. The transmitter unit may be any unit that transmits signals from an input area to an output area via the galvanically isolated transmission means 110. In fig. 2, the transmitter unit 130 happens to be a current feed 11, or alternatively a suitable current pull 12. In other embodiments, the transmitter unit 130 may be a transmitter of a voltage signal, rather than a transmitter of a current signal.

While several preferred embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes and modifications may be made therein without departing from the scope of the invention as defined in the following claims.

Attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such mutually exclusive features and/or steps are mutually exclusive.

Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.

The invention is not limited to the details of one or more of the embodiments described above. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.