Communication method and related device for global system for mobile communication (GSM) data

文档序号：143024 发布日期：2021-10-22 浏览：33次中文

阅读说明：本技术 一种全球移动通信系统gsm数据的通信方法和相关装置 (Communication method and related device for global system for mobile communication (GSM) data ) 是由蓝庆华姚国强王东亚于 2020-03-31 设计创作，主要内容包括：本申请提供了一种全球移动通信系统GSM数据的通信方法和相关装置,该装置包括基站处理芯片和采样速率带宽调整装置,其中,所述基站处理芯片,用于向所述采样速率带宽调整装置传输第一GSM下行数据或第一GSM上行数据；所述采样速率带宽调整装置,用于向所述基站处理芯片发送第二GSM下行数据或第二GSM上行数据,所述第二GSM下行数据是对所述第一GSM下行数据的采样速率和带宽进行调整后确定的,所述第二GSM上行数据是对所述第一GSM上行数据的采样速率和带宽进行调整后确定的。实施本申请实施例,解决了现有的无线回传一体化基站只支持LTE制式、扩展性差、难以支持多种制式的问题。(The device comprises a base station processing chip and a sampling rate bandwidth adjusting device, wherein the base station processing chip is used for transmitting first GSM downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device; the sampling rate bandwidth adjusting device is configured to send second GSM downlink data or second GSM uplink data to the base station processing chip, where the second GSM downlink data is determined after adjusting the sampling rate and the bandwidth of the first GSM downlink data, and the second GSM uplink data is determined after adjusting the sampling rate and the bandwidth of the first GSM uplink data. By implementing the embodiment of the application, the problems that the existing wireless backhaul integrated base station only supports the LTE system, has poor expansibility and is difficult to support various systems are solved.)

1. A communication apparatus, comprising a base station processing chip and a sampling rate bandwidth adjustment apparatus, wherein,

the base station processing chip is used for transmitting first global system for mobile communications (GSM) downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device;

the sampling rate bandwidth adjusting device is configured to send second GSM downlink data or second GSM uplink data to the base station processing chip, where the second GSM downlink data is determined after adjusting the sampling rate and the bandwidth of the first GSM downlink data, and the second GSM uplink data is determined after adjusting the sampling rate and the bandwidth of the first GSM uplink data.

2. The apparatus of claim 1, wherein the sampling rate and bandwidth of the second GSM downlink data satisfy the sampling rate and bandwidth of Long Term Evolution (LTE) downlink data, and wherein the sampling rate and bandwidth of the second GSM uplink data satisfy the sampling rate and bandwidth of LTE uplink data.

3. The apparatus of claim 1 or 2, wherein the sampling rate bandwidth adjusting means comprises a Field Programmable Gate Array (FPGA) means and a global system for mobile communications (GSM) baseband processing means, and the second GSM downstream data is sent to the base station processing chip,

the FPGA device is used for framing the first GSM downlink data to obtain third GSM downlink data, and transmitting the third GSM downlink data to the GSM baseband processing device;

the GSM baseband processing device is configured to perform L1 baseband processing on the third GSM downlink data to obtain two paths of orthogonal first baseband IQ data, and transmit the first baseband IQ data to the FPGA device;

the FPGA device is further configured to transmit second GSM downlink data to the base station processing chip, where the second GSM downlink data is determined after adjusting the sampling rate and the bandwidth of the first baseband IQ data.

4. The apparatus according to claim 3, wherein before transmitting the second GSM downlink data to the base station processing chip, the FPGA apparatus is specifically configured to expand a bit width of the first baseband IQ data to obtain second baseband IQ data, where the bit width of the second baseband IQ data is higher than the bit width of the first baseband IQ data; performing digital interpolation filtering on the second baseband IQ data to obtain third baseband IQ data, wherein the sampling rate of the third baseband IQ data is higher than that of the second baseband IQ data; and carrying out sampling rate conversion on the third baseband IQ data to obtain the second GSM downlink data.

5. The device of any one of claims 1-4, further comprising a radio frequency integrated device,

the base station processing chip is further configured to perform intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data;

and the radio frequency integrated device is used for carrying out radio frequency modulation and amplification processing on the fourth GSM downlink data and transmitting the amplified fourth GSM downlink data.

6. The apparatus of claim 1 or 2, wherein the sampling rate bandwidth adjusting means comprises a Field Programmable Gate Array (FPGA) means and a global system for mobile communications (GSM) baseband processing means, before sending the second GSM uplink data to the base station processing chip, wherein,

the FPGA device is used for transmitting third GSM uplink data to the GSM baseband processing device, wherein the third GSM uplink data is determined after the speed and the bandwidth of the second GSM uplink data are adjusted;

the GSM baseband processing device is configured to perform L1 baseband processing on the third GSM uplink data to obtain two paths of orthogonal fifth baseband IQ data, and transmit the fifth baseband IQ data to the FPGA device;

the FPGA device is further configured to unframe the fifth baseband IQ data to obtain the second GSM uplink data.

7. The apparatus according to claim 6, wherein before transmitting third GSM uplink data to the GSM baseband processing apparatus, the FPGA apparatus is specifically configured to perform sampling rate conversion and bit width expansion on the second GSM uplink data to obtain sixth baseband IQ data, where a bit width of the sixth baseband IQ data is higher than a bit width of the second GSM uplink data, and a sampling rate of the sixth baseband IQ data is lower than a sampling rate of the second GSM uplink data; performing data extraction and filtering on the sixth baseband IQ data to obtain seventh baseband IQ data, wherein the sampling rate of the seventh baseband IQ data is lower than that of the sixth baseband IQ data; carrying out normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data; reducing the bit width of the eighth baseband IQ data and adjusting the power of the eighth baseband IQ data to obtain the third GSM uplink data, wherein the bit width of the third GSM uplink data is lower than the bit width of the eighth baseband IQ data.

8. The apparatus of claim 1, 2, 6 or 7, further comprising a baseband processing unit,

the base station processing chip is also used for transmitting the second GSM uplink data to the baseband processing unit;

and the baseband processing unit is used for transmitting the second GSM uplink data to a base station control subsystem.

9. A method for communicating global system for mobile communications (GSM) data is applied to a communication device, wherein the communication device comprises a base station processing chip and a sampling rate bandwidth adjusting device, and comprises,

the base station processing chip transmits first GSM downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device;

and the sampling rate and bandwidth adjusting device sends second GSM downlink data or second GSM uplink data to the base station processing chip, wherein the second GSM downlink data is determined after adjusting the sampling rate and bandwidth of the first GSM downlink data, and the second GSM uplink data is determined after adjusting the sampling rate and bandwidth of the first GSM uplink data.

10. The method of claim 9, wherein the sampling rate and bandwidth of the second GSM downlink data satisfy the sampling rate and bandwidth of long term evolution, LTE, downlink data, and wherein the sampling rate and bandwidth of the second GSM uplink data satisfy the sampling rate and bandwidth of LTE uplink data.

11. The method of claim 9 or 10, wherein the sampling rate bandwidth adjusting device comprises a Field Programmable Gate Array (FPGA) device and a global system for mobile communications (GSM) baseband processing device, and the second GSM downlink data is sent to the base station processing chip, and the method further comprises:

the FPGA device frames the first GSM downlink data to obtain third GSM downlink data, and transmits the third GSM downlink data to the GSM baseband processing device;

the GSM baseband processing device performs L1 baseband processing on the third GSM downlink data to obtain two paths of orthogonal first baseband IQ data, and transmits the first baseband IQ data to the FPGA device;

and the FPGA device transmits second GSM downlink data to the base station processing chip, wherein the second GSM downlink data is determined after the sampling rate and the bandwidth of the first baseband IQ data are adjusted.

12. The method of claim 11, wherein before transmitting the second GSM downlink data to the base station processing chip, the method further comprises:

the FPGA device expands the bit width of the first baseband IQ data to obtain second baseband IQ data, wherein the bit width of the second baseband IQ data is higher than that of the first baseband IQ data;

the FPGA device carries out digital interpolation filtering on the second baseband IQ data to obtain third baseband IQ data, and the sampling rate of the third baseband IQ data is higher than that of the second baseband IQ data;

and the FPGA device carries out sampling rate conversion on the third baseband IQ data to obtain the second GSM downlink data.

13. The method of any of claims 9-12, wherein the communication device further comprises a radio frequency integrated device, the method further comprising:

the base station processing chip carries out intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data;

and the radio frequency integrated device performs radio frequency modulation and amplification processing on the fourth GSM downlink data and transmits the amplified fourth GSM downlink data.

14. The method according to claim 9 or 10, wherein the sampling rate bandwidth adjusting device comprises a field programmable gate array FPGA device and a global system for mobile communications GSM baseband processing device, and before sending the second GSM uplink data to the base station processing chip, the method further comprises:

the FPGA device transmits third GSM uplink data to the GSM baseband processing device, wherein the third GSM uplink data is determined after the rate and the bandwidth of the second GSM uplink data are adjusted;

the GSM baseband processing device performs L1 baseband processing on the third GSM uplink data to obtain two paths of orthogonal fifth baseband IQ data, and transmits the fifth baseband IQ data to the FPGA device;

and the FPGA device unframes the fifth baseband IQ data to obtain the second GSM uplink data.

15. The method of claim 14, wherein before transmitting the third GSM uplink data to the GSM baseband processing apparatus, the method further comprises:

the FPGA device performs sampling rate conversion and bit width expansion on the second GSM uplink data to obtain sixth baseband IQ data, wherein the bit width of the sixth baseband IQ data is higher than that of the second GSM uplink data, and the sampling rate of the sixth baseband IQ data is lower than that of the second GSM uplink data;

the FPGA device performs data extraction and filtering on the sixth baseband IQ data to obtain seventh baseband IQ data, wherein the sampling rate of the seventh baseband IQ data is lower than that of the sixth baseband IQ data;

the FPGA device performs normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data;

the FPGA device reduces a bit width of the eighth baseband IQ data and adjusts a power of the eighth baseband IQ data to obtain the third GSM uplink data, where the bit width of the third GSM uplink data is lower than the bit width of the eighth baseband IQ data.

16. The method of claim 8, 9, 14 or 15, wherein the communication device further comprises a baseband processing unit, and wherein the method further comprises:

the base station processing chip transmits the second GSM uplink data to the baseband processing unit;

and the baseband processing unit transmits the second GSM uplink data to a base station control subsystem.

17. A communication system, comprising a base station processing chip and a sampling rate bandwidth adjustment mechanism, wherein,

the base station processing chip is used for transmitting first global system for mobile communications (GSM) downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device;

18. A communications apparatus, comprising a memory, a plurality of processors, and a plurality of panels, each of the processors corresponding to one of the panels, the memory storing computer instructions; instructing one of the processors to execute the computer instructions stored by the memory to cause the apparatus to perform the method for communicating global system for mobile communications, GSM, data of any one of claims 9-16.

19. A computer-readable storage medium for storing executable program code, which when executed by a device, is configured to implement the method for communicating GSM data according to any one of claims 9-16.

Technical Field

The present application relates to the field of communications technologies, and in particular, to a method and a related apparatus for communicating global system for mobile communications (GSM) data.

Background

Currently, an application-specific integrated circuit (ASIC) system-on-a-chip (SOC) chip is mostly adopted for a wireless backhaul integrated base station. Generally, the chip may integrate processing functions such as Long Term Evolution (LTE) and wireless backhaul (Relay) technologies, and the Relay technology is also implemented based on an LTE standard. It can be seen that, in the prior art, the integration level of the wireless backhaul integrated base station is high, and generally only the LTE system is supported, and it is difficult to implement another wireless communication system on the basis of one wireless communication system. Therefore, the existing wireless backhaul integrated base station has poor expansibility and is difficult to support multiple systems.

Disclosure of Invention

The application provides a communication method and a related device for global system for mobile communication (GSM) data, which are used for solving the problems that the existing wireless backhaul integrated base station only supports an LTE system, has poor expansibility and is difficult to support various systems.

In a first aspect, the present application provides a communication apparatus, where the apparatus includes a base station processing chip and a sampling rate bandwidth adjusting apparatus, where the base station processing chip is configured to transmit first GSM downlink data or first GSM uplink data to the sampling rate bandwidth adjusting apparatus; the sampling rate bandwidth adjusting device is configured to send second GSM downlink data or second GSM uplink data to the base station processing chip, where the second GSM downlink data is determined after adjusting the sampling rate and the bandwidth of the first GSM downlink data, and the second GSM uplink data is determined after adjusting the sampling rate and the bandwidth of the first GSM uplink data.

Optionally, in a possible implementation manner, the sampling rate and the bandwidth of the second GSM downlink data meet the sampling rate and the bandwidth of long term evolution LTE downlink data, and the sampling rate and the bandwidth of the second GSM uplink data meet the sampling rate and the bandwidth of LTE uplink data.

Optionally, in a possible implementation, the sampling rate bandwidth adjusting device includes a field programmable gate array FPGA device and a global system for mobile communications GSM baseband processing device, and sends the second GSM downlink data to the base station processing chip, where,

the FPGA device is used for framing the first GSM downlink data to obtain third GSM downlink data, and transmitting the third GSM downlink data to the GSM baseband processing device;

Optionally, in a possible implementation manner, before transmitting the second GSM downlink data to the base station processing chip, the FPGA device is specifically configured to expand a bit width of the first baseband IQ data to obtain second baseband IQ data, where the bit width of the second baseband IQ data is higher than the bit width of the first baseband IQ data; performing digital interpolation filtering on the second baseband IQ data to obtain third baseband IQ data, wherein the sampling rate of the third baseband IQ data is higher than that of the second baseband IQ data; and carrying out sampling rate conversion on the third baseband IQ data to obtain the second GSM downlink data.

Optionally, in a possible implementation, the device further comprises a radio frequency integrated device,

the base station processing chip is further configured to perform intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data;

Optionally, in a possible implementation, the sampling rate bandwidth adjusting device includes a field programmable gate array FPGA device and a global system for mobile communications GSM baseband processing device, and before sending the second GSM uplink data to the base station processing chip, wherein,

the FPGA device is further configured to unframe the fifth baseband IQ data to obtain the second GSM uplink data.

Optionally, in a possible implementation manner, before the third GSM uplink data is transmitted to the GSM baseband processing apparatus, the FPGA apparatus is specifically configured to perform sampling rate conversion and bit width expansion on the fifth baseband IQ data to obtain sixth baseband IQ data, where the bit width of the sixth baseband IQ data is higher than the bit width of the fifth baseband IQ data, and the sampling rate of the sixth baseband IQ data is higher than the sampling rate of the fifth baseband IQ data; performing data extraction and filtering on the sixth baseband IQ data to obtain seventh baseband IQ data, wherein the sampling rate of the seventh baseband IQ data is lower than that of the sixth baseband IQ data; carrying out normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data; reducing the bit width of the eighth baseband IQ data and adjusting the power of the eighth baseband IQ data to obtain sixth baseband IQ data, wherein the bit width of the sixth baseband IQ data is lower than the bit width of the eighth baseband IQ data.

Optionally, in a possible implementation manner, the apparatus further includes a baseband processing unit,

the base station processing chip is also used for transmitting the second GSM uplink data to the baseband processing unit;

and the baseband processing unit is used for transmitting the second GSM uplink data to a base station control subsystem.

In a second aspect, the present application provides a method for communicating GSM data, the method is applied to a communication device, the communication device includes a base station processing chip and a sampling rate bandwidth adjusting device, wherein,

the base station processing chip transmits first GSM downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device;

It can be seen that, in the above technical solution, the base station processing chip transmits GSM downlink data or GSM uplink data to the sampling rate bandwidth adjustment device, and the sampling rate bandwidth adjustment device adjusts the sampling rate and bandwidth of the GSM downlink data or GSM uplink data, so that the base station processing chip supporting only the LTE scheme can support processing of the GSM downlink data or GSM uplink data, and also solve the problems that the existing wireless backhaul integrated base station only supports the LTE scheme, has poor expansibility, and is difficult to support multiple schemes.

It can be seen that, in the above technical solution, by letting the sampling rate and bandwidth of the second GSM downlink data meet the sampling rate and bandwidth of the long term evolution LTE downlink data, or letting the sampling rate and bandwidth of the second GSM uplink data meet the sampling rate and bandwidth of the LTE uplink data, the base station processing chip that only supports the LTE scheme can support processing of the GSM downlink data or GSM uplink data, and the problem that the existing wireless backhaul integrated base station only supports the LTE scheme, has poor extensibility, and is difficult to support multiple schemes is solved. Meanwhile, hardware cost is saved.

the sending of the second GSM downlink data to the base station processing chip further includes:

the FPGA device frames the first GSM downlink data to obtain third GSM downlink data, and transmits the third GSM downlink data to the GSM baseband processing device;

It can be seen that, in the above technical solution, the sampling rate and bandwidth adjusting device is used for adjusting the sampling rate and bandwidth of the GSM downlink data, so that the processing chip of the base station only supporting the LTE scheme can support the processing of the GSM downlink data, and the problems that the existing wireless backhaul integrated base station only supports the LTE scheme, has poor expansibility, and is difficult to support multiple schemes are also solved.

Optionally, in a possible implementation manner, before transmitting the second GSM downlink data to the base station processing chip, the method further includes:

and the FPGA device carries out sampling rate conversion on the third baseband IQ data to obtain the second GSM downlink data.

Therefore, in the technical scheme, the adjustment of the sampling rate and the bandwidth of the GSM downlink data is realized, so that the processing chip of the base station only supporting the LTE system can support the processing of the GSM downlink data in the following process, and the problems that the existing wireless backhaul integrated base station only supports the LTE system, has poor expansibility and is difficult to support multiple systems are solved.

Optionally, in a possible implementation, the communication device further includes a radio frequency integrated device, and the method further includes:

the base station processing chip carries out intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data;

and the radio frequency integrated device performs radio frequency modulation and amplification processing on the fourth GSM downlink data and transmits the amplified fourth GSM downlink data.

It can be seen that, in the above technical solution, the base station processing chip only supporting the LTE system can support processing of GSM downlink data, and transmit GSM downlink data is implemented.

Optionally, in a possible implementation, the sampling rate bandwidth adjusting apparatus includes a field programmable gate array FPGA apparatus and a global system for mobile communications GSM baseband processing apparatus, and before sending the second GSM uplink data to the base station processing chip, the method further includes:

and the FPGA device unframes the fifth baseband IQ data to obtain the second GSM uplink data.

It can be seen that, in the above technical solution, the sampling rate and bandwidth of the GSM uplink data are adjusted by the sampling rate and bandwidth adjusting device, so that the processing chip of the base station that only supports the LTE scheme can support processing of the GSM uplink data, and the problems that the existing wireless backhaul integrated base station only supports the LTE scheme, has poor expansibility, and is difficult to support multiple schemes are also solved.

Optionally, in a possible implementation manner, before transmitting the third GSM uplink data to the GSM baseband processing apparatus, the method further includes:

the FPGA device performs normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data;

Therefore, in the technical scheme, the adjustment of the sampling rate and the bandwidth of the GSM uplink data is realized, so that the processing chip of the base station only supporting the LTE standard can support the processing of the GSM uplink data in the following process, and the problems that the existing wireless backhaul integrated base station only supports the LTE standard, has poor expansibility and is difficult to support multiple standards are solved.

Optionally, in a possible implementation, the communication device further includes a baseband processing unit, and the method further includes:

the base station processing chip transmits the second GSM uplink data to the baseband processing unit;

and the baseband processing unit transmits the second GSM uplink data to a base station control subsystem.

Therefore, in the technical scheme, the base station processing chip only supporting the LTE system can support the processing of the GSM uplink data, and the GSM uplink data is sent to the base station control subsystem.

In a third aspect, the present application provides a communication system comprising a base station processing chip and a sampling rate bandwidth adjusting apparatus, wherein,

the base station processing chip is used for transmitting first global system for mobile communications (GSM) downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device;

the FPGA device is used for framing the first GSM downlink data to obtain third GSM downlink data, and transmitting the third GSM downlink data to the GSM baseband processing device;

Optionally, in a possible implementation, the system further comprises a radio frequency integrated device,

the base station processing chip is further configured to perform intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data;

Optionally, in a possible implementation, the sampling rate bandwidth adjusting device includes a field programmable gate array FPGA device and a global system for mobile communications GSM baseband processing device, and before sending the second GSM uplink data to the base station processing chip, wherein,

the FPGA device is further configured to unframe the fifth baseband IQ data to obtain the second GSM uplink data.

Optionally, in a possible implementation manner, before the third GSM uplink data is transmitted to the GSM baseband processing apparatus, the FPGA apparatus is specifically configured to perform sampling rate conversion and bit width expansion on the second GSM uplink data to obtain sixth baseband IQ data, where the bit width of the sixth baseband IQ data is higher than the bit width of the second GSM uplink data, and the sampling rate of the sixth baseband IQ data is lower than the sampling rate of the second GSM uplink data; performing data extraction and filtering on the sixth baseband IQ data to obtain seventh baseband IQ data, wherein the sampling rate of the seventh baseband IQ data is lower than that of the sixth baseband IQ data; carrying out normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data; reducing the bit width of the eighth baseband IQ data and adjusting the power of the eighth baseband IQ data to obtain the third GSM uplink data, wherein the bit width of the third GSM uplink data is lower than the bit width of the eighth baseband IQ data.

Optionally, in a possible implementation, the system further includes a baseband processing unit,

the base station processing chip is also used for transmitting the second GSM uplink data to the baseband processing unit;

and the baseband processing unit is used for transmitting the second GSM uplink data to a base station control subsystem.

In a fourth aspect, the present application further provides a communications apparatus comprising a memory, a plurality of processors, and a plurality of panels, each of the processors corresponding to one of the panels, the memory storing computer instructions; instructing one of the processors to execute the computer instructions stored in the memory to cause the apparatus to perform the method for communicating GSM data according to any embodiment of the second aspect.

In a fifth aspect, the present application further provides a computer-readable storage medium for storing executable program code, which when executed by a device, is configured to implement a method for performing communication of GSM data according to any implementation manner of the second aspect.

Drawings

Reference will now be made in brief to the drawings that are needed in describing embodiments or prior art.

Wherein:

fig. 1 is a schematic diagram of a wireless backhaul integrated base station according to an embodiment of the present application;

fig. 2 is a schematic diagram of the base station processing chip 1012 in fig. 1 for processing Relay data, UMTS data, and LTE data;

fig. 3 is a schematic diagram of a communication device according to an embodiment of the present application;

fig. 4 is a schematic diagram of processing the Relay data, UMTS data, and LTE data by the base station processing chip 3012 and the sampling rate bandwidth adjusting device 303 in fig. 3;

fig. 5 is a schematic diagram of the processing of the first GSM downlink data by the FPGA device 3031 in fig. 3;

fig. 6 is a schematic diagram of the processing of the second GSM downstream data by the FPGA device 3031 in fig. 3.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

First, referring to fig. 1, fig. 1 is a schematic diagram of a wireless backhaul integrated base station according to an embodiment of the present application. As shown in fig. 1, it can be seen that the wireless backhaul integrated base station 100 includes a system-on-chip 101 and a radio frequency integrated device 102. The system on chip 101 includes a master control and transmission 1011 and a base station processing chip 1012. In general, the master and transport 1011 may include a baseband processing unit (BBU), clock distribution, power distribution, air interface, and the like. The base station processing chip 1012 may be, for example, an application-specific integrated circuit (ASIC). It can be seen that the system on chip 101 may support the hosting, transmission, third generation mobile communication technology (3G), fourth generation mobile communication technology (4G), L1, L2, L3 baseband processing, digital intermediate frequency processing, etc. of the wireless backhaul technology (Relay). The L1 baseband processing mainly relates to the processing of a physical layer (PHY), the L2 baseband processing mainly relates to the processing of a Medium Access Control (MAC) or a Radio Link Control (RLC), and the L3 baseband processing mainly relates to a Radio Resource Control (RRC). Relay is also typically implemented based on LTE standards. The rf integrated device 102 may include an rf integrated chip 1021 and a transceiver device 1022. The radio frequency integrated circuit 1021 may integrate a Radio Frequency Integrated Circuit (RFIC), a radio frequency local oscillator, a Transmit (TX) DAC, a Receive (RX) ADC, and the like. In addition, the rf ic 1021 may support a transceiver unit (TRX) and the like. The radio frequency integrated chip 1021 mainly adopts a Zero Intermediate Frequency (ZIF) architecture, and can support a TX channel, an RX channel, a Feedback (FB) channel, and the like. Transceiver means 1022 may include a Relay transceiver radio frequency link 1022a, an LTE or UMTS transceiver radio frequency link 1022b, a Relay antenna, and an LTE antenna.

Further, referring to fig. 2 in conjunction with fig. 1, fig. 2 is a schematic diagram of the base station processing chip 1012 in fig. 1 processing Relay data, Universal Mobile Telecommunications System (UMTS) data, and LTE data. The Relay data may include Relay downlink data and Relay uplink data. It can be understood that Relay downlink data may be downlink data transmitted by using a Relay, and Relay uplink data may be uplink data transmitted by using a Relay. The UMTS data may include UMTS downlink data and UMTS uplink data. It is to be understood that UMTS downlink data may be downlink data transmitted using UMTS, and UMTS uplink data may be uplink data transmitted using UMTS. The LTE data may include LTE downlink data and LTE uplink data. As can be appreciated, the LTE downlink data can be downlink data transmitted using LTE, and the LTE uplink data can be uplink data transmitted using LTE. As shown in fig. 2, it can be seen that the base station processing chip 1012 may include a Digital Automatic Gain Controller (DAGC), a Sample Rate Converter (SRC), a Numerically Controlled Oscillator (NCO), a digital pre-distortion (DPD), An Automatic Gain Controller (AAGC), an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and the like. In addition, for Relay downlink data, UMTS downlink data, and LTE downlink data, SRC, NCO, combining, clipping, DPD, DAC, and other processing are required. For Relay uplink data, UMTS uplink data and LTE uplink data, ADC, AAGC, shunt, NCO, SRC and the like are required to process. The NCO is equivalent to a local oscillator in traditional intermediate frequency modulation and demodulation. The clipping can smoothly restrain the data peak value to protect the power amplifier. DPD guarantees the linearity of the power amplifier, AAGC is used for carrying out power statistics on data processed by ADC, and attenuation values are calculated and adjusted through an analog attenuator according to the threshold of a dynamic range.

Referring to fig. 1 and fig. 2, it can be seen that, currently, an application-specific integrated circuit (ASIC) system-on-a-chip (SOC) chip design is mostly adopted for the wireless backhaul integrated base station. Generally, the chip may integrate processing functions such as Long Term Evolution (LTE) and wireless backhaul (Relay) technologies, and the Relay technology is also implemented based on an LTE standard. It can be seen that, in the prior art, the integration level of the wireless backhaul integrated base station is high, and generally only the LTE system is supported, and it is difficult to implement another wireless communication system on the basis of one wireless communication system. Therefore, the existing wireless backhaul integrated base station has poor expansibility and is difficult to support multiple systems.

Based on this, the embodiments of the present application provide a communication apparatus to solve the above problems, and the embodiments of the present application are described in detail below.

Referring to fig. 3, fig. 3 is a schematic diagram of a communication device according to an embodiment of the present disclosure. As shown in fig. 3, the communication device 300 includes a system on chip 301, a radio frequency integrated device 302, and a sampling rate bandwidth adjusting device 303. The system on chip 301 includes a master control and transport 3011 and a base station processing chip 3012. Reference may be made to master and transport 1011 in fig. 1 for master and transport 3011, reference may be made to base processing chip 1012 in fig. 1 for base processing chip 3012, and reference may also be made to system-on-chip 101 in fig. 1 for system-on-chip 301. The rf integrated device 302 may include an rf integrated chip 3021 and a transceiver device 3022. Reference may be made to the rf integrated chip 1021 in fig. 1 for the rf integrated chip 3021, and to the transceiver device 1022 in fig. 1 for the transceiver device 3022. The sampling rate bandwidth adjusting device 303 may include a field-programmable gate array (FPGA) device 3031 and a GSM baseband processing device 3032. It is understood that the communication device 300 can be a wireless backhaul integrated base station.

Further, the base station processing chip 3012 is configured to transmit the first GSM downlink data to the sampling rate bandwidth adjusting device 303. It is understood that the first GSM downlink data may be downlink data transmitted by GSM. That is, further, the first GSM downlink data may be master control data, the master control data may include service data, control plane signaling data, and frequency hopping management data, and the service data may be voice data, for example.

It should be noted that the base station processing chip 3012 may transmit the first GSM downlink data to the sampling rate bandwidth adjustment device 303 through a Peripheral Component Interconnect Express (PCIE) interface or a Serial Gigabit Media Independent Interface (SGMII).

If the base station processing chip 3012 transmits the first GSM downlink data to the sampling rate bandwidth adjustment device 303 through the PCIE interface, the first GSM downlink data is a Transaction Layer Packet (TLP) including main control data. If the base station processing chip 3012 transmits the first GSM downlink data to the sampling rate bandwidth adjustment device 303 through the SGMII interface, the first GSM downlink data is an Internet Protocol (IP) message including main control data.

Further, the sampling rate bandwidth adjusting device 303 is configured to send second GSM downlink data to the base station processing chip 3012, where the second GSM downlink data is determined after adjusting the sampling rate and the bandwidth of the first GSM downlink data.

It should be noted that the sampling rate bandwidth adjusting device 303 may send the second GSM downlink data to the base station processing chip 3012 through a similar/simple public radio interface (CPRI).

Optionally, the sampling rate and the bandwidth of the second GSM downlink data may meet the sampling rate and the bandwidth of LTE downlink data, may also meet the sampling rate and the bandwidth of UMTS downlink data, and may also meet the sampling rate and the bandwidth of downlink data transmitted through a (new radio nodeB, gNB), which is not limited herein.

For example, the sampling rate of the second GSM downlink data is 650 megabits per second (Mbps), and the bandwidth of the second GSM downlink data is 5 megahertz (MHz).

It can be seen that, in the above technical solution, the base station processing chip transmits GSM downlink data to the sampling rate bandwidth adjustment device, and the sampling rate bandwidth adjustment device adjusts the sampling rate and the bandwidth of the GSM downlink data, so that the base station processing chip only supporting the LTE system can support processing of the GSM downlink data, and the problem that the existing wireless backhaul integrated base station only supports the LTE system, has poor expansibility, and is difficult to support multiple systems is also solved. Meanwhile, hardware cost is saved.

Referring to fig. 4, fig. 4 is a schematic diagram of processing Relay data, UMTS data, LTE data, and GSM data by the base station processing chip 3012 and the sampling rate bandwidth adjusting device 303 in fig. 3. It is to be appreciated that reference can be made to base station processing chip 1012 in fig. 2 with respect to base station processing chip 3012. For Relay data, UMTS data, and LTE data, reference may be made to the contents of Relay data, UMTS data, and LTE data in fig. 2.

Referring to fig. 4, it can be seen that, for the first GSM downlink data, the first GSM downlink data needs to be transmitted to the FPGA device 3031 in the sampling rate bandwidth adjusting device 303, and then transmitted to the GSM baseband processing device 3032, and after the GSM baseband processing device 3032 completes the L1 baseband processing, the first GSM downlink data is transmitted to the FPGA device 3031, and finally returned to the base station processing chip 3012. Specifically, referring to fig. 4, it can be understood that the first GSM downlink data needs to be processed according to the transmission paths 401a to 404a in fig. 4, and then processed by SRC, NCO, combiner, clipping, DPD, DAC, and the like. That is, the base station processing chip 3012 needs to transmit the first GSM downlink data to the FPGA device 3031 for processing to obtain the third GSM downlink data; the FPGA device 3031 transmits the third GSM downlink data to the GSM baseband processing device 3032; the GSM baseband processing device 3032 may perform L1 baseband processing on the third GSM downlink data to obtain first baseband IQ data; the GSM baseband processing device 3032 transmits the first baseband IQ data to the FPGA device 3031 for processing, and then obtains second GSM downlink data; the FPGA device 3031 then transmits the second GSM downlink data to the base station processing chip 3012; the base station processing chip 3012 performs SRC, NCO, combining, clipping, DPD, DAC, and other processing on the second GSM downlink data.

Specifically, the second GSM downlink data is sent to the base station processing chip 3012, and the FPGA device 3031 is configured to perform framing on the first GSM downlink data to obtain third GSM downlink data, and transmit the third GSM downlink data to the GSM baseband processing device 3032. The GSM baseband processing device 3032 is configured to perform L1 baseband processing on the third GSM downlink data to obtain two paths of orthogonal first baseband IQ data, and transmit the first baseband IQ data to the FPGA device 3031; the FPGA device 3031 is further configured to transmit the second GSM downlink data to the base station processing chip, and transmit the second GSM downlink data to the base station processing chip 3012.

When the bit width of the first baseband IQ data is extended, the low bits of the first baseband IQ data are generally padded with zeros. In the digital interpolation filtering of the second baseband IQ data, 6-fold interpolation filtering may be employed.

Optionally, before performing sampling rate conversion on the third baseband IQ data to obtain the second baseband IQ data, the FPGA device 3031 is further configured to process the power corresponding to the third baseband IQ data in a RAMP up (RAMP) region of the current time slot, so as to achieve that the power corresponding to the third baseband IQ data meets a preset power in the RAMP up (RAMP) region of the current time slot, and adjust the transmit power corresponding to the third baseband IQ data.

Referring to fig. 5, fig. 5 is a schematic diagram of the processing of the first GSM downlink data by the FPGA device 3031 in fig. 3. As shown in fig. 5, it can be seen that the FPGA device 3031 may include a bandwidth processing module 501, a first rate of change module 502, a hill climbing gain module 503, a transmit power gain module 504, and a second rate of change module 505. It is understood that the GSM baseband processing device 3032 may transmit the first baseband IQ data to the FPGA device 3031, the bit width of the first baseband IQ data may be 14, and the sampling rate may be 1.0833 Mbps. Further, the bandwidth processing module 501 may expand the bit width of the first baseband IQ data to obtain second baseband IQ data, where the bit width of the second baseband IQ data may be 16, and the sampling rate may be 1.0833 Mbps. Further, the first variable rate module 502 may perform digital interpolation filtering on the second baseband IQ data to obtain third baseband IQ data, where a bit width of the third baseband IQ data may be 16, and a sampling rate may be 6.5 Mbps. Further, the climbing gain module 503 may process the power corresponding to the third baseband IQ data in a climbing (RAMP) region of the current timeslot, so as to achieve that the power corresponding to the third baseband IQ data meets a preset power in the climbing (RAMP) region of the current timeslot. Further, the transmission power gain module 504 may adjust the transmission power corresponding to the third baseband IQ data. Further, the second variable rate module 505 may perform sampling rate conversion on the third baseband IQ data to obtain second GSM downlink data, where a bit width of the second GSM downlink data may be 16, and a sampling rate may be 6.5 Mbps. Finally, the FPGA device 3031 may transmit the second GSM downlink data to the base station processing chip 3012. In addition, after the third baseband IQ data is processed by the ramp gain module 503 or the transmission power gain module 504, the bit width is 16, and the sampling rate is 6.5 Mbps.

Specifically, before transmitting the second GSM downlink data to the base station processing chip 3012, the FPGA device 3031 is specifically configured to expand the bit width of the first baseband IQ data to obtain second baseband IQ data, where the bit width of the second baseband IQ data is higher than the bit width of the first baseband IQ data; carrying out digital interpolation filtering on the second baseband IQ data to obtain third baseband IQ data, wherein the sampling rate of the third baseband IQ data is higher than that of the second baseband IQ data; and carrying out sampling rate conversion on the third baseband IQ data to obtain second GSM downlink data.

Optionally, in a possible implementation manner, the apparatus further includes a radio frequency integrated device 302, and a base station processing chip 3012, and is further configured to perform intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data; the radio frequency integrated device 302 is configured to perform radio frequency modulation and amplification processing on the fourth GSM downlink data, and transmit the amplified fourth GSM downlink data. And performing intermediate frequency conversion processing on the second GSM downlink data, namely performing SRC, NCO, combining, clipping, DPD, DAC and other processing on the second GSM downlink data.

Referring to fig. 3, the base station processing chip 3012 is configured to transmit the first GSM uplink data to the sampling rate bandwidth adjusting apparatus 303. It is to be understood that the first GSM uplink data may be uplink data transmitted by GSM. The first GSM uplink data may be a baseband IQ data.

It should be noted that the base station processing chip 3012 may transmit the first GSM uplink data to the sampling rate bandwidth adjustment device 303 through PCIE. When the base station processing chip 3012 transmits the first GSM uplink data to the sampling rate bandwidth adjustment device 303 through the PCIE interface, the first GSM uplink data is a TLP including the intermediate frequency IQ data.

The sampling rate bandwidth adjusting device 303 is configured to send second GSM uplink data to the base station processing chip 3012, where the second GSM uplink data is determined after adjusting the sampling rate and the bandwidth of the first GSM uplink data.

It should be noted that the sampling rate bandwidth adjusting device 303 may send the second GSM uplink data to the base station processing chip 3012 through a Common Public Radio Interface (CPRI).

It can be seen that, in the above technical scheme, the base station processing chip transmits GSM uplink data to the sampling rate bandwidth adjustment device, and the sampling rate bandwidth adjustment device adjusts the sampling rate and bandwidth of the GSM uplink data, so that the base station processing chip only supporting the LTE system can support processing of the GSM uplink data, and the problems that the existing wireless backhaul integrated base station only supports the LTE system, has poor expansibility, and is difficult to support multiple systems are also solved.

Optionally, the sampling rate and the bandwidth of the second GSM uplink data may meet the sampling rate and the bandwidth of LTE uplink data, may also meet the sampling rate and the bandwidth of UMTS uplink data, and may also meet the sampling rate and the bandwidth of uplink data transmitted through a (new radio nodeB, gNB), which is not limited herein.

For example, the sampling rate of the second GSM uplink data is 650 kilobit per second (kbps), and the bandwidth of the second GSM uplink data is 200 khz.

Referring to fig. 4, it can be seen that, for the first GSM uplink data, the first GSM uplink data needs to be transmitted to the FPGA device 3031 in the sampling rate bandwidth adjusting device 303, and then transmitted to the GSM baseband processing device 3032, and after the GSM baseband processing device 3032 completes the L1 baseband processing, the first GSM uplink data is transmitted to the FPGA device 3031, and finally returned to the base station processing chip 3012. Specifically, as shown in fig. 4, the first GSM uplink data needs to be processed according to the transmission paths 401b to 404b in fig. 4, and then returns to the base station processing chip 3012. That is, the first GSM uplink data is data processed by the base station processing chip 3012 through the sample rate converter. Further, the base station processing chip 3012 may transmit the first GSM uplink data to the FPGA device 3031 for processing to obtain third GSM uplink data; then the FPGA device 3031 transmits the third GSM uplink data to the GSM baseband processing device 3032; the GSM baseband processing device 3032 performs L1 baseband processing on the third GSM uplink data to obtain fifth baseband IQ data, and transmits the fifth baseband IQ data to the FPGA device 3031; the FPGA device 3031 deframes the fifth baseband IQ data to obtain second GSM uplink data; and finally, returning the second GSM uplink data to the base station processing chip 3012.

Specifically, before sending the second GSM uplink data to the base station processing chip 3012, the FPGA device 3031 is configured to transmit third GSM uplink data to the GSM baseband processing device 3032, where the third GSM uplink data is determined after adjusting the rate and the bandwidth of the second GSM uplink data; the GSM baseband processing device 3032 is configured to perform L1 baseband processing on the third GSM uplink data to obtain two paths of orthogonal fifth baseband IQ data, and transmit the fifth baseband IQ data to the FPGA device 3031; the FPGA device 3031 is further configured to deframe the fifth baseband IQ data to obtain second GSM uplink data.

Referring to fig. 6, fig. 6 is a schematic diagram of the processing of the second GSM downlink data by the FPGA device 3031 in fig. 3. As shown in fig. 6, it can be seen that the FPGA device 3031 may include a variable rate module 601, a data decimation module 602, a gain module 603, and a bit width processing module 604. It can be understood that the base station processing chip 3012 may transmit the second GSM downlink data to the FPGA device 3031, where the bit width of the second GSM downlink data is 16 and the sampling rate is 7.68 Mbps. Further, the variable rate module 601 may perform sampling rate conversion and bit width expansion on the second GSM uplink data to obtain sixth baseband IQ data, where the bit width of the sixth baseband IQ data is 20, and the sampling rate is 1.3 Mbps. Further, the data extraction module 602 may perform data extraction and filtering on the sixth baseband IQ data to obtain seventh baseband IQ data, where the bit width of the seventh baseband IQ data is 20 and the sampling rate is 650 kbps. Further, the gain module 603 may perform a normalized gain adjustment on the seventh baseband IQ data to obtain an eighth baseband IQ data, where the bit width of the eighth baseband IQ data is 20, and the sampling rate is 650 kbps. Further, the bit width processing module 604 may reduce the bit width of the eighth baseband IQ data and adjust the power of the eighth baseband IQ data to obtain the third GSM uplink data, where the bit width of the third GSM uplink data is 14, and the sampling rate is 650 kbps.

Specifically, before transmitting the third GSM uplink data to the GSM baseband processing device 3032, the FPGA device 3031 is specifically configured to perform sampling rate conversion and bit width expansion on the second GSM uplink data to obtain sixth baseband IQ data, where the bit width of the sixth baseband IQ data is higher than the bit width of the second GSM uplink data, and the sampling rate of the sixth baseband IQ data is lower than the sampling rate of the second GSM uplink data; performing data extraction and filtering on the sixth baseband IQ data to obtain seventh baseband IQ data, wherein the sampling rate of the seventh baseband IQ data is lower than that of the sixth baseband IQ data; carrying out normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data; and reducing the bit width of the eighth baseband IQ data and adjusting the power of the eighth baseband IQ data to obtain third GSM uplink data, wherein the bit width of the third GSM uplink data is lower than the bit width of the eighth baseband IQ data.

When performing data extraction on the sixth baseband IQ data, the FPGA device 3031 may adopt 2-time extraction. Truncation of the eighth baseband IQ data saturates.

The present application provides a method for communicating GSM data in a global system for mobile communications, and a specific implementation process of the method for communicating GSM data may refer to specific descriptions of a base station processing chip and a sampling rate bandwidth adjusting apparatus in fig. 3 and related descriptions in fig. 4 to fig. 6. Further, the method is applied to a communication device, the communication device comprises a base station processing chip and a sampling rate bandwidth adjusting device, wherein,

the base station processing chip transmits first GSM downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device;

and the sampling rate and bandwidth adjusting device sends second GSM downlink data or second GSM uplink data to the base station processing chip, wherein the second GSM downlink data is determined after the sampling rate and the bandwidth of the first GSM downlink data are adjusted, and the second GSM uplink data is determined after the sampling rate and the bandwidth of the first GSM uplink data are adjusted.

Optionally, in a possible implementation, the sampling rate and the bandwidth of the second GSM downlink data satisfy the sampling rate and the bandwidth of LTE downlink data for long term evolution, and the sampling rate and the bandwidth of the second GSM uplink data satisfy the sampling rate and the bandwidth of LTE uplink data.

the FPGA device frames the first GSM downlink data to obtain third GSM downlink data, and transmits the third GSM downlink data to the GSM baseband processing device;

Optionally, in a possible implementation manner, before transmitting the second GSM downlink data to the base station processing chip, the method further includes:

expanding the bit width of the first baseband IQ data by the FPGA device to obtain second baseband IQ data, wherein the bit width of the second baseband IQ data is higher than that of the first baseband IQ data;

and the FPGA device carries out sampling rate conversion on the third baseband IQ data to obtain second GSM downlink data.

Optionally, in a possible implementation, the communication device further includes a radio frequency integrated device, and the method further includes:

the base station processing chip carries out intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data;

and the radio frequency integrated device carries out radio frequency modulation and amplification processing on the fourth GSM downlink data and transmits the amplified fourth GSM downlink data.

Optionally, in a possible implementation, the sampling rate bandwidth adjusting device includes a field programmable gate array FPGA device and a global system for mobile communications GSM baseband processing device, and before sending the second GSM uplink data to the base station processing chip, the method further includes:

the FPGA device transmits third GSM uplink data to the GSM baseband processing device, wherein the third GSM uplink data is determined after the speed and the bandwidth of the second GSM uplink data are adjusted;

and the FPGA device unframes the fifth baseband IQ data to obtain second GSM uplink data.

Optionally, in a possible implementation manner, before transmitting the third GSM uplink data to the GSM baseband processing apparatus, the method further includes:

the FPGA device carries out sampling rate conversion and bit width expansion on the second GSM uplink data to obtain sixth baseband IQ data, wherein the bit width of the sixth baseband IQ data is higher than that of the second GSM uplink data, and the sampling rate of the sixth baseband IQ data is lower than that of the second GSM uplink data;

the FPGA device performs normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data;

and the FPGA device reduces the bit width of the eighth baseband IQ data and adjusts the power of the eighth baseband IQ data to obtain third GSM uplink data, wherein the bit width of the third GSM uplink data is lower than the bit width of the eighth baseband IQ data.

Optionally, in a possible implementation, the communication device further includes a baseband processing unit, and the method further includes:

the second GSM uplink data of the base station processing chip is transmitted to the baseband processing unit;

and the baseband processing unit transmits the second GSM uplink data to the base station control subsystem.

The present application provides a communication system comprising a base station processing chip and a sampling rate bandwidth adjusting means, wherein,

the base station processing chip is used for transmitting first global system for mobile communications (GSM) downlink data or first GSM uplink data to the sampling rate bandwidth adjusting device;

the FPGA device is used for framing the first GSM downlink data to obtain third GSM downlink data, and transmitting the third GSM downlink data to the GSM baseband processing device;

Optionally, in a possible implementation manner, before transmitting the second GSM downlink data to the base station processing chip, the FPGA device is specifically configured to expand a bit width of the first baseband IQ data to obtain second baseband IQ data, where the bit width of the second baseband IQ data is higher than the bit width of the first baseband IQ data; carrying out digital interpolation filtering on the second baseband IQ data to obtain third baseband IQ data, wherein the sampling rate of the third baseband IQ data is higher than that of the second baseband IQ data; and carrying out sampling rate conversion on the third baseband IQ data to obtain the second GSM downlink data.

Optionally, in a possible implementation, the system further comprises a radio frequency integrated device,

the base station processing chip is also used for carrying out intermediate frequency conversion processing on the second GSM downlink data to obtain fourth GSM downlink data;

the radio frequency integrated device is used for performing radio frequency modulation and amplification processing on the fourth GSM downlink data and transmitting the amplified fourth GSM downlink data.

Optionally, in a possible implementation, the sampling rate bandwidth adjusting device includes a field programmable gate array FPGA device and a global system for mobile communications GSM baseband processing device, before sending the second GSM uplink data to the base station processing chip, wherein,

the FPGA device is used for transmitting third GSM uplink data to the GSM baseband processing device, and the third GSM uplink data is determined after the speed and the bandwidth of the second GSM uplink data are adjusted;

the FPGA device is further configured to deframe the fifth baseband IQ data to obtain the second GSM uplink data.

Optionally, in a possible implementation manner, before transmitting the third GSM uplink data to the GSM baseband processing apparatus, the FPGA apparatus is specifically configured to perform sampling rate conversion and bit width expansion on the second GSM uplink data to obtain sixth baseband IQ data, where the bit width of the sixth baseband IQ data is higher than the bit width of the second GSM uplink data, and the sampling rate of the sixth baseband IQ data is lower than the sampling rate of the second GSM uplink data; performing data extraction and filtering on the sixth baseband IQ data to obtain seventh baseband IQ data, wherein the sampling rate of the seventh baseband IQ data is lower than that of the sixth baseband IQ data; carrying out normalized gain adjustment on the seventh baseband IQ data to obtain eighth baseband IQ data; and reducing the bit width of the eighth baseband IQ data and adjusting the power of the eighth baseband IQ data to obtain third GSM uplink data, wherein the bit width of the third GSM uplink data is lower than the bit width of the eighth baseband IQ data.

Optionally, in a possible implementation, the system further includes a baseband processing unit,

the base station processing chip is also used for transmitting the second GSM uplink data to the baseband processing unit;

the baseband processing unit is configured to transmit the second GSM uplink data to the base station control subsystem.

The embodiment of the application also provides a communication device, and the communication device is used for executing the communication method of the GSM data. Some or all of the above communications may be implemented in hardware or software.

Optionally, the communication device may be a chip or an integrated circuit when embodied.

Optionally, when part or all of the GSM data communication method of the above embodiment is implemented by software, the communication device includes: at least one processor for executing programs, when the programs are executed, the communication device may implement the communication method of GSM data provided in the above embodiments, the communication device may further include a memory for storing necessary programs, and the related programs may be loaded into the memory at the time of shipment of the communication device, or may be loaded into the memory at a later time when needed.

Alternatively, the memory may be a physically separate unit or may be integrated with the processor.

Alternatively, when part or all of the GSM data communication method of the above embodiment is implemented by software, the communication device may include only one processor. The memory for storing the program is located outside the communication device and the processor is connected to the memory by means of a circuit/wire for reading and executing the program stored in the memory.

Each processor may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of a CPU and an NP.

Alternatively, each processor may comprise a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.

The memory may include volatile memory (volatile memory), such as random-access memory (RAM); the memory may also include a non-volatile memory (non-volatile memory), such as a flash memory (flash memory), a Hard Disk Drive (HDD) or a solid-state drive (SSD); the memory may also comprise a combination of memories of the kind described above.

The above-mentioned embodiments, objects, technical solutions and advantages of the present application are further described in detail, it should be understood that the above-mentioned embodiments are only examples of the present application, and are not intended to limit the scope of the present application, and any modifications, equivalent substitutions, improvements and the like made on the basis of the technical solutions of the present application should be included in the scope of the present application.

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Communication method and related device for global system for mobile communication (GSM) data

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