Wafer edge contact hardware and method for eliminating wafer back edge and notch deposits
阅读说明:本技术 消除晶片背面边缘和缺口处的沉积物的晶片边缘接触硬件和方法 (Wafer edge contact hardware and method for eliminating wafer back edge and notch deposits ) 是由 帕特里克·布莱琳 拉梅什·钱德拉塞卡拉 克洛伊·巴尔达赛罗尼 金成杰 伊时塔克·卡里姆 迈 于 2018-05-18 设计创作,主要内容包括:提供了一种用于等离子体处理系统的基座组件。组件包括基座,所述基座具有中央顶表面,如台面,且中央顶表面从中央顶表面的中心延伸到中央顶表面的外径。环形表面围绕中央顶表面。环形顶表面设置在从中央顶表面向下的台阶处。多个晶片支撑件以在中央顶表面上方的支撑件高程距离从中央顶表面突出。多个晶片支撑件围绕中央顶表面的内半径均匀地布置。内半径位于中央顶表面的中心和小于中半径处之间,中半径介于基座的中心与中央顶表面的外径之间的约一半。提供了承载环,其被配置用于定位在基座的环形表面上。承载环具有承载环内径、承载环外径以及围绕承载环的顶部内部区域环形地布置的凸缘表面,凸缘表面凹入到承载环的顶部外部区域的下方。多个承载环支撑件被设置在基座的环形表面的外部。当承载环搁置在多个承载环支撑件上时,承载环支撑件限定承载环的在基座的中央顶表面上方的承载环高程尺寸,承载环高程尺寸被配置为高于基座的中央顶表面,高于支撑件高程距离。(A pedestal assembly for a plasma processing system is provided. The assembly includes a base having a central top surface, such as a mesa, extending from a center of the central top surface to an outer diameter of the central top surface. An annular surface surrounds the central top surface. The annular top surface is disposed at a step downward from the central top surface. A plurality of wafer supports project from the central top surface at a support elevation distance above the central top surface. The plurality of wafer supports are uniformly arranged about an inner radius of the central top surface. The inner radius is between the center of the central top surface and less than the middle radius, which is about half of the distance between the center of the base and the outer diameter of the central top surface. A load ring is provided that is configured for positioning on the annular surface of the base. The carrier ring has a carrier ring inner diameter, a carrier ring outer diameter, and a flange surface annularly disposed about a top inner region of the carrier ring, the flange surface recessed below the top outer region of the carrier ring. A plurality of load ring supports are disposed outside of the annular surface of the base. The carrier ring support defines a carrier ring elevation dimension of the carrier ring above the central top surface of the base when the carrier ring rests on the plurality of carrier ring supports, the carrier ring elevation dimension configured to be above the central top surface of the base a support elevation distance.)
1. A pedestal assembly for a plasma processing system, comprising:
a base, which comprises a base seat and a base seat,
a central top surface extending from a center of the central top surface to an outer diameter of the central top surface;
an annular surface surrounding the central top surface, the annular top surface being disposed at a step down from the central top surface;
a plurality of wafer supports projecting from the central top surface at a support elevation distance above the central top surface, the plurality of wafer supports being evenly arranged about an inner radius of the central top surface between the center of the central top surface and less than a mid-radius defined approximately half-way between the center of the susceptor and the outer diameter of the central top surface;
a carrier ring configured for positioning on the annular surface of the base, the carrier ring having a carrier ring inner diameter, a carrier ring outer diameter, and a flange surface annularly disposed about a top inner region of the carrier ring, the flange surface recessed below a top outer region of the carrier ring; and
a plurality of load ring supports disposed outside of the annular surface of the base, the load ring supports defining a load ring elevation dimension of the load ring above the central top surface of the base when the load ring rests on the plurality of load ring supports, the load ring elevation dimension configured to be above the central top surface of the base by the support elevation distance.
2. The susceptor assembly of claim 1, wherein the plurality of wafer supports provide a kinematic fit with a wafer when the wafer is placed over the plurality of wafer supports.
3. The susceptor assembly of claim 1, wherein the flange surface of the carrier ring has a step transitioning to the top outer region of the carrier ring, the flange surface elevating a carrier ring-support dimension above the plurality of wafer supports.
4. The susceptor assembly of claim 1, wherein the inner radius is about 2.5 inches and the outer diameter of the central top surface is about 11.5 inches.
5. The susceptor assembly of claim 1, wherein a ledge surface defines a ledge surface area above the ledge surface, the ledge surface area defining a contact surface of a lower surface of a wafer when the wafer is disposed above the central top surface of the susceptor.
6. The pedestal assembly of claim 1, wherein a plurality of spacers are disposed below the load ring support to define an alignment position for the load ring elevation dimension.
7. The susceptor assembly of claim 1, wherein the inner radii of the plurality of wafer supports are between the center and a quarter radius between the middle radius and the center.
8. The susceptor assembly of claim 1, wherein the support elevation distance is between about 2 mils and about 6 mils and the load ring elevation dimension is between about 1 mil and about 3 mils.
9. The susceptor assembly of claim 1, wherein the support elevation distance is about 4 mils and the load ring elevation dimension is about 1.5 mils, and the inner radius is about 2.5 inches around the center of the central top surface of the susceptor.
10. The susceptor assembly of claim 9, wherein the outer diameter of the central top surface is about 11.52 inches.
11. The susceptor assembly of claim 1, wherein the support elevation distance is between about 2 mils and about 6 mils and the carrier ring elevation dimension is between about 1 mil and about 3 mils, and the inner radius of the plurality of wafer supports is between the center and a quarter radius between the center radius and the center, and the plurality of wafer supports provides a kinematic fit with the wafer when placed on the plurality of wafer supports.
12. The susceptor assembly of claim 1, wherein the support elevational distance is about 4 mils, the load ring elevational dimension is about 1.5 mils, and the inner radius is about 2.5 inches about the center of the central top surface of the susceptor, and the inner radii of the plurality of wafer supports are located between the center and a quarter radius located between the center radius and the center, and the plurality of wafer supports provide a kinematic fit with the wafer when placed on the plurality of wafer supports, the wafer being configured to tilt slightly upward from the center toward the edge when placed over the flange surfaces of the plurality of wafer supports and the load ring due to the load ring elevational distance being greater than the support elevational distance.
13. The susceptor assembly of claim 1, wherein the plasma processing system is configured as an endless transport system configured to hold the carrier ring placed on the annular surface of the susceptor and a wafer is configured to move over and away from the flange surfaces of the plurality of wafer supports and the carrier ring, the susceptor includes lift pins for raising and lowering the wafer when present, and the processing system includes a transport arm for moving the wafer onto or away from each of a plurality of susceptor assemblies of the plasma processing system.
14. A susceptor assembly for a plasma processing system having a ringless transfer configuration for moving wafers onto and off of one or more susceptor assemblies disposed in the plasma processing system, comprising:
a base, which comprises a base seat and a base seat,
a central top surface extending from a center of the central top surface to an outer diameter of the central top surface;
an annular surface surrounding the central top surface, the annular top surface being disposed at a step down from the central top surface;
a plurality of wafer supports projecting from the central top surface at a support elevation distance above the central top surface, the plurality of wafer supports being evenly arranged about an inner radius of the central top surface between the center of the central top surface and less than a mid-radius defined approximately half-way between the center of the susceptor and the outer diameter of the central top surface;
a carrier ring configured for positioning on the annular surface of the base, the carrier ring having a carrier ring inner diameter, a carrier ring outer diameter, and a flange surface annularly disposed about a top inner region of the carrier ring, the flange surface recessed below a top outer region of the carrier ring;
a plurality of load ring supports disposed outside of the annular surface of the base, the load ring supports defining a load ring elevation dimension of the load ring above the central top surface of the base when the load ring rests on the plurality of load ring supports, the load ring elevation dimension configured to be above the central top surface of the base by the support elevation distance; and
a plurality of lift pins for raising and lowering wafers onto the plurality of wafer supports and the flange surface of the carrier ring.
15. The susceptor assembly of claim 14, wherein the plurality of wafer supports provide a kinematic fit with the wafer when the wafer is placed over the plurality of wafer supports, and wherein the flange surface of the carrier ring has a step that transitions to the top outer region of the carrier ring, the flange surface elevating a carrier ring-support dimension above the plurality of wafer supports.
16. The susceptor assembly of claim 14, wherein the inner radius is about 2.5 inches and the outer diameter of the central top surface is about 11.5 inches and defines a ledge surface area above the flange surface that defines a contact surface of a wafer lower surface when a wafer is disposed above the central top surface of the susceptor.
17. The pedestal assembly of claim 16, wherein a plurality of spacers are disposed below the load ring support to define an alignment position for the load ring elevation dimension.
18. The susceptor assembly of claim 14, wherein the support elevation distance is between about 2 mils and about 6 mils and the load ring elevation dimension is between about 1 mil and about 3 mils.
19. The susceptor assembly of claim 14, wherein the support elevation distance is between about 2 mils and about 6 mils and the carrier ring elevation dimension is between about 1 mil and about 3 mils, and the inner radius of the plurality of wafer supports is between the center and a quarter radius between the center radius and the center, and the plurality of wafer supports provides a kinematic fit with the wafer when placed on the plurality of wafer supports.
20. The susceptor assembly of claim 14, wherein the support elevational distance is about 4 mils, the load ring elevational dimension is about 1.5 mils, and the inner radius is about 2.5 inches about the center of the central top surface of the susceptor, and the inner radii of the plurality of wafer supports are located between the center and a quarter radius located between the center radius and the center, and the plurality of wafer supports provide a kinematic fit with the wafer when placed on the plurality of wafer supports, the wafer being slightly tilted upward from the center toward the edge when placed over the flange surfaces of the plurality of wafer supports and the load ring due to the load ring elevational distance being greater than the support elevational distance.
Technical Field
Embodiments of the present invention relate to semiconductor wafer processing equipment tools and, more particularly, to a carrier ring for use in a chamber. The chamber is used to process and transfer wafers.
Background
In Atomic Layer Deposition (ALD), films are deposited layer by successive dosing and activation steps. ALD is used to produce conformal films on high aspect ratio structures. One of the drawbacks of ALD is that film deposition on the backside of the wafer is difficult to avoid because the film can be deposited through any gap to the backside of the wafer. In spacer applications, backside deposition is undesirable because it can cause alignment/focus problems during the photolithography step as part of the integrated flow.
The film on the back side is produced by delivering precursor species to the back side during the dosing step and reacting the precursor with the delivered radical species during the activation step. Therefore, there is a need to control or reduce deposition on the backside of the wafer.
It is in this context that embodiments of the present invention arise.
Disclosure of Invention
Embodiments of the present disclosure provide systems, apparatuses, and methods to reduce backside deposition during ALD processing. In an ALD processing chamber, a wafer is supported on a susceptor assembly equipped with a carrier ring positioned at a height relative to the wafer support to reduce backside deposition. In some embodiments, each susceptor assembly is calibrated to ensure that the wafer lap is maintained on the carrier ring during processing, taking into account thermal expansion. Several embodiments will now be described.
In one embodiment, a pedestal assembly for a plasma processing system is provided. The assembly comprises: a base comprising a central top surface, such as a mesa, and the central top surface extending from a center of the central top surface to an outer diameter of the central top surface. An annular surface surrounds the central top surface. The annular top surface is disposed at a step downward from the central top surface. A plurality of wafer supports project from the central top surface at a support elevation distance above the central top surface. The plurality of wafer supports are uniformly arranged about an inner radius of the central top surface. The inner radius is between the center of the central top surface and less than a mid-radius defined approximately half-way between the center of the base and the outer diameter of the central top surface. A load ring is provided that is configured for positioning on the annular surface of the base. The carrier ring has a carrier ring inner diameter, a carrier ring outer diameter, and a flange surface annularly disposed about a top inner region of the carrier ring, the flange surface recessed below a top outer region of the carrier ring. A plurality of load ring supports are disposed outside of the annular surface of the base. The carrier ring support defines a carrier ring elevation dimension of the carrier ring above the central top surface of the base when the carrier ring rests on the plurality of carrier ring supports, the carrier ring elevation dimension configured to be above the central top surface of the base a distance above the support elevation.
In an implementation, the plurality of wafer supports provide a kinematic fit with the wafer when the wafer is placed over the plurality of wafer supports.
In an implementation, the flange surface of the carrier ring has a step that transitions to the top outer region of the carrier ring, and the flange surface elevates a carrier ring-support dimension above the plurality of wafer supports.
In one implementation, the inner radius is about 2.5 inches and the outer diameter of the central top surface is about 11.5 inches.
In one implementation, a ledge surface defines a ledge surface area above the ledge surface, and the ledge surface area defines a contact surface of a lower surface of a wafer when the wafer is disposed above the central top surface of the susceptor.
In one implementation, a plurality of spacers are disposed below the load ring support to enable calibration of the position of the load ring elevation dimension.
In an implementation, the inner radii of the plurality of wafer supports are located between the center and a quarter radius, and the quarter radius is located between the middle radius and the center.
In an implementation, the support elevation distance is between about 2 mils and about 6 mils, and the load ring elevation dimension is between about 1 mil and about 3 mils.
In one implementation, the support member elevation distance is about 4 mils, while the load ring elevation dimension is about 1.5 mils, and the inner radius is about 2.5 inches around the center of the central top surface of the susceptor.
In one implementation, the outer diameter of the central top surface is about 11.52 inches.
In an implementation, the plasma processing system is configured as a ringless transport system. A ringless transfer system is configured to hold the carrier ring disposed above the annular surface of the susceptor and wafers are configured to move over and away from the plurality of wafer supports and the flange surface of the carrier ring. The susceptor includes lift pins for raising and lowering the wafer when present, and the processing system further includes a transfer arm for moving the wafer onto and off of each of a plurality of susceptor assemblies of the plasma processing system.
Drawings
Fig. 1 illustrates a substrate processing system for processing a wafer, for example, to form a film thereon.
Figure 2 illustrates another substrate processing system for processing a wafer, for example, to form a film thereon.
Fig. 3A illustrates a top view of a multi-station processing tool with four processing stations disposed therein, according to one embodiment.
Fig. 3B shows a schematic diagram of an embodiment of a multi-station processing tool having inbound load locks and outbound load locks, according to one embodiment.
Figure 3C shows a susceptor configured to receive a wafer for a deposition process, such as an Atomic Layer Deposition (ALD) process, in accordance with one embodiment of the present invention.
Figure 3D illustrates a perspective cutaway view of a portion of a base, according to one embodiment of the present invention.
Figure 4A shows a cross-sectional view similar to that of figure 3D with additional detail regarding the wafer support and the contact made by the wafer on the flange surface, according to one embodiment.
Figure 4B shows how the
Fig. 4C illustrates a detail area of fig. 4A in greater detail, according to one embodiment.
Fig. 5A illustrates a detail area of fig. 4C showing an overlap between a lower edge surface of a wafer and a flange surface of a carrier ring, according to one embodiment.
Fig. 5B through 5D illustrate examples of thermal changes that may occur during thermal treatment that will affect the lap joint shown in fig. 5A, according to one embodiment.
Fig. 6A and 6B illustrate examples of reducing or substantially eliminating backside deposition to a wafer.
FIG. 7 illustrates a control module for a control system according to one embodiment.
Detailed Description
Embodiments of the present disclosure provide an embodiment of a process chamber for processing a semiconductor wafer. It should be appreciated that embodiments of the invention can be implemented in numerous ways, such as a process, an apparatus, a system, a device or a method. Several implementations are described below. In one embodiment, a base assembly is disclosed. This embodiment is collectively defined by several elements working together to reduce deposition on the wafer/device backside.
The wafer contacts the carrier ring near the edge of a limited area (e.g., at the wafer edge) and contacts a pin at the center, referred to as an MCA pin. A pin at the center of the wafer raises the center of the wafer above the outer edge, causing a wafer warp condition. This causes the wafer edge to contact the carrier ring with a tangential line or line contact. Due to the required precision and limitations of "in-situ" setup, the pins and carrier ring currently do not block sufficient deposition on the backside of the wafer. The amount of contact with the backside of the wafer is also limited by existing designs, and thus its tolerance for off-center wafer placement is low.
It is believed that during processing, backside deposition occurs when a gap occurs between the wafer edge and the carrier ring. In Atomic Layer Deposition (ALD) operations, process precursors are pulsed on a wafer under vacuum for a specified amount of time so that the precursors can react completely with the substrate surface by a self-limiting process, leaving a monolayer on the surface. Subsequently, an inert carrier gas (usually N) is used2Or Ar) purging the chamber to remove any unreacted precursor or reaction by-products. Then, an anti-reactant precursor pulse and purge are performed to form the desired film of material. Unfortunately, the precursor tends to flow in areas where deposition is not intended (e.g., the backside of the wafer). It is therefore an object of the present application to define structures by constructing elements of a susceptor according to examples provided herein to limit or avoid backside deposition.
In one embodiment, the base assembly comprises an aluminum base with sapphire MCA (minimum contact area) pins. The susceptor is a temperature controlled heating device. The wafer is placed on these pins and the height of the pins allows the gap between the susceptor and the wafer to be minimized. The gap is optimized for thermal uniformity of the susceptor and wafer and pressure equalization between the top and bottom of the wafer to reduce wafer movement on the susceptor.
In another embodiment, a ceramic carrier ring (sometimes referred to as a focus ring) surrounds the susceptor and is adjusted to a specific height relative to the susceptor. The carrier ring rests on adjustable members, including precision shims, which control the height of the carrier ring relative to the base. The carrier ring has a
It should be appreciated that temperature variations can affect the dimensions of the components, including the susceptor and the carrier ring, and thus the susceptor, the carrier ring, and the ledge portion are sized to maintain the wafer in contact with the carrier ring flange even at elevated temperatures (e.g., up to 400 degrees celsius or more). According to the disclosed embodiments, the sized diameter also prevents contact loss due to differences in thermal expansion. By maintaining contact, the wafer will experience less stress or failure, which may be caused by losing contact with the carrier ring during thermal dimensional expansion. Thus, these embodiments improve the performance, stability and functionality of susceptor designs used in ALD systems.
Fig. 1 and 2 are provided below to illustrate two types of chambers, but not to limit other possible chamber configurations.
Fig. 1 shows a substrate processing system 100 for processing a wafer 101. The system includes a
The center column is also shown to include lift pins 120, the lift pins 120 being controlled by
Further, the gases may or may not be premixed. Appropriate valving and mass flow control mechanisms can be used to ensure that the appropriate gases are delivered during the deposition and plasma processing stages of the process. The process gas exits the chamber via an outlet. A vacuum pump (e.g., one or two stage mechanical dry pump and/or a turbomolecular pump) draws process gases and maintains a suitably low pressure within the reactor through a closed-loop control flow restriction (e.g., a throttle valve or a pendulum valve).
Also shown is a
Fig. 3A shows a top view of a multi-station processing tool in which four processing stations are provided. This top view is of the
Figure 3B shows a schematic diagram of an embodiment of a
The depicted process chamber 102B includes four processing stations, numbered 1 through 4 in the embodiment shown in FIG. 3B (the order is merely exemplary). In some embodiments, the
Figure 3C shows a
In one embodiment, the wafer support level of the wafer support 304 is about 2-6 mils (i.e., 0.002-.006 inches) above the central
In other implementations, there may be any number of wafer supports on the central
The base 300 also includes an
In some implementations, the load ring supports 312a, 312b, and 312c extend beyond the
In the embodiment shown, there are three load ring supports positioned symmetrically along the outer edge region of the annular surface. However, in other implementations, there may be three or more load ring supports distributed anywhere along the
Fig. 3D illustrates a perspective cut-away view of a portion of the
The cross-sectional view is a longitudinal cross-sectional view that is transverse to one of the load ring supports (e.g.,
Additionally, the
Figure 4A illustrates a cross-sectional view similar to that of figure 3D with additional detail regarding the contact made by the wafer support 304A and the
Further shown in fig. 4A is quarter radius R3, which is approximately midway between mid-radius R2 and
In one configuration, these dimensions relate to the
Fig. 4A also shows how the
Figure 4B shows how the
As described above, the positioning of the
Generally, the load ring elevation dimension D2 is related to the support elevation dimension D1. For example, if D1 is higher, then D2 is also higher. Similarly, if D1 is lower, then D2 is likewise lower. By way of another example, the
Fig. 4B further illustrates a carrier-support dimension D3, which represents the difference between elevation D1 and elevation D2. Thus, D2 is the sum of D1+ D3, where D1 and D2 are referenced to the central
Fig. 4C shows the
In one configuration, the
It has been observed that the
Fig. 5A illustrates the
As shown, the central top surface
Setting the height of the wafer support 304, the height of the
Fig. 5B to 5D show examples of thermal changes that may occur during heat treatment that will affect the
Fig. 5D shows that the
In the table below, referring to fig. 5A-5D, the inner diameter ID is measured to the
Table a below illustrates a configuration of the dimensions of the
Table B also shows another embodiment of the configuration and related dimensions for 50 ℃ processing. In this example, the
For example, the configurations of tables C and D relate to a processing temperature of about 400 ℃. Table C shows a configuration where the nominal lap portion is 0.016 inches. This creates a negative number for the
Table D below shows the dimensional configuration of the
In an exemplary illustration of the
In this way, by calibrating each station to the desired relative dimensions, it is possible to maintain the uniformity of the deposition performance of the
As described above, previous hardware arrangements have not been optimized for wafer contact with the
Thus, a
In one embodiment, the use of a slow pressure change and venting to the base before the wafer exits the process is also utilized to reduce wafer movement within the pocket. As described above, the height of the component is also calibrated. Because the
Fig. 6A and 6B illustrate examples of reducing or substantially eliminating backside deposition to a wafer. As shown, experiments have shown that backside deposition will occur when there is a gap between the wafer edge and the
Fig. 7 shows a
The
Typically, there will be a user interface associated with the
The computer program for controlling the delivery of the precursors, deposition and other processes in the process sequence can be written in, for example, any of the following conventional computer-readable programming languages: assembly language, C, C + +, Pascal, Fortran, or others. The compiled object code or script is executed by the processor to perform the tasks identified in the program.
The control module parameters relate to process conditions such as, for example, pressure differential across the filter, process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF power level and low frequency RF frequency), cooling gas pressure, and chamber wall temperature.
The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control the operation of the chamber components necessary to perform the deposition processes of the present invention. Examples of programs or program segments for this purpose include substrate positioning code, process gas control code, pressure control code, heater control code, and plasma control code.
The substrate positioning program can include program code for controlling chamber components used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other components of the chamber (e.g., gas inlets and/or targets). The process gas control program can include code for controlling the gas composition and flow rate and optionally for flowing the gas into the chamber to stabilize the pressure in the chamber prior to deposition. The filter monitor includes code to compare the measured one or more difference values to a predetermined one or more values and/or code to switch paths. The pressure control program may comprise code for controlling the pressure in the chamber by adjusting a throttle valve, for example in the exhaust system of the chamber. The heater control program may include code for controlling the current to the heating unit for heating the components within the precursor delivery system, the substrate, and/or other portions of the system. Alternatively, the heater control program may control the delivery of a heat transfer gas (e.g., helium) to the wafer chuck.
Examples of sensors that may be monitored during deposition include, but are not limited to, a mass flow control module, a pressure sensor such as a
The foregoing description of the embodiments has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but are interchangeable as applicable and can be used in a selected embodiment, even if not specifically shown or described. As such may be varied in many ways. Such variations are not to be regarded as a departure from the invention, and all such modifications are intended to be included within the scope of the invention.
Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.
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