阅读说明：本技术 一种可编程电容阵列结构 (Programmable capacitor array structure ) 是由 戴若凡 于 2019-10-29 设计创作，主要内容包括：本发明公开了一种可编程电容阵列结构,包括：电容阵列,包括分布于单刀多掷开关两端的两级电容阵列,该两级电容阵列的各相应电容反向串联于所述单刀多掷开关两端,用于给单刀多掷开关的每个射频开关支路提供不同的电容并组合得到更多不同容值；单刀多掷开关,包括多个射频开关支路,用于在控制逻辑模块的控制下将所述电容阵列的各电容支路选择性地连接在射频输入口和射频输出口间以提供射频通路；控制逻辑模块,用于在系统控制信号的控制下产生接通和断开所述单刀多掷开关各射频开关支路所需的栅极电压和源漏控制信号。(The invention discloses a programmable capacitor array structure, comprising: the capacitor array comprises two-stage capacitor arrays distributed at two ends of the single-pole multi-throw switch, and corresponding capacitors of the two-stage capacitor arrays are reversely connected in series at two ends of the single-pole multi-throw switch and are used for providing different capacitors for each radio frequency switch branch of the single-pole multi-throw switch and combining the capacitors to obtain more different capacitance values; the single-pole multi-throw switch comprises a plurality of radio frequency switch branches and a control logic module, wherein the radio frequency switch branches are used for selectively connecting each capacitor branch of the capacitor array between a radio frequency input port and a radio frequency output port under the control of the control logic module so as to provide a radio frequency path; and the control logic module is used for generating grid voltage and source-drain control signals required for switching on and switching off each radio frequency switch branch of the single-pole multi-throw switch under the control of a system control signal.)

1. A programmable capacitor array structure, comprising:

the capacitor array comprises two-stage capacitor arrays distributed at two ends of the single-pole multi-throw switch, and corresponding capacitors of the two-stage capacitor arrays are reversely connected in series at two ends of the single-pole multi-throw switch and are used for providing different capacitors for each radio frequency switch branch of the single-pole multi-throw switch and combining the capacitors to obtain more different capacitance values;

the single-pole multi-throw switch comprises a plurality of radio frequency switch branches and a control logic module, wherein the radio frequency switch branches are used for selectively connecting each capacitor branch of the capacitor array between a radio frequency input port and a radio frequency output port under the control of the control logic module so as to provide a radio frequency path;

and the control logic module is used for generating grid voltage and source-drain control signals required for switching on and switching off each radio frequency switch branch of the single-pole multi-throw switch under the control of a system control signal.

2. A programmable capacitor array structure as claimed in claim 1, wherein: the two-stage capacitor array is composed of two groups of capacitors C11-Cn 1 and C12-Cn 2 respectively, corresponding capacitors in the two groups of capacitors are reversely connected in series in corresponding capacitor array branches through corresponding radio frequency switch branches, and the capacitors Ci1 and Ci2 which are reversely connected in series and the radio frequency switch branch SWi of the single-pole multi-throw switch form a programmable capacitor array branch.

3. A programmable capacitor array structure as claimed in claim 2, wherein: radio frequency input signals are connected to the positive/negative ends of capacitors of the first-stage capacitor arrays C11-Cn 1 from the radio frequency input ports, the negative/positive end of each capacitor Ci1 is connected to the input end of the corresponding radio frequency switch branch SWi, the output end P2i of the radio frequency switch branch SWi is connected to the negative/positive end of the corresponding capacitor Ci2 of the second-stage capacitor arrays C12-Cn 2, and the positive/negative ends of the capacitors of the second-stage capacitor arrays C12-Cn 2 are connected to the radio frequency output ports.

4. A programmable capacitor array structure as claimed in claim 3, wherein: each radio frequency switch branch SWi comprises switch tubes M (i, Ki) -M (i,1) which are sequentially cascaded, the negative end of a capacitor Ci1 of the first-stage capacitor array is connected to the drain electrode of the switch tube M (i, Ki), the source electrode of the switch tube M (i, Ki) is connected to the drain electrode of the switch tube M (i, Ki-1) and …, and the source electrode of the switch tube M (i,2) is connected to the drain electrode of the switch tube M (i, 1); the body resistor Rb (i, j) is connected between the body of the switch M (i, j) and one end of the body common resistor rbc (i), the other end of the body common resistor rbc (i) is grounded, the drain source resistor Rds (i, j) is connected between the drain and source of the switch M (i, j), the gate resistor Rg (i, j) is connected between the gate of the switch M (i, j) and one end of the gate common resistor rgc (i), the other end of the gate common resistor rgc (i) is connected to the gate voltage Vgi, the source of the switch M (i,1) is the output P2i of the rf switch branch SWi, the gate voltage Vgi is further connected to one end of the nand gate NANDi, the switch array permission signal En is connected to the other end of the nand gate NANDi, and the output of the nand gate NANDi is connected to the source of the switch M (i,1) through the isolation resistor rc (i).

5. A programmable capacitor array structure as claimed in claim 4, wherein: the control logic module comprises a low-dropout voltage stabilizer and a logic circuit, wherein a system control signal is connected to the input end of the logic circuit, a power supply is connected to the input end of the low-dropout voltage stabilizer, the output end of the low-dropout voltage stabilizer is connected to the power supply end of the logic circuit, and the output end of the logic circuit is connected to the gate voltage and the source-drain control signal input end of each radio frequency switch branch SWi of the single-pole multi-throw switch.

6. A programmable capacitor array structure as claimed in claim 4, wherein: the capacitors C11-Cn 1 of the first-stage capacitor array are arranged in a power order.

7. A programmable capacitor array structure as claimed in claim 4, wherein: the capacitors C12-Cn 2 of the second-stage capacitor array are arranged in a power order.

8. A programmable capacitor array structure as claimed in claim 4, wherein: the number of stages of the stack of each rf switch branch SWi is different according to the weight of the capacitor array.

9. A programmable capacitor array structure as claimed in claim 1, wherein: the two-stage capacitor array series structure of the capacitor array adopts an array layout structure of firstly reverse parallel connection and then reverse series connection to improve harmonic nonlinearity.

10. A programmable capacitor array structure as claimed in claim 9, wherein: the two-stage capacitor array is respectively composed of two groups of capacitors C11-Cn 1 and C12-Cn 2, corresponding capacitors in the two groups of capacitors are reversely connected in series in corresponding capacitor array branches through corresponding radio frequency switch branches, the capacitors Ci1 and Ci2 which are reversely connected in series and the radio frequency switch branch SWi of the single-pole multi-throw switch form a programmable capacitor array branch, a capacitor Ci1 is connected in parallel and reversely connected in parallel by a capacitor Ci1a and a capacitor Ci1b, a capacitor Ci2 is connected in parallel and reversely connected in parallel by a capacitor Ci2a and a capacitor Ci2b, and then the capacitors are reversely connected in series at two ends of the radio frequency switch branch corresponding to the single-pole multi-throw switch.

Technical Field

The present invention relates to a programmable capacitor array structure, and more particularly, to a programmable capacitor array circuit capable of improving power distribution of a capacitor array and a radio frequency switch, reducing harmonic nonlinearity, and improving quality factor.

Background

With the development of mobile devices, the size of an antenna is smaller and smaller, and the application frequency band and frequency band are wider and wider, so that Aperture Tuning (Aperture Tuning) and Impedance Tuning (Impedance Tuning) are often required to be used in cooperation, and the Impedance of the antenna can be tuned in a large range by using a programmable capacitor array, so that multi-mode and multi-frequency high-efficiency reuse of the antenna is realized. Fig. 1 is a schematic diagram of aperture tuning and impedance tuning, where an aperture tuning circuit is connected between an antenna ANT and ground and an impedance tuning circuit is connected between the antenna ANT and a radio frequency front end RFFE, and the aperture tuning and the impedance tuning are typically implemented using a programmable capacitor array.

The programmable capacitor array is used as a key component of the antenna tuner, and can improve and realize multi-mode multi-frequency high-efficiency reuse of the antenna. The programmable capacitor array consists of a high-performance radio frequency switch control module SPnT and a capacitor array, and the key points of the programmable capacitor array comprise power capacity, linearity, capacitance regulation ratio and step length, quality factors and the like.

Fig. 2 is a schematic diagram of a conventional programmable Capacitor Array, where a radio frequency signal enters from a port P1 and is transmitted to a radio frequency output port P2 through n branches, each branch is formed by cascading a Capacitor Ci and a radio frequency switch branch SWi, where i is 1, 2, … …, and n, where capacitors C1 to Cn form a Capacitor Array (Capacitor Array), and radio frequency switch branches SW1 to SWn form a single-pole multi-throw switch (SPnT).

Fig. 3 is a conventional programmable capacitor array circuit that includes a capacitor array 10, a single pole, multiple throw switch (SPnT)20, and a control logic block 30. The capacitor array 10 is composed of capacitors C1-Cn, typically C1-Cn arranged in power, for example, Ci being 2^i-1C, i ═ 1, 2, … …, n, used to provide different capacitance to each branch; the single-pole multi-throw switch (SPnT)20 consists of radio frequency switch branches SW 1-SWn and is used for selectively connecting capacitors C1-Cn between a radio frequency input port T and a radio frequency output port ANT under the control of the control logic module 30; the Control Logic module 30 is composed of a low dropout regulator LDO, a Logic circuit (Logic), a Level shifter (Level shift), and a negative voltage generator NVG, and is configured to generate a positive bias voltage and a negative bias voltage required to turn on and off each rf switch branch of the single-pole multi-throw switch (SPnT)20 under the Control of a system Control signal Control.

Fig. 4 is a schematic diagram of a branch of an rf switch of a conventional programmable capacitor array circuit, which is composed of a gate common resistor rgc (i), a gate common resistor rbc (i), and a cascade of Ki rf switches, where each rf switch is composed of a switch tube M (i, j), a gate resistor Rg (i, j), a body resistor Rb (i, j), and a drain-source resistor Rsd (i, j), where i is 1, 2, … …, n, j is Ki, Ki-1, … …, 1. Fig. 4 shows rf switch branches of a conventional programmable capacitor array circuit, that is, SWi and Ki groups of rf switches in fig. 3 form 1 rf switch branch, and n rf switch branches are total, where Ki is m, and i is 1, 2, … …, and n, that is, the stacking stages of all rf switch branches are the same.

The rf switch branches shown in fig. 4 are cascaded in capacitors to form a programmable capacitor array branch, i.e., the upper part of fig. 5, and the equivalent circuits of the rf switch branches are shown in the lower left part and the lower right part of fig. 5 when the rf switch branches are turned on and off. The branch capacitor corresponds to the quality factor Q and the voltage Vsw borne by the switch as follows:

m/2＜Ki＜m

in fig. 5 and the above formula, Rsw is the total on-resistance when the rf switch branch is turned on, Ron is the unit width on-resistance when a single rf switch is turned on, C is the programmable capacitor array branch capacitance, V_RFThe radio frequency voltage Csw is the distributed capacitance when the radio frequency switch branch is disconnected, m is the number Ki of the radio frequency switches cascaded by the radio frequency switch branch, w is the width of a single radio frequency switch, and f is the working frequency.

However, since the conventional programmable capacitor array uses a single-stage capacitor, the number of stages of the stacked switches of each branch is consistent, the quality factor and the power capability cannot be optimized, and the radio frequency switch adopts negative voltage control, needs a potential translator, and has a complex digital structure and occupies a large area.

Disclosure of Invention

In order to overcome the above-mentioned deficiencies of the prior art, an object of the present invention is to provide a programmable capacitor array structure, which not only can increase the power voltage-resistant capability of the capacitor array, improve the power distribution of the capacitor array and the rf switch, and reduce the power capability requirement of the rf switch, thereby reducing the number of stacked stages, and further reducing the on-resistance and improving the quality factor.

Another objective of the present invention is to provide a programmable capacitor array structure, which can be used as a radio frequency switch to control DC blocking while forming a tuning capacitor array, wherein the radio frequency switch is controlled by a gate-source relative voltage, and a negative voltage generating circuit and a potential shifter are not required, thereby simplifying the structure of a digital control circuit and the requirements of digital radio frequency isolation.

It is another objective of the present invention to provide a programmable capacitor array structure, which can improve the harmonic nonlinearity of the circuit.

To achieve the above and other objects, the present invention provides a programmable capacitor array structure, comprising:

the capacitor array comprises two-stage capacitor arrays distributed at two ends of the single-pole multi-throw switch, and each capacitor branch of the two-stage capacitor arrays is connected in series at two ends of the single-pole multi-throw switch and is used for providing different capacitors for each radio frequency switch branch of the single-pole multi-throw switch and combining the capacitors to obtain more different capacitance values;

the single-pole multi-throw switch comprises a plurality of radio frequency switch branches and a control logic module, wherein the radio frequency switch branches are used for selectively connecting each capacitor branch of the capacitor array between a radio frequency input port and a radio frequency output port under the control of the control logic module so as to provide a radio frequency path;

and the control logic module is used for generating grid voltage and source-drain control signals required for switching on and switching off each radio frequency switch branch of the single-pole multi-throw switch under the control of a system control signal.

Preferably, the two-stage capacitor array is respectively composed of two groups of capacitors C11-Cn 1 and C12-Cn 2, corresponding capacitors in the two groups of capacitors are reversely connected in series in corresponding capacitor array branches through corresponding radio frequency switch branches, and the capacitors Ci1 and Ci2 which are reversely connected in series and the radio frequency switch branch SWi of the single-pole multi-throw switch form a programmable capacitor array branch.

Preferably, a radio frequency input signal is connected to the positive/negative terminals of the capacitors of the first-stage capacitor arrays C11 to Cn1 from the radio frequency input port, the negative/positive terminal of each capacitor Ci1 is connected to the input terminal of the corresponding radio frequency switch branch SWi, each output terminal P2i of the radio frequency switch branch SWi is connected to the negative/positive terminals of the corresponding capacitor Ci2 of the second-stage capacitor arrays C12 to Cn2, and the positive/negative terminals of the capacitors of the second-stage capacitor arrays C12 to Cn2 are connected to the radio frequency output port.

Preferably, each radio frequency switch branch SWi comprises switch tubes M (i, Ki) -M (i,1) which are sequentially cascaded, the negative end of the capacitor Ci1 of the first-stage capacitor array is connected to the drain of the switch tube M (i, Ki), the source of the switch tube M (i, Ki) is connected to the drain of the switch tube M (i, Ki-1), …, and the source of the switch tube M (i,2) is connected to the drain of the switch tube M (i, 1); the body resistor Rb (i, j) is connected between the body of the switch M (i, j) and one end of the body common resistor rbc (i), the other end of the body common resistor rbc (i) is grounded, the drain source resistor Rds (i, j) is connected between the drain and source of the switch M (i, j), the gate resistor Rg (i, j) is connected between the gate of the switch M (i, j) and one end of the gate common resistor rgc (i), the other end of the gate common resistor rgc (i) is connected to the gate voltage Vgi, the source of the switch M (i,1) is the output P2i of the rf switch branch SWi, the gate voltage Vgi is further connected to one end of the nand gate NANDi, the switch array permission signal En is connected to the other end of the nand gate NANDi, and the output of the nand gate NANDi is connected to the source of the switch M (i,1) through the isolation resistor rc (i).

Preferably, the control logic module includes a low dropout regulator and a logic circuit, the system control signal is connected to an input terminal of the logic circuit, the power supply is connected to the input terminal of the low dropout regulator, an output terminal of the low dropout regulator is connected to a power supply terminal of the logic circuit, and an output terminal of the logic circuit is connected to a gate voltage and a source-drain control signal input terminal of each radio frequency switch branch SWi of the single-pole multi-throw switch.

Preferably, the capacitances C11-Cn 1 of the first stage capacitor array are arranged in powers.

Preferably, the capacitances C12-Cn 2 of the second stage capacitor array are in a power order.

Preferably, the number of stacked stages of each rf switch branch SWi is different according to the weight of the capacitor array.

Preferably, the two-stage capacitor array series structure of the capacitor array adopts an array layout structure of firstly reverse parallel connection and then reverse series connection to improve harmonic nonlinearity.

Preferably, the two-stage capacitor array is respectively composed of two groups of capacitors C11-Cn 1 and C12-Cn 2, corresponding capacitors in the two groups of capacitors are reversely connected in series in corresponding capacitor array branches through corresponding radio frequency switch branches, the capacitors Ci1 and Ci2 which are reversely connected in series and the radio frequency switch branch SWi of the single-pole multi-throw switch form a programmable capacitor array branch, the capacitor Ci1 is connected in parallel and reversely connected in parallel by a capacitor Ci1a and a capacitor Ci1b, the capacitor Ci2 is connected in parallel and reversely connected in parallel by Ci2a and Ci2b, and then is reversely connected in series at two ends of the corresponding radio frequency switch branch of the single-pole multi-throw switch.

Compared with the prior art, the programmable capacitor array structure of the invention adopts the two-stage capacitor array series connection to increase the power pressure resistance of the capacitor array, improve the power distribution of the capacitor array and the radio frequency switch, reduce the power capacity requirement of the radio frequency switch, thereby reducing the number of laminated stages, further reducing the on-resistance and improving the quality factor, and the invention distributes the two-stage capacitor arrays at two ends of the single-pole multi-throw switch in series, the tuning capacitor array can be formed and simultaneously used as a radio frequency switch to control DC blocking, the radio frequency switch is controlled by adopting grid-source relative voltage, a negative voltage generating circuit and a potential translator are not needed, the structure of a digital control circuit and the requirement of digital radio frequency isolation are simplified, and harmonic nonlinearity can be improved by adopting an array layout of firstly reverse parallel connection and then reverse series connection for the series connection of two stages of capacitor arrays.

Drawings

FIG. 1 is a schematic diagram of prior art antenna impedance matching and aperture tuning;

FIG. 2 is a schematic diagram of a conventional programmable capacitor array;

FIG. 3 is a circuit diagram of a conventional programmable capacitor array;

FIG. 4 is a schematic diagram of an RF switch branch of a conventional programmable capacitor array circuit;

FIG. 5 is a schematic diagram of a conventional programmable capacitor array branch circuit;

FIG. 6 is a circuit diagram of a programmable capacitor array structure according to an embodiment of the present invention;

FIG. 7a is a schematic diagram of the programmable capacitor array branches of FIG. 6 according to the present invention;

FIG. 7b is a specific circuit structure diagram of the RF switch branch SWi according to the present invention;

FIG. 8 is a circuit diagram of another embodiment of a programmable capacitor array structure according to the present invention;

FIG. 9a is a schematic diagram of a capacitor network with different combinations;

FIG. 9b is a schematic diagram of a series-parallel array of the present invention;

FIG. 10a is a comparison of Q-values of the present invention and conventional techniques;

FIG. 10b is a harmonic comparison graph of the present invention and the conventional technique

Detailed Description

Other advantages and capabilities of the present invention will be readily apparent to those skilled in the art from the present disclosure by describing the embodiments of the present invention with specific embodiments thereof in conjunction with the accompanying drawings. The invention is capable of other and different embodiments and its several details are capable of modification in various other respects, all without departing from the spirit and scope of the present invention.

FIG. 6 is a circuit diagram of a programmable capacitor array structure according to an embodiment of the present invention. As shown in fig. 6, a programmable capacitor array structure of the present invention includes: a Capacitor array (Capacitor)10, a single pole multi-throw switch (SPnT)20, and a control logic module 30.

The capacitor array 10 includes two-stage capacitor arrays distributed at two ends of a single-pole multi-throw switch (SPnT)20, the two-stage capacitor arrays are serially distributed at two ends of a radio frequency switch to form a tuning capacitor array and simultaneously can be used as the radio frequency switch to control DC blocking, the two-stage capacitor arrays respectively include two groups of capacitors C11-Cn 1 and C12-Cn 2, corresponding capacitors of the two groups of capacitors are reversely connected in series in corresponding capacitor array branches, usually, the capacitors C11-Cn 1 and the capacitors C12-Cn 2 are arranged in power, for example, Ci 1-Ci 2-Ci 2ⁱC, the total capacitance Ci of the branch is 2^i-1C, i is 1, 2, … …, n, the capacitors arranged in power are used for providing different capacitors for each branch and can be combined to obtain different capacitance values; the single-pole multi-throw switch (SPnT)20 consists of radio frequency switch branches SW 1-SWn, and is used for connecting capacitors C11-Cn 1 and C12-Cn 2 in series selectively under the control of the control logic module 30 and then connecting the capacitors between a radio frequency input port T and a radio frequency output port ANT to provide a radio frequency path; the Control Logic module 30 is composed of a low dropout regulator LDO and a Logic circuit (Logic), and is used for generating a gate voltage Vgi and a source-drain Control for turning on and off each rf switch branch of the single-pole multi-throw switch (SPnT)20 under the Control of a system Control signal ControlThe signal En, i is 1, 2, … …, n.

The capacitors Ci1 and Ci2 connected in series in an inverted manner and the radio frequency switch branch SWi form a programmable capacitor array branch, i is 1, 2, … … and n, as shown in fig. 7a, the positive terminal of Ci1 is a radio frequency input port T, the negative terminal of Ci1 is connected to the input terminal of the switch SWi, i.e., the drain of the switch tube M (i, Ki), the output terminal P2i of the switch SWi, i.e., the source of the switch tube M (i,1), is connected to the negative terminal of the capacitor Ci2, and the positive terminal of Ci2 is connected to the radio frequency output port ANT; fig. 7b is a specific circuit structure diagram of the rf switch branch SWi of the present invention, in which the switching tubes M (i, Ki) -M (i,1) are sequentially cascaded, that is, the source of the switching tube M (i, Ki) is connected to the drain of the switching tube M (i, Ki-1), … …, and the source of the switching tube M (i,2) is connected to the drain of the switching tube M (i, 1); the body electrode resistor Rb (i, j) is connected between the body electrode of the switching tube M (i, j) and one end of a body electrode common resistor Rbc (i), the other end of the body electrode common resistor Rbc (i) is grounded, the drain source resistor Rds (i, j) is connected between the drain electrode and the source electrode of the switching tube M (i, j), the grid resistor Rg (i, j) is connected between the grid electrode of the switching tube M (i, j) and one end of a grid electrode common resistor Rgc (i), the other end of the grid electrode common resistor Rgc (i) is connected with grid voltage Vgi, j is Ki, Ki-1, … … and 1, and the source electrode of the switching tube M (i,1) is the output end P2i of the radio frequency switching branch SWi; the gate voltage Vgi is further connected to one end of the nand gate NANDi, the source-drain control signal En is connected to the other end of the nand gate NANDi, and the output end of the nand gate NANDi is connected to the source of the switch tube M (i,1) through the isolation resistor rc (i).

It should be noted that the capacitors connected in series in fig. 7a may also be reversed as a whole, that is, the negative terminal of the capacitor Ci1 is connected to the rf input port T, the positive terminal of the capacitor Ci1 is connected to the input terminal of the switch SWi, i.e., the drain of the switch transistor M (i, Ki), the negative terminal of the other capacitor Ci2 is connected to the rf output port ANT, and the output terminal P2i of the switch SWi, i.e., the source of the switch transistor M (i,1), is connected to the positive terminal of the capacitor Ci 2.

Specifically, the radio frequency input signal is connected to the positive terminals of C11-Cn 1 from the radio frequency input port T; the negative terminal of Ci1 is connected to the input of switch SWi, the output terminal P2i of switch SWi is connected to the negative terminal of Ci2, i is 1, 2, … …, n; the positive ends of the C12-Cn 2 are connected to a radio frequency output port ANT; the system Control signal Control is connected to an input end of a Logic circuit (Logic) of the Control Logic module 30, the power supply AVDD is connected to an input end of the low dropout regulator LDO, an output end of the low dropout regulator LDO is connected to a power supply end of the Logic circuit (Logic), an output end of the Logic circuit (Logic) is connected to a gate voltage Vgi and a source-drain Control signal En input end of each radio frequency switch branch SWi of the single-pole multi-throw switch (SPnT)20, and i is 1, 2, … …, n.

The capacitor array adopts two-stage capacitor arrays which are connected in series, the structure can improve the power distribution of the capacitor array and the radio frequency switch, and reduce the power capacity requirement of the radio frequency switch, thereby reducing the number of laminated stages, further reducing the on-resistance and improving the quality factor.

It should be noted that, in the present invention, the stacking order of each rf switch branch SWi is different according to the optimization design of the capacitor array weights, that is, K1, K2, … …, Kn are not completely equal, and Kn ═ m, which can optimize the quality factor to the maximum extent.

In another embodiment of the present invention, as shown in fig. 8, the two-stage capacitor array series structure of the capacitor array 10 adopts an array layout of first antiparallel and then antiparallel to improve the harmonic nonlinearity.

The principle of the present embodiment is explained first as follows:

in an integrated circuit, the capacitance has a non-linearity, which is expressed as follows:

C(V)＝C₀(1+b₁V+b₂V²)

in the formula, C₀Is a static capacitance, b₁Related to the second harmonic, b₂Related to the third harmonic.

Considering the nonlinearity of the capacitor, the capacitor networks (fig. 9a) with different combinations (single, parallel in the same direction, parallel in the opposite direction, series in the same direction, and series in the opposite direction) are simulated, and the simulation result of the nonlinear comparison of the capacitors is shown in table 1, which shows that the parallel connection in the same direction is worst, the series connection in the same direction can reduce the second harmonic and the third harmonic to a certain extent, the parallel capacitor array adopts the inverse parallel connection to improve the even harmonic, the series capacitor adopts the inverse series connection to improve the odd harmonic and the even harmonic simultaneously, so the two-stage capacitor array series adopts the layout of firstly inverse parallel connection and then inverse series array to improve the nonlinearity, as shown in fig. 9 b.

TABLE 1 capacitance non-linearity comparison

	Is single	Are connected in parallel in the same direction	Reverse parallel connection	Are connected in series in the same direction	Reverse series connection
						H2	b1	b1	0	b1/2	0
H3	b2	b2	b2	b2/4	b2/4

The implementation of fig. 8 is thus obtained, i.e. on the basis of fig. 7, the capacitance Ci1 is changed to be Ci1a and Ci1b in parallel, i is 1, 2, … …, n, and is connected in anti-parallel; the capacitor Ci2 is changed into a capacitor Ci2a and a capacitor Ci2b which are connected in parallel and in inverse parallel, i is 1, 2, … … and s, and then the capacitor Ci2 is connected in series and in inverse direction at two ends of a single-pole multi-throw switch corresponding to the radio frequency switch branch so as to improve harmonic nonlinearity.

FIG. 10a is a Q-value comparison graph of the present invention and the conventional art, wherein the connecting lines of the diamond points are simulation curves of the present invention, and the connecting lines of the square points are simulation curves of the conventional art; FIG. 10b is a harmonic comparison graph of the present invention and the conventional art, wherein the circular points are the second harmonic simulation curve of the present invention, the diamond points are the third harmonic simulation curve of the present invention, the triangular points are the fourth harmonic simulation curve of the present invention, the circular points are the second harmonic simulation curve of the conventional art, the diamond points are the third harmonic simulation curve of the conventional art, and the triangular points are the fourth harmonic simulation curve of the conventional art. Simulation results show that the Q value of the whole capacitor array is improved by more than 8, and harmonic waves are improved by 3-6 dB.

In summary, the programmable capacitor array structure of the present invention adopts a design that two-stage capacitor arrays are connected in series to increase the power voltage resistance of the capacitor array, improve the power distribution of the capacitor array and the radio frequency switch, and reduce the power capability requirement of the radio frequency switch, thereby reducing the number of stages of lamination, further reducing the on-resistance, and improving the quality factor.

The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Therefore, the scope of the invention should be determined from the following claims.