阅读说明：本技术 一种电压传感器电路 (Voltage sensor circuit ) 是由 陈浩 王雷 郑华雄 任浩 周俊 王庆欢 于 2020-01-09 设计创作，主要内容包括：本发明提出了一种电压传感器电路,涉及传感器技术领域,电压传感器电路包括：采样电路、第一滤波电路、调制电路、第一变压器、解调电路、第二滤波电路；其中,采样电路用于将被测信号转换为等比例的低压信号；第一滤波电路用于滤除所述低压信号中的干扰信号；调制电路用于将第一滤波电路输出的信号调制成高频交流信号,并通过第一变压器传递到解调电路；其中,所述第一变压器的原边绕组与调制电路的输出端连接,副边绕组与解调电路的输入端连接；解调电路用于将输入的高频交流信号转换为与被测信号成比例的直流信号；所述直流信号经过第二滤波电路后形成输出信号。该电压传感器电路可减弱磁场干扰,并具有较高的绝缘耐压水平。(The invention provides a voltage sensor circuit, which relates to the technical field of sensors, and comprises: the circuit comprises a sampling circuit, a first filter circuit, a modulation circuit, a first transformer, a demodulation circuit and a second filter circuit; the sampling circuit is used for converting a detected signal into a low-voltage signal with equal proportion; the first filter circuit is used for filtering interference signals in the low-voltage signals; the modulation circuit is used for modulating the signal output by the first filter circuit into a high-frequency alternating current signal and transmitting the high-frequency alternating current signal to the demodulation circuit through the first transformer; the primary winding of the first transformer is connected with the output end of the modulation circuit, and the secondary winding of the first transformer is connected with the input end of the demodulation circuit; the demodulation circuit is used for converting an input high-frequency alternating current signal into a direct current signal proportional to a signal to be detected; the direct current signal forms an output signal after passing through a second filter circuit. The voltage sensor circuit can reduce magnetic field interference and has a high insulation withstand voltage level.)

1. A voltage sensor circuit, comprising: the circuit comprises a sampling circuit, a first filter circuit, a modulation circuit, a first transformer, a demodulation circuit and a second filter circuit;

the sampling circuit is used for converting a detected signal into a low-voltage signal with equal proportion;

the first filter circuit is used for filtering interference signals in the low-voltage signals;

the modulation circuit is used for modulating the signal output by the first filter circuit into a high-frequency alternating current signal and transmitting the high-frequency alternating current signal to the demodulation circuit through the first transformer; the primary winding of the first transformer is connected with the output end of the modulation circuit, and the secondary winding of the first transformer is connected with the input end of the demodulation circuit;

the demodulation circuit is used for converting an input high-frequency alternating current signal into a direct current signal proportional to a signal to be detected; the direct current signal forms an output signal after passing through a second filter circuit.

2. The voltage sensor circuit of claim 1, wherein the modulation circuit and the demodulation circuit are both CMOS multi-way analog switches.

3. The voltage sensor circuit of claim 2, further comprising a power supply circuit; the power supply circuit includes: the device comprises a PWM signal generator, a first rectifier, a second rectifier and a push-pull circuit; wherein the push-pull circuit comprises: the first switch tube, the second switch tube and the second transformer;

the first switching tube and the second switching tube are connected to a primary winding of a second transformer; the PWM signal generator is used for controlling the on-off of the two switching tubes so as to generate a square wave signal in a primary winding of the second transformer;

the input end of the first rectifier is connected with the first secondary winding of the second transformer, and the square wave signal output by the output end of the first rectifier is used for driving the modulation circuit;

the input end of the second rectifier is connected with the second secondary winding of the second transformer, and the square wave signal output by the output end of the second rectifier is used for driving the demodulation circuit.

4. The voltage sensor circuit of claim 3, wherein the push-pull circuit further comprises: the circuit comprises a first diode, a second diode, a first triode, a second triode, a first resistor and a second resistor;

a first port of the PWM signal generator is connected to a first switching tube through a first diode, and a second port of the PWM signal generator is connected to a second switching tube through a second diode; the positive electrodes of the first diode and the second diode are connected with one end of the PWM signal generator;

the first triode and the second triode are both PNP type, wherein the emitting electrode of the first triode is connected with the negative electrode of the first diode, the collecting electrode of the first triode is connected with the ground, and the base electrode of the first triode is connected with the positive electrode of the first diode; the anode of the first diode is grounded through a first resistor;

the emitter of the second triode is connected with the cathode of the second diode, the collector of the second triode is grounded, and the base of the second triode is connected with the anode of the second diode; and the anode of the second diode is grounded through a second resistor.

5. The voltage sensor circuit of claim 3, wherein the power circuit further comprises: the voltage-dependent resistor, the first capacitor, the first inductor, the second inductor, the rectifier bridge and the serial direct-current voltage stabilizing circuit are connected in series;

the voltage dependent resistor and the first capacitor are connected between the two power supply input ends; the first end of the first capacitor is connected to the first input end of the rectifier bridge through the first inductor; the second end of the first capacitor is connected to the second input end of the rectifier bridge through a second inductor; the output end of the rectifier bridge is connected to the input end of the serial direct current voltage stabilizing circuit; the output end of the series direct current voltage stabilizing circuit is connected to the PWM signal generator.

6. The voltage sensor circuit of claim 1, wherein the sampling circuit comprises: a third resistor, a fourth resistor, a fifth resistor and a sixth resistor;

the first end of the third resistor is a first input end of a detected signal; the first end of the fourth resistor is a second input end of the detected signal; the fifth resistor and the sixth resistor are connected in parallel between the second end of the third resistor and the second end of the fourth resistor.

7. The voltage sensor circuit of claim 6, wherein the first filter circuit comprises: the circuit comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a first operational amplifier and a second capacitor;

the first end of the seventh resistor is connected with the second end of the third resistor, and the second end of the seventh resistor is connected to the inverting input end of the first operational amplifier through the eighth resistor;

the first end of the ninth resistor is connected with the second end of the fourth resistor, and the second end of the ninth resistor is connected to the non-inverting input end of the first operational amplifier through a tenth resistor;

the output end of the first operational amplifier is connected to the first end of an eleventh resistor, and the second end of the eleventh resistor is connected to the input end of the modulation circuit; the second capacitor is connected between the second end of the seventh resistor and the output end of the first operational amplifier; the twelfth resistor is connected between the second end of the seventh resistor and the second end of the eleventh resistor.

8. The voltage sensor circuit of claim 1, wherein the second filtering circuit comprises: the circuit comprises a first operational amplifier, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor and a common-mode inductor;

the inverting input end of the second operational amplifier is connected to the output end of the demodulation circuit through a thirteenth resistor, a fourteenth resistor and a fifteenth resistor which are sequentially connected in series; the first end of the fifteenth resistor is connected with the output end of the demodulation circuit, and the first end of the thirteenth resistor is connected with the inverting input end of the second operational amplifier; a first end of the fifteenth resistor is grounded through the third capacitor, and a second end of the fifteenth resistor is grounded through the fourth capacitor; the non-inverting input end of the second operational amplifier is grounded through a sixteenth resistor;

a first end of the seventeenth resistor is connected with the output end of the second operational amplifier, and a second end of the seventeenth resistor is connected with a first input end of the common-mode inductor; the eighteenth resistor is connected between the second end of the thirteenth resistor and the second end of the seventeenth resistor; the fifth capacitor is connected between the second end of the thirteenth resistor and the output end of the second operational amplifier;

the sixth capacitor is connected between the first input end and the second input end of the common-mode inductor; the second input end of the common mode inductor is grounded; a seventh capacitor is connected between the two output ends of the common mode inductor;

and the two output ends of the common mode inductor are signal output ends.

9. The voltage sensor circuit of claim 3, wherein the first rectifier and the second rectifier are bridge rectifier circuits.

10. Voltage sensor circuit according to claim 2, characterized in that the CMOS multi-way analog switch is in particular a four-channel analog switch.

Technical Field

The invention relates to the technical field of sensors, in particular to a voltage sensor circuit.

Background

The closed-loop Hall voltage sensor and the fluxgate sensor have the common characteristic that a material with high magnetic permeability is used as a magnetic core, the magnetic concentration is performed, the higher the magnetic permeability is, the better the magnetic concentration is, the smaller the magnetic leakage is, and therefore the sensor precision is higher. Specifically, the hall sensor is a magnetic field sensor manufactured according to a hall effect, for example, chinese patent CN201810596463.7 discloses a voltage sensor based on a hall magnetic balance type, which includes an iron core, a primary coil and a secondary coil wound on the iron core, a hall element disposed in the middle of the iron core for detecting the magnetic field of the iron core, a feedback circuit formed by the hall element, and a thermistor attached to the primary coil, wherein the thermistor has a negative temperature characteristic. The hall sensor is inevitably required to gather magnetic due to the limitation of the principle, and thus, the hall sensor is sensitive to the environmental magnetic field. On the other hand, the hall sensor can be often applied to high-voltage and high-current environments, according to the law of electromagnetic induction, the environment where the hall sensor is located has a large number of interference magnetic fields besides the magnetic field of the detected signal, and due to the characteristics of the hall sensor, the precision of the product can be correspondingly influenced.

In addition, as system-level products are increasingly designed in the direction of integration and miniaturization, the market places the same demands on the sensors. Meanwhile, due to the integrated design of system products, the distance between internal components of the products is reduced, and the mutual interference among the components is more and more serious.

When an external interference magnetic field exists in the environment, the magnetic core with high magnetic conductivity can gather the interference magnetic field, so that an interference signal is introduced into a detected signal, the precision of a product exceeds the standard, and even the sensor works abnormally in serious cases.

Disclosure of Invention

The present invention is directed to a voltage sensor circuit, which can reduce magnetic field interference and has a high dielectric breakdown voltage level.

The voltage sensor circuit includes: the circuit comprises a sampling circuit, a first filter circuit, a modulation circuit, a first transformer, a demodulation circuit and a second filter circuit; the sampling circuit is used for converting a detected signal into a low-voltage signal with equal proportion; the first filter circuit is used for filtering interference signals in the low-voltage signals; the modulation circuit is used for modulating the signal output by the first filter circuit into a high-frequency alternating current signal and transmitting the high-frequency alternating current signal to the demodulation circuit through the first transformer; the primary winding of the first transformer is connected with the output end of the modulation circuit, and the secondary winding of the first transformer is connected with the input end of the demodulation circuit; the demodulation circuit is used for converting an input high-frequency alternating current signal into a direct current signal proportional to a signal to be detected; the direct current signal forms an output signal after passing through a second filter circuit.

Further, the modulation circuit and the demodulation circuit are both CMOS multi-way analog switches.

Furthermore, the voltage sensor circuit also comprises a power supply circuit; the power supply circuit includes: the device comprises a PWM signal generator, a first rectifier, a second rectifier and a push-pull circuit; wherein the push-pull circuit comprises: the first switch tube, the second switch tube and the second transformer; the first switching tube and the second switching tube are connected to a primary winding of a second transformer; the PWM signal generator is used for controlling the on-off of the two switching tubes so as to generate a square wave signal in a primary winding of the second transformer;

the input end of the first rectifier is connected with the first secondary winding of the second transformer, and the square wave signal output by the output end of the first rectifier is used for driving the modulation circuit; the input end of the second rectifier is connected with the second secondary winding of the second transformer, and the square wave signal output by the output end of the second rectifier is used for driving the demodulation circuit.

Further, the push-pull circuit further comprises: the circuit comprises a first diode, a second diode, a first triode, a second triode, a first resistor and a second resistor; a first port of the PWM signal generator is connected to the first switching tube through a first diode, and a second port of the PWM signal generator is connected to the second switching tube through a second diode; the positive electrodes of the first diode and the second diode are connected with one end of the PWM signal generator; the first triode and the second triode are both PNP type, wherein the emitting electrode of the first triode is connected with the negative electrode of the first diode, the collecting electrode of the first triode is connected with the ground, and the base electrode of the first triode is connected with the positive electrode of the first diode; the anode of the first diode is grounded through a first resistor; the emitter of the second triode is connected with the cathode of the second diode, the collector is grounded, and the base is connected with the anode of the second diode; and the anode of the second diode is grounded through a second resistor.

Further, the power supply circuit further includes: the voltage-dependent resistor, the first capacitor, the first inductor, the second inductor, the rectifier bridge and the serial direct-current voltage stabilizing circuit are connected in series; the voltage dependent resistor and the first capacitor are connected between the two power supply input ends; the first end of the first capacitor is connected to the first input end of the rectifier bridge through the first inductor; the second end of the first capacitor is connected to the second input end of the rectifier bridge through a second inductor; the output end of the rectifier bridge is connected to the input end of the serial direct current voltage stabilizing circuit; the output end of the series direct current voltage stabilizing circuit is connected to the PWM signal generator.

Further, the sampling circuit includes: a third resistor, a fourth resistor, a fifth resistor and a sixth resistor; the first end of the third resistor is a first input end of a detected signal; the first end of the fourth resistor is a second input end of the detected signal; the fifth resistor and the sixth resistor are connected in parallel between the second end of the third resistor and the second end of the fourth resistor.

Further, the first filter circuit includes: the circuit comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a first operational amplifier and a second capacitor; the first end of the seventh resistor is connected with the second end of the third resistor, and the second end of the seventh resistor is connected to the inverting input end of the first operational amplifier through the eighth resistor; the first end of the ninth resistor is connected with the second end of the fourth resistor, and the second end of the ninth resistor is connected to the non-inverting input end of the first operational amplifier through the tenth resistor; the output end of the first operational amplifier is connected to the first end of the eleventh resistor, and the second end of the eleventh resistor is connected to the input end of the modulation circuit; the second capacitor is connected between the second end of the seventh resistor and the output end of the first operational amplifier; the twelfth resistor is connected between the second end of the seventh resistor and the second end of the eleventh resistor.

Further, the second filter circuit includes: the circuit comprises a first operational amplifier, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor and a common-mode inductor; the inverting input end of the second operational amplifier is connected to the output end of the demodulation circuit through a thirteenth resistor, a fourteenth resistor and a fifteenth resistor which are sequentially connected in series; the first end of the fifteenth resistor is connected with the output end of the demodulation circuit, and the first end of the thirteenth resistor is connected with the inverting input end of the second operational amplifier; a first end of the fifteenth resistor is grounded through the third capacitor, and a second end of the fifteenth resistor is grounded through the fourth capacitor; the non-inverting input end of the second operational amplifier is grounded through a sixteenth resistor; a first end of the seventeenth resistor is connected with the output end of the second operational amplifier, and a second end of the seventeenth resistor is connected with a first input end of the common-mode inductor; the eighteenth resistor is connected between the second end of the thirteenth resistor and the second end of the seventeenth resistor; the fifth capacitor is connected between the second end of the thirteenth resistor and the output end of the second operational amplifier; the sixth capacitor is connected between the first input end and the second input end of the common-mode inductor; the second input end of the common mode inductor is grounded; a seventh capacitor is connected between the two output ends of the common mode inductor; two output ends of the common mode inductor are signal output ends.

Further, the first rectifier and the second rectifier are bridge rectifier circuits.

Further, the CMOS multi-channel analog switch is specifically a four-channel analog switch.

In the technical scheme of the application, the voltage sensor signal adopts the transformer to keep apart, utilizes low magnetic conductivity magnetic core preparation transformer to keep apart, can weaken magnetic field interference, improves voltage sensor's measurement accuracy, has higher withstand voltage level simultaneously, is adaptable to high-pressure test environment.

Drawings

FIG. 1 is a schematic block diagram of a voltage sensor circuit in an exemplary embodiment of the invention.

Fig. 2 is a circuit diagram of a voltage sensor circuit in an exemplary embodiment of the invention.

Detailed Description

The following are specific embodiments of the present invention and are further described with reference to the drawings, but the present invention is not limited to these embodiments.

Referring to fig. 1 and 2, the voltage sensor circuit includes: a sampling circuit 10, a first filter circuit 20, a modulation circuit 30, a first transformer 40, a demodulation circuit 50, and a second filter circuit 60; the sampling circuit 10 is used for converting a detected signal into a low-voltage signal with equal proportion; the first filter circuit 20 is used for filtering out interference signals in the low-voltage signals; the modulation circuit 30 is used for modulating the signal output by the first filter circuit 20 into a high-frequency alternating current signal and transmitting the high-frequency alternating current signal to the demodulation circuit 50 through a first transformer; the primary winding of the first transformer is connected with the output end of the modulation circuit 30, and the secondary winding is connected with the input end of the demodulation circuit 50; the demodulation circuit 50 is used for converting an input high-frequency alternating current signal into a direct current signal proportional to a signal to be detected; the dc signal passes through a second filter circuit 60 to form an output signal.

Specifically, a measured signal of a high voltage of the voltage sensor is converted into an equal-proportion low-voltage signal after passing through the sampling circuit 10; the low-voltage signal passes through the first filter circuit 20 to filter out interference signals; the filtered signal is modulated by the modulation circuit 30 into a high frequency ac signal, and then transmitted to the secondary side through the first transformer 40, the high frequency ac signal is converted into a dc signal in a certain proportion to the measured signal through the demodulation circuit 50, and the dc signal is used as an output signal through the second filter circuit 60.

In the embodiment of the present application, the voltage sensor signal is isolated by using the first transformer 40, and the transformer is made of a low-permeability magnetic core, so that the magnetic field interference can be weakened, and the measurement accuracy of the voltage sensor can be improved.

It should be noted that, the magnetic core of the hall sensor is generally made of a material with high magnetic permeability, such as silicon steel or permalloy, and the transformer is generally made of ferrite, so the sensitivity to the external magnetic field is not as good as that of silicon steel or permalloy.

Further, if the integrated chip isolation is adopted, the space can be further reduced on the structure, but the integrated chip is difficult to achieve a higher insulation voltage resistance level, so that the integrated chip isolation has certain application risks in a high-voltage environment. The voltage sensor circuit is isolated by the transformer and is suitable for a high-voltage testing environment.

In some embodiments, the modulation circuit 30 and the demodulation circuit 50 are both CMOS multi-way analog switches.

In some embodiments, the CMOS multi-channel analog switch is embodied as a four-channel analog switch.

It should be noted that, compared with other modulation schemes, the present application has a cost advantage in modulating the electrical signal by using multiple analog switches.

In some embodiments, the voltage sensor circuit further includes a power supply circuit 70; the power supply circuit 70 includes: the PWM signal generator U1, the first rectifier U2, the second rectifier U3 and the push-pull circuit 72; wherein the push-pull circuit 72 comprises: a first switch tube Q1, a second switch tube Q2 and a second transformer T1; the first switch tube Q1 and the second switch tube Q2 are connected to the primary winding of the second transformer T1; the PWM signal generator U1 is used for controlling the on-off of two switching tubes so as to generate a square wave signal in a primary winding of the second transformer T1; the input end of the first rectifier U2 is connected to the first secondary winding of the second transformer T1, and the square wave signal output by the output end thereof is used for driving the modulation circuit 30; the input terminal of the second rectifier U3 is connected to the second secondary winding of the second transformer T1, and the square wave signal outputted from the output terminal thereof is used to drive the demodulation circuit 50.

The push-pull circuit 72 is a push-pull transformer switching power supply, and two switching tubes work alternately in turn, which is equivalent to two switching power supplies outputting power simultaneously. The two switching devices of the push-pull switching power supply have a common ground terminal, and the driving circuit is much simpler compared with a half-bridge or full-bridge switching power supply.

The PWM signal generator U1 is used to generate PWM signals to control the on/off of two switching tubes in the push-pull circuit 72.

In some embodiments, the first rectifier U2 and the second rectifier U3 are bridge rectifier circuits.

In some embodiments, the push-pull circuit 72 further comprises: the circuit comprises a first diode D1, a second diode D2, a first triode Q3, a second triode Q4, a first resistor R1 and a second resistor R2; the first port of the PWM signal generator U1 is connected to the first switching tube Q1 through the first diode D1, and the second port is connected to the second switching tube Q2 through the second diode D2; the anodes of the first diode D1 and the second diode D2 are connected with one end of the PWM signal generator U1; the first triode Q3 and the second triode Q4 are both PNP type, wherein, the emitter of the first triode Q3 is connected with the cathode of the first diode D1, the collector is connected with the ground, and the base is connected with the anode of the first diode D1; the anode of the first diode D1 is grounded through a first resistor R1; an emitter of the second triode Q4 is connected with the cathode of the second diode D2, a collector is grounded, and a base is connected with the anode of the second diode D2; the anode of the second diode D2 is connected to ground through a second resistor R2.

In some embodiments, the power circuit 70 further includes: the voltage-dependent resistor Z1, the first capacitor C1, the first inductor L1, the second inductor L2, the rectifier bridge U4 and the serial direct-current voltage stabilizing circuit 71; the voltage dependent resistor Z1 and the first capacitor C1 are connected between two power input ends VCC + and VCC-; a first end of the first capacitor C1 is connected to a first input end of the rectifier bridge U4 through a first inductor L1; a second end of the first capacitor C1 is connected to a second input end of the rectifier bridge U4 through a second inductor L2; the output end of the rectifier bridge U4 is connected to the input end of the series DC voltage stabilizing circuit 71; the output end of the series type direct current stabilizing circuit 71 is connected to the PWM signal generator U1.

It should be noted that, due to the rectifier bridge U4, the external input power, i.e., the two power input terminals VCC +, VCC-, can be adapted to both ac input and dc input.

The piezoresistor Z1 can be used for preventing surge and filtering differential mode interference signals; the first capacitor C1, the first inductor L1 and the second inductor L2 are used for filtering; the series dc regulator 71 is an emitter follower regulator, and is used for regulating voltage. The output end of the series type direct current stabilizing circuit 71 is connected to the PWM signal generator U1.

In some embodiments, the sampling circuit 10 includes: a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6; the first end of the third resistor R3 is the first input end of the detected signal; the first end of the fourth resistor R4 is the second input end of the detected signal; the fifth resistor R5 and the sixth resistor R6 are connected in parallel between the second end of the third resistor R3 and the second end of the fourth resistor R4. The sampling circuit 10 is used for converting a measured signal into a low-voltage signal with equal proportion.

In some embodiments, the first filter circuit 20 includes: a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a first operational amplifier U5 and a second capacitor C2; the first end of the seventh resistor R7 is connected to the second end of the third resistor R3, and the second end is connected to the inverting input terminal of the first operational amplifier U5 through the eighth resistor R8; a first end of the ninth resistor R9 is connected to a second end of the fourth resistor R4, and a second end is connected to the non-inverting input terminal of the first operational amplifier U5 through a tenth resistor R10; an output end of the first operational amplifier U5 is connected to a first end of an eleventh resistor R11, and a second end of the eleventh resistor R11 is connected to an input end of the modulation circuit 30; the second capacitor C2 is connected between the second end of the seventh resistor R7 and the output end of the first operational amplifier U5; the twelfth resistor R12 is connected between the second terminal of the seventh resistor R7 and the second terminal of the eleventh resistor R11. The first filter circuit 20 is used for filtering out interference signals in the low-voltage signals.

In the embodiment of the application, the device further comprises a first inverter U7 and a first inverter U8, and the first inverter U7 and the first inverter U8 are used for driving the CMOS four-channel switch to be modulated.

As shown in fig. 2, the voltage of the signal to be measured is V0, the output voltage of the first filter circuit 20 is V1, and the signal is modulated by a CMOS four-channel switch, which is controlled by an inverter, and the specific logic is as follows: when the output pin of the inverter is at a low level, the 1 channel and the 4 channel of the CMOS four-channel switch are opened, the 2 channel and the 3 channel are closed, the port S1 and the port S4 have no output, the port S2 outputs 0, the port S3 outputs V1, the input signal of the first transformer 40 is an inverted signal of V1, when the output pin of the inverter is at a high level, the 1 channel and the 4 channel of the CMOS four-channel switch are closed, the 2 channel and the 3 channel are opened, the S1 outputs V1, the S4 outputs 0, the S2 and the S3 have no output, and the input signal of the first transformer 40 is V1. The direct current signal is modulated into an alternating current signal with a duty ratio of 50 percent by the periodic variation. The demodulation circuit is similar to the modulation circuit, and is the inverse logic of the modulation circuit, and outputs a dc signal V1 after demodulation, and finally outputs a signal Vout after passing through the second filter circuit 60.

In some embodiments, the second filter circuit 60 includes: a second operational amplifier U6, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18 and a common-mode inductor L3; the inverting input end of the second operational amplifier U6 is connected to the output end of the demodulation circuit 50 through a thirteenth resistor R13, a fourteenth resistor R14 and a fifteenth resistor R15 which are connected in series in sequence; a first end of the fifteenth resistor R15 is connected to the output end of the demodulation circuit 50, and a first end of the thirteenth resistor R13 is connected to the inverting input end of the second operational amplifier U6; a first end of the fifteenth resistor R15 is grounded through the third capacitor C3, and a second end is grounded through the fourth capacitor C4; the non-inverting input terminal of the second operational amplifier U6 is grounded through a sixteenth resistor R16; a first end of the seventeenth resistor R17 is connected to the output end of the second operational amplifier U6, and a second end is connected to the first input end of the common mode inductor L3; the eighteenth resistor R18 is connected between the second terminal of the thirteenth resistor R13 and the second terminal of the seventeenth resistor R17; the fifth capacitor C5 is connected between the second end of the thirteenth resistor R13 and the output end of the second operational amplifier U6; the sixth capacitor C6 is connected between the first input end and the second input end of the common mode inductor L3; a second input end of the common mode inductor L3 is grounded; a seventh capacitor C7 is connected between the two output ends of the common mode inductor L3; two output terminals of the common mode inductor L3 are signal output terminals. The common mode inductor L3 and other capacitors are used for filtering.

The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.