阅读说明：本技术 基于锁相环产生中心频率可变高速线性调频信号的系统 (System for generating center frequency variable high-speed linear frequency modulation signal based on phase-locked loop ) 是由 姚宗诚 黄涤生 王清文 吴义华 于 2019-11-27 设计创作，主要内容包括：本发明提出一种基于锁相环产生中心频率可变高速线性调频信号的系统,属于射频领域。本发明包括：运算放大器、单片机、锁相环、晶振、环路滤波器、加法器、压控振荡器和定向耦合器,所述运算放大器与加法器连接,单片机和晶振均与锁相环连接,锁相环通过环路滤波器与加法器连接,加法器通过压控振荡器与定向耦合器连接,定向耦合器与锁相环连接。本发明利用锁相环精确锁定输出线性调频信号的中心频率,通过加法器将调制信号和锁相环输出的直流信号相叠加,以控制线性调频信号的大小和扫频带宽,利用单片机控制中心频率的切换,以达到超宽带,中心频率可调的目的,利用直接驱动的方式,保证了扫频信号的响应速度,能够满足越来越高的性能要求。(The invention provides a system for generating a center frequency variable high-speed linear frequency modulation signal based on a phase-locked loop, belonging to the field of radio frequency. The invention comprises the following steps: the circuit comprises an operational amplifier, a single chip microcomputer, a phase-locked loop, a crystal oscillator, a loop filter, an adder, a voltage-controlled oscillator and a directional coupler, wherein the operational amplifier is connected with the adder, the single chip microcomputer and the crystal oscillator are both connected with the phase-locked loop, the phase-locked loop is connected with the adder through the loop filter, the adder is connected with the directional coupler through the voltage-controlled oscillator, and the directional coupler is connected with the phase-locked loop. The invention utilizes the phase-locked loop to accurately lock the central frequency of the output linear frequency modulation signal, superposes the modulation signal and the direct current signal output by the phase-locked loop through the adder to control the size and the sweep frequency bandwidth of the linear frequency modulation signal, utilizes the singlechip to control the switching of the central frequency so as to achieve the purposes of ultra wide band and adjustable central frequency, and utilizes a direct driving mode to ensure the response speed of the sweep frequency signal and meet the higher and higher performance requirements.)

1. A system for generating a center frequency variable high-speed chirp signal based on a phase-locked loop, comprising: the system comprises an operational amplifier, a single chip microcomputer, a phase-locked loop, a crystal oscillator, a loop filter, an adder, a voltage-controlled oscillator and a directional coupler, wherein the operational amplifier is connected with the adder;

the crystal oscillator is used for matching with the phase-locked loop to generate a direct current signal and inputting the direct current signal to the loop filter;

the operational amplifier is used for processing the input modulation signal and inputting the processed signal to the adder;

the adder is used for superposing the direct current signal after passing through the loop filter and the modulation signal processed by the operational amplifier, controlling the voltage-controlled oscillator together, generating a linear frequency modulation signal and inputting the linear frequency modulation signal to the directional coupler, wherein the direct current signal after passing through the loop filter determines the central frequency of the output linear frequency modulation signal, and the modulation signal after passing through the operational amplifier determines the bandwidth of the output linear frequency modulation signal;

the directional coupler couples one path of output signal to the phase-locked loop, then the direct current signal output by the phase-locked loop is input to the adder after passing through the loop filter, and the other path of output signal is a linear frequency modulation signal;

the phase-locked loop is used for locking the center frequency of the output linear frequency modulation signal;

and the singlechip is used for controlling the phase-locked loop according to the received frequency control code and controlling the switching of the center frequency of the output linear frequency modulation signal.

2. The phase-locked loop-based system for generating a center frequency variable high speed chirp signal of claim 1, wherein the summer is a voltage summer.

3. The phase-locked loop-based system for generating a center frequency variable high-speed chirp signal according to claim 1, wherein the operational amplifier processed modulated signal is a 0V centered ac signal.

4. The phase-locked loop-based system for generating a center frequency variable high-speed chirp signal according to claim 3, wherein the ac signal is a triangular wave having a voltage amplitude ranging from-1V to 1V.

Technical Field

The invention relates to the field of radio frequency, in particular to a system for generating a high-speed linear frequency modulation signal with variable center frequency based on a phase-locked loop.

Background

The generation of frequency sources is an important microwave technology, and almost all radio frequency systems use frequency sources. In recent years, with the rapid development of communication technologies such as digital radio communication, radar, and broadcast television, the performance requirements for frequency sources have been increasing. Among them, chirp is an important frequency source technology, and how to generate a high-speed stable chirp is a problem that must be faced and solved by radio frequency engineers and engineering applications.

At present, three conventional circuits for generating chirp signals are specifically: the basic circuit diagram of the circuit for generating the chirp signal based on the voltage-controlled oscillator is shown in fig. 1, the basic circuit diagram of the circuit for generating the chirp signal based on the phase-locked loop is shown in fig. 2, and the basic circuit diagram of the circuit for generating the chirp signal based on the DDS is shown in fig. 3.

The working principle of the circuit for generating the linear frequency modulation signal based on the voltage-controlled oscillator is as follows: after passing through the operational amplifier, the modulation signal, such as a triangular wave modulation signal, directly drives the voltage-controlled oscillator to generate a chirp radio frequency signal. After being processed by the operational amplifier, the modulation signal is matched with the voltage-controlled oscillator, and the linear frequency modulation signal with the required frequency and the required bandwidth can be output. The circuit has the advantages of simple driving mode, simple circuit and high response speed.

The working principle of the circuit for generating the linear frequency modulation signal based on the phase-locked loop is as follows: the single chip microcomputer receives the frequency control code and controls the phase-locked loop to directly generate the linear frequency modulation signal in a phase-locked loop frequency synthesis mode. The circuit has the advantages of simple circuit, good temperature adaptability, accurate output frequency and good phase noise.

The working principle of the circuit for generating the linear frequency modulation signal based on the DDS is as follows: the frequency control code is received by the singlechip to control the DDS, and a linear frequency modulation signal is generated in a direct digital frequency synthesis mode. The circuit has the advantages of extremely high response speed, accurate output frequency, extremely good phase noise and good temperature adaptability.

The technical problems and the defects of the traditional circuit for generating the linear frequency modulation signal are as follows:

the circuit for generating a chirp signal based on a voltage controlled oscillator has several drawbacks: 1) the characteristic of the voltage-controlled oscillator under high and low temperature can not be effectively compensated, the circuit can only roughly compensate the output voltage of the operational amplifier by the amplification factor of the temperature compensation resistor, and the temperature change curve of the temperature compensation resistor is difficult to correspond to the change curve of the voltage-controlled oscillator. Causing the output frequency of the vco to vary at different ambient temperatures. Therefore, the required frequency of the linear frequency modulation signal cannot be accurately obtained, and the higher and higher performance requirements are difficult to meet. And brings great difficulty to temperature compensation resistor selection and debugging of the operational amplifier, and influences production efficiency. 2) Although the circuit structure is simple, the adoption of the free oscillation mode leads to frequency unlocking, leads to poor phase noise of an output linear frequency modulation signal, has poor controllability and cannot be used as a frequency hopping source. It is difficult to meet the increasingly higher performance requirements.

The circuit for generating a chirp signal based on a phase-locked loop has the following disadvantages: 1) the nature that the phase-locked loop is controlled by the singlechip to directly generate the linear frequency modulation signal belongs to digital synthesis, so that the frequency of the output signal has certain stepping, such as 1MHz stepping, and the linearity of the output frequency is influenced. 2) Although the circuit is controllable and accurate in frequency, the phase-locked loop is slow in response speed, generally in millisecond magnitude, and cannot meet index requirements of quick response, and the quick response is generally in microsecond magnitude or even nanosecond magnitude.

The circuit for generating the linear frequency modulation signal based on the DDS has the following defects: 1) the essence of this circuit is direct digital frequency synthesis, so there is a certain step in the frequency of the output signal, such as a 10KHz step, which, even if small, still has an effect on the linearity of the signal. 2) The DDS circuit itself is complex and consumes a lot of power and requires a high reference clock, as shown in fig. 3, a phase locked loop is used to generate the reference clock signal required for DDS. Typical DDS require a reference clock frequency in the range of 1GHz to 3.5 GHz. 3) The linear frequency modulation signal generated by using the DDS has narrow bandwidth and poor stray. 4) The chirp signal generated using DDS is of very low frequency, typically below 1 GHz. 5) Although the phase noise of the chirp signal generated by using the DDS is excellent, when there is a high frequency requirement, the frequency needs to be increased by frequency multiplication or frequency mixing, the frequency multiplication directly deteriorates the phase noise, and the phase noise of the frequency mixing depends on the signal with poor phase noise, so that the phase noise is not more excellent than that of the phase-locked loop when there is a high frequency requirement.

In summary, the above three conventional chirps are long and short, respectively, so that it is difficult to meet higher and higher performance requirements without solving the defects.

Disclosure of Invention

The invention aims to provide a system for generating a center frequency variable high-speed linear frequency modulation signal based on a phase-locked loop so as to meet higher and higher performance requirements.

The invention solves the technical problem, and adopts the technical scheme that: a system for generating a center frequency variable high speed chirp signal based on a phase locked loop, comprising: the system comprises an operational amplifier, a single chip microcomputer, a phase-locked loop, a crystal oscillator, a loop filter, an adder, a voltage-controlled oscillator and a directional coupler, wherein the operational amplifier is connected with the adder;

the crystal oscillator is used for matching with the phase-locked loop to generate a direct current signal and inputting the direct current signal to the loop filter;

the operational amplifier is used for processing the input modulation signal and inputting the processed signal to the adder;

the adder is used for superposing the direct current signal after passing through the loop filter and the modulation signal processed by the operational amplifier, controlling the voltage-controlled oscillator together, generating a linear frequency modulation signal and inputting the linear frequency modulation signal to the directional coupler, wherein the direct current signal after passing through the loop filter determines the central frequency of the output linear frequency modulation signal, and the modulation signal after passing through the operational amplifier determines the bandwidth of the output linear frequency modulation signal;

the directional coupler couples one path of output signal to the phase-locked loop, then the direct current signal output by the phase-locked loop is input to the adder after passing through the loop filter, and the other path of output signal is a linear frequency modulation signal;

the phase-locked loop is used for locking the center frequency of the output linear frequency modulation signal;

and the singlechip is used for controlling the phase-locked loop according to the received frequency control code and controlling the switching of the center frequency of the output linear frequency modulation signal.

Preferably, the adder is a voltage adder.

Preferably, the modulated signal processed by the operational amplifier is an ac signal centered at 0V.

Preferably, the alternating current signal is a triangular wave with a voltage amplitude ranging from-1V to 1V.

The system for generating the high-speed linear frequency modulation signal with the variable center frequency based on the phase-locked loop has the advantages that the phase-locked loop is utilized to accurately lock the center frequency of the output linear frequency modulation signal, the modulating signal and the direct current signal output by the phase-locked loop are superposed through the adder to control the size and the sweep frequency bandwidth of the linear frequency modulation signal, the singlechip is utilized to control the switching of the center frequency, the purposes of ultra wide band and adjustable center frequency are achieved, the response speed of the sweep frequency signal is ensured by utilizing a direct driving mode, and the higher and higher performance requirements can be met.

Drawings

FIG. 1 is a basic circuit diagram of a conventional current VCO-based chirp signal generation circuit;

FIG. 2 is a basic circuit diagram of a conventional current PLL-based chirp signal generation circuit;

FIG. 3 is a basic circuit diagram of a conventional DDS-based chirp signal generation circuit;

fig. 4 is a schematic block diagram of a system for generating a center frequency variable high speed chirp signal based on a phase locked loop of the present invention.

Detailed Description

The technical scheme of the invention is described in detail in the following with reference to the accompanying drawings.

The functional block diagram of the system for generating a center frequency variable high-speed chirp signal based on a phase-locked loop is shown in fig. 4, wherein the system comprises: the circuit comprises an operational amplifier, a single chip microcomputer, a phase-locked loop, a crystal oscillator, a loop filter, an adder, a voltage-controlled oscillator and a directional coupler, wherein the operational amplifier is connected with the adder, the single chip microcomputer and the crystal oscillator are both connected with the phase-locked loop, the phase-locked loop is connected with the adder through the loop filter, the adder is connected with the directional coupler through the voltage-controlled oscillator, and the directional coupler is connected with the phase-locked loop.

In the system, the crystal oscillator is used for cooperating with the phase-locked loop to generate a direct current signal and inputting the direct current signal to the loop filter; the operational amplifier is used for processing the input modulation signal and inputting the processed signal to the adder; the adder is used for superposing the direct current signal after passing through the loop filter and the modulation signal processed by the operational amplifier, jointly controlling the voltage-controlled oscillator to generate a linear frequency modulation signal and inputting the linear frequency modulation signal to the directional coupler, wherein the direct current signal after passing through the loop filter determines the central frequency of the output linear frequency modulation signal, and the modulation signal after passing through the operational amplifier determines the bandwidth of the output linear frequency modulation signal; the directional coupler couples one path of output signal to the phase-locked loop, then the direct current signal output by the phase-locked loop is input to the adder after passing through the loop filter, and the other path of output signal is a linear frequency modulation signal; the phase-locked loop is used for locking the center frequency of the output linear frequency modulation signal; and the singlechip is used for controlling the phase-locked loop according to the received frequency control code and controlling the switching of the center frequency of the output linear frequency modulation signal.

The adder is preferably a voltage adder, depending on the choice of the actual operating conditions. In order to meet the requirement of the modulation signal, generally, the modulation signal processed by the operational amplifier may preferably be an alternating current signal with 0V as a center. The alternating current signal is preferably a triangular wave with a voltage amplitude ranging from-1V to 1V based on usage habits.

In practical application, one output signal is coupled by the directional coupler and fed back to the phase-locked loop, and then a direct current signal output by the phase-locked loop passes through the loop filter and is superposed with a modulation signal processed by the operational amplifier by the voltage adder to jointly control the voltage-controlled oscillator. Wherein, the direct current signal generated by the crystal oscillator and the phase-locked loop and passing through the loop filter is set as Vt, and the central frequency of the output linear frequency modulation signal is determined; the modulated signal processed by the operational amplifier, here designated as Vs, determines the bandwidth of the chirp signal. After the adder, the signal controlling the voltage controlled oscillator is Vt + Vs.

And then the phase-locked loop is controlled by the singlechip, so that the phase-locked loop can be used as a frequency hopping source, and the aim of flexibly switching the center frequency of the output linear frequency modulation signal is fulfilled. And the high-speed linear frequency modulation signal with variable center frequency of the broadband can be used by matching with a broadband voltage-controlled oscillator.

Although the phase-locked loop and the modulation signal jointly drive the voltage-controlled oscillator after passing through the adder, the phase-locked loop signal is only used for controlling the central frequency, and the adder, the operational amplifier and the voltage-controlled oscillator have extremely high response speed, so that the response speed of the output linear frequency modulation signal is not influenced, and the phase-locked loop circuit has the advantages of simplicity and high response speed.

In summary, the present invention can precisely lock the center frequency of the output chirp signal by using the phase-locked loop; the modulation signal and the direct current signal output by the phase-locked loop can be superposed through the adder to control the sweep frequency bandwidth of the linear frequency modulation signal; the switching of the center frequency can be controlled by utilizing the singlechip, the response speed of the frequency sweep is determined by only three high-speed devices including the operational amplifier, the adder and the voltage-controlled oscillator, and then the ultra-wideband voltage-controlled oscillator is matched to generate the ultra-wideband high-speed linear frequency-modulated signal with the variable center frequency, so that the purposes of ultra-wideband and center frequency adjustment are achieved, and the response speed of the frequency sweep signal is ensured in a direct driving mode.